Abstract: Lateral collection architecture for a photodetector is achieved by depositing electrically conducting SLS layers onto a planar substrate and diffusing dopants of a carrier type opposite that of the layers through the layers at selected regions to disorder the superlattice and create diode junctions oriented transversely to the naturally enhanced lateral mobility of photogenerated charge carriers within the superlattice. The diode junctions are terminated at a top surface of the photodetector within an SLS layer of wide bandgap material to minimize unwanted currents. A related architecture disorders the superlattice of topmost SLS layers by diffusing therethrough a dopant configured as a grid and penetrating to a lower SLS layer having the same carrier type as the dopant and opposite that of the topmost layers to isolate pixels within the topmost layers. Ohmic contacts may be deposited on doped regions, pixels, and substrate to provide desired external connections.

Abstract: Lateral collection architecture for a photodetector is achieved by depositing electrically conducting SLS layers onto a planar substrate and diffusing dopants of a carrier type opposite that of the layers through the layers at selected regions to disorder the superlattice and create diode junctions oriented transversely to the naturally enhanced lateral mobility of photogenerated charge carriers within the superlattice. The diode junctions are terminated at a top surface of the photodetector within an SLS layer of wide bandgap material to minimize unwanted currents. A related architecture disorders the superlattice of topmost SLS layers by diffusing therethrough a dopant configured as a grid and penetrating to a lower SLS layer having the same carrier type as the dopant and opposite that of the topmost layers to isolate pixels within the topmost layers. Ohmic contacts may be deposited on doped regions, pixels, and substrate to provide desired external connections.

Abstract: Lateral collection architecture for a photodetector is achieved by depositing electrically conducting SLS layers onto a planar substrate and diffusing dopants of a carrier type opposite that of the layers through the layers at selected regions to disorder the superlattice and create diode junctions oriented transversely to the naturally enhanced lateral mobility of photogenerated charge carriers within the superlattice. The diode junctions are terminated at a top surface of the photodetector within an SLS layer of wide bandgap material to minimize unwanted currents. A related architecture disorders the superlattice of topmost SLS layers by diffusing therethrough a dopant configured as a grid and penetrating to a lower SLS layer having the same carrier type as the dopant and opposite that of the topmost layers to isolate pixels within the topmost layers. Ohmic contacts may be deposited on doped regions, pixels, and substrate to provide desired external connections.

Abstract: A method for forming a low defect density heterojunction between a first and a second compound, the first and second compounds each includes a group III element combined with a group V element in the periodic table, the method includes the steps of introducing in the deposition chamber the flux of the group III element for the first compound at substantially the same time while introducing in the deposition chamber a flux of the group V element for the second compound, stopping the flux of the group III element for the first compound after a first predetermined time period, stopping the flux of the group V element for the first compound after a second predetermined time period, and introducing in the deposition chamber a flux of the group III element the group V element for the second compound.

Abstract: A transistor heterogeneously integrating a power amplifier or switch with a low-noise amplifier having a substrate wafer selected from a group consisting of Gallium Arsenide (GaAs), Indium Phosphate (InP) and Gallium Antimonide (GaSb), the substrate having a first end and a second end, a conducting layer above the first end of the substrate, an isolation implant providing lateral isolation in the conducting layer, a first active layer deposited above the conducting layer and configured for the low-noise amplifier, and a buffer layer deposited above the conducting layer and configured for the low-noise amplifier.

Abstract: A method for forming a low defect density heterojunction between a first and a second compound, the first and second compounds each includes a group III element combined with a group V element in the periodic table, the method includes the steps of introducing in the deposition chamber the flux of the group III element for the first compound at substantially the same time while introducing in the deposition chamber a flux of the group V element for the second compound, stopping the flux of the group III element for the first compound after a first predetermined time period, stopping the flux of the group V element for the first compound after a second predetermined time period, and introducing in the deposition chamber a flux of the group III element the group V element for the second compound.

Abstract: A transistor heterogeneously integrating a power amplifier or switch with a low-noise amplifier having a substrate wafer selected from a group consisting of Gallium Arsenide (GaAs), Indium Phosphate (InP) and Gallium Antimonide (GaSb), the substrate having a first end and a second end, a conducting layer above the first end of the substrate, an isolation implant providing lateral isolation in the conducting layer, a first active layer deposited above the conducting layer and configured for the low-noise amplifier, and a buffer layer deposited above the conducting layer and configured for the low-noise amplifier.

Abstract: Lateral collection architecture for a photodetector is achieved by depositing electrically conducting SLS layers onto a planar substrate and diffusing dopants of a carrier type opposite that of the layers through the layers at selected regions to disorder the superlattice and create diode junctions oriented transversely to the naturally enhanced lateral mobility of photogenerated charge carriers within the superlattice. The diode junctions are terminated at a top surface of the photodetector within an SLS layer of wide bandgap material to minimize unwanted currents. A related architecture disorders the superlattice of topmost SLS layers by diffusing therethrough a dopant configured as a grid and penetrating to a lower SLS layer having the same carrier type as the dopant and opposite that of the topmost layers to isolate pixels within the topmost layers. Ohmic contacts may be deposited on doped regions, pixels, and substrate to provide desired external connections.

Abstract: A method for forming a low defect density heterojunction between a first and a second compound, the first and second compounds each includes a group III element combined with a group V element in the periodic table, the method includes the steps of introducing in the deposition chamber the flux of the group III element for the first compound at substantially the same time while introducing in the deposition chamber a flux of the group V element for the second compound, stopping the flux of the group III element for the first compound after a first predetermined time period, stopping the flux of the group V element for the first compound after a second predetermined time period, and introducing in the deposition chamber a flux of the group III element the group V element for the second compound.

Abstract: A transistor heterogeneously integrating a power amplifier or switch with a low-noise amplifier having a substrate wafer selected from a group consisting of Gallium Arsenide (GaAs), Indium Phosphate (InP) and Gallium Antimonide (GaSb), the substrate wafer having a first end and a second end, a conducting layer above the first end of the substrate wafer, an isolation implant providing lateral isolation in the conducting layer, a first active layer deposited above the conducting layer and configured for the low-noise amplifier, and a buffer layer deposited above the conducting layer and configured for the low-noise amplifier.

Abstract: A metamorphic high electron mobility transistor having a plurality of high electron mobility transistor layers, a semi-insulating substrate, a ternary metamorphic buffer layer positioned between the semi-insulating substrate and the plurality of high electron mobility transistor layers, the ternary metamorphic buffer layer being Al1-xGaxSb such that x is greater than or equal to 0.2 but less than 0.3, a stabilizing layer positioned between the ternary metamorphic buffer layer and the plurality of high electron mobility transistor layers, the stabilizing layer being Al1-yGaySb such that y is greater than 0.2 but less than or equal to 0.3 and y is greater than x, and a nucleation layer interposed between the semi-insulating substrate and the ternary metamorphic buffer layer.

Abstract: A transistor heterogeneously integrating a power amplifier or switch with a low-noise amplifier having a substrate wafer selected from a group consisting of Gallium Arsenide (GaAs), Indium Phosphate (InP) and Gallium Antimonide (GaSb), the substrate wafer having a first end and a second end, a conducting layer above the first end of the substrate wafer, an isolation implant providing lateral isolation in the conducting layer, a first active layer deposited above the conducting layer and configured for the low-noise amplifier, and a buffer layer deposited above the conducting layer and configured for the low-noise amplifier.

Abstract: A high electron mobility transistor having a first and a second layer with a ternary metamorphic buffer between the first and second layers, the first layer composed of a first material and the second layer composed of a second material, the first and second material having different lattice constants.

Abstract: A method for forming a low defect density heterojunction between a first and a second compound, the first and second compounds each includes a group III element combined with a group V element in the periodic table, the method includes the steps of introducing in the deposition chamber the flux of the group III element for the first compound at substantially the same time while introducing in the deposition chamber a flux of the group V element for the second compound, stopping the flux of the group III element for the first compound after a first predetermined time period, stopping the flux of the group V element for the first compound after a second predetermined time period, and introducing in the deposition chamber a flux of the group III element the group V element for the second compound.

Abstract: A slotted file is created by connecting two side walls and a back wall. The side walls have etched grooves facing directly across from each other. The platelet has flanges that fit into the grooves. In one embodiment, a completed cube is formed when the platelets fill the slotted file.

Abstract: A slotted file is created by connecting two side walls and a back wall. The side walls have etched grooves facing directly across from each other. The platelet has flanges that fit into the grooves. In one embodiment, a completed cube is formed when the platelets fill the slotted file.

Abstract: A slotted file is created by connecting two side walls and a back wall. The side walls have etched grooves facing directly across from each other. The platelet has flanges that fit into the grooves. In one embodiment, a completed cube is formed when the platelets fill the slotted file.

Abstract: A current sensor includes a deflectable member disposed in a magnetic field. Nulling or compensating members may be mechanically coupled to the deflectable member. Feedback or readout devices coupled to the structure provide signals indicative of deflection of the deflectable member under the influence of applied current and the magnetic field. Nulling current applied to the nulling members tends to oppose deflection of the deflectable member. The nulling current may be modulated to drive the feedback signal to a desired level and is used as a basis for calculating the current to be measured. The current may be measured directly upon calibration of feedback devices coupled to the deflectable member or to the nulling members. Arrays of sensors may be coupled to common busses for applying measured and nulling currents to sensors of the arrays and for detecting feedback signals.

Abstract: A photodetector sensitive to ultraviolet wavelengths is capable of single photon sensitivity at room temperatures and video frame rates. It includes (a) a compound semiconductor photodiode, biased below its avalanche breakdown threshold, comprising III-V elemental components and having a bandgap with transition energy higher than the energy of visible photons; and (b) a high input impedance MOS interface circuit, arranged to receive a signal from the photodiode junction and to amplify said signal. Preferably, the photodiode junction is integrated in a first microstructure on a first substrate, and its interface circuit in a second microstructure on a second substrate. Both microstructures are then joined in a laminar, sandwich-like structure and communicate via electrically conducting contacts.

Abstract: A photodetector sensitive to visible and shorter wavelengths is capable of single photon sensitivity at room temperatures and video frame rates. It includes (a) a compound semiconductor photodiode, biased below its avalanche breakdown threshold, comprising III-V elemental components and having a bandgap with transition energy higher than the energy of infrared photons; and (b) a high trans-impedance interface circuit, arranged to receive a signal from the photodiode junction and to amplify said signal. Preferably, the photodiode junction is integrated in a first microstructure on a first substrate, and its interface circuit in a second microstructure on a second substrate. Both microstructures are then joined in a laminar, sandwich-like structure and communicate via electrically conducting contacts.