Abstract: According to one embodiment, a graphics/video processor includes a memory controller. The memory controller includes a first arbiter that receives memory client requests to access a memory device, and a first memory buffer coupled to the first arbiter. The first arbiter stores client requests that are selected by the first arbiter. The memory controller also includes a second arbiter coupled to the first memory buffer and a second memory buffer coupled to the second arbiter. The second arbiter receives requests from the memory client requests stored in the first memory buffer. The second memory buffer stores the client requests selected by the second arbiter. Further, the memory controller includes a third arbiter coupled to the second memory buffer. The third arbiter provides access of the memory device to the client requests stored in the second memory buffer.

Abstract: A method, apparatus, system and machine-readable medium for generating a composite output image based upon multiple input images. In certain embodiments, a plurality of input graphics images are iteratively blended in real time to provide a blended graphics image, which is then composited with other layers such as an input video image. The composite output image may then be provided to a display device. Iterative blending of the plurality of graphics images may include scaling, format conversion, and color space conversion, and may be performed based on priority information received for the graphics images from content sources. Compositing may include an alpha blending based on alpha values for pixels of the images.

Abstract: According to one embodiment, a graphics/video processor includes a memory controller. The memory controller includes a first arbiter that receives memory client requests to access a memory device, and a first memory buffer coupled to the first arbiter. The first arbiter stores client requests that are selected by the first arbiter. The memory controller also includes a second arbiter coupled to the first memory buffer and a second memory buffer coupled to the second arbiter. The second arbiter receives requests from the memory client requests stored in the first memory buffer. The second memory buffer stores the client requests selected by the second arbiter. Further, the memory controller includes a third arbiter coupled to the second memory buffer. The third arbiter provides access of the memory device to the client requests stored in the second memory buffer.

Abstract: According to one embodiment, a graphics/video processor includes a memory controller. The memory controller includes a first arbiter that receives memory client requests to access a memory device, and a first memory buffer coupled to the first arbiter. The first arbiter stores client requests that are selected by the first arbiter. The memory controller also includes a second arbiter coupled to the first memory buffer and a second memory buffer coupled to the second arbiter. The second arbiter receives requests from the memory client requests stored in the first memory buffer. The second memory buffer stores the client requests selected by the second arbiter. Further, the memory controller includes a third arbiter coupled to the second memory buffer. The third arbiter provides access of the memory device to the client requests stored in the second memory buffer.

Abstract: A method, apparatus, system and machine-readable medium for generating a composite output image based upon multiple input images. In certain embodiments, a plurality of input graphics images are iteratively blended in real time to provide a blended graphics image, which is then composited with other layers such as an input video image. The composite output image may then be provided to a display device. Iterative blending of the plurality of graphics images may include scaling, format conversion, and color space conversion, and may be performed based on priority information received for the graphics images from content sources. Compositing may include an alpha blending based on alpha values for pixels of the images.

Abstract: A method, apparatus, system and machine-readable medium for generating a composite output image based upon multiple input images. In one embodiment, a first display location on a display panel is located. A first function is performed to generate a first pixel of the output image for display at the first display location if a first image and a second image are both active at the first display location. A second function is performed to generate the first pixel of the output image if only the first image or only the second image is active at the first display location. In one embodiment, the first image is active at the first display location if the first display location is located within a first display area on the display panel where the first image is to be displayed, the second image is active at the first display location if the first display location is located within a second display area on the display panel where the second image is to be displayed.

Abstract: The present invention is a method and apparatus to generate an anti-flickered pixel from a source pixel having a source pixel value in a display memory. The apparatus comprises a plurality of storage elements, a filter, a comparator, and an output selector. The plurality of storage elements store a sequence of pixels in the display memory which includes the source pixel. The filter is coupled to the plurality of storage elements to filter the sequence of pixels. The filter generates a filtered pixel corresponding to the source pixel. The comparator is coupled to the plurality of storage elements to compare the source pixel value with a threshold value. The comparator generates a comparison result. The output selector is coupled to the filter and the storage elements to select one of the source and filtered pixels according to the comparison result. The selected one of the source and filtered pixels is the anti-flickered pixel.

Abstract: The present invention is a method and apparatus for de-interlacing image data in a memory. A read interface circuit is coupled to the memory to transfer a patch of the image data from the memory to a buffer. A de-interlacing circuit is coupled to the read interface circuit to de-interlace the image data in the patch from the buffer. A receive circuit is coupled to the de-interlacing circuit to re-organize the de-interlaced image data.

Abstract: According to one embodiment, a graphics/video processor includes a memory controller. The memory controller includes a first arbiter that receives memory client requests to access a memory device, and a first memory buffer coupled to the first arbiter. The first arbiter stores client requests that are selected by the first arbiter. The memory controller also includes a second arbiter coupled to the first memory buffer and a second memory buffer coupled to the second arbiter. The second arbiter receives requests from the memory client requests stored in the first memory buffer. The second memory buffer stores the client requests selected by the second arbiter. Further, the memory controller includes a third arbiter coupled to the second memory buffer. The third arbiter provides access of the memory device to the client requests stored in the second memory buffer.

Abstract: The present invention is a method and apparatus for correcting aspect ratio of a display by scaling a source array of pixel data in a memory by a scale factor to a destination array of pixel data. The apparatus comprises a coefficient unit, a register unit, and an arithmetic unit. The coefficient unit is coupled to a buffer to load N coefficients. The register unit is coupled to the source array to load N pixel data synchronously with the coefficient unit. The N pixel data are started at a location in the source array according to the scale factor. The arithmetic unit is coupled to the coefficient unit and the register unit to perform a filtering operation on the loaded N pixel data using the corresponding N coefficients. The arithmetic unit generates a filtered output corresponding to a scaled pixel in the destination array.

Abstract: The invention is a method and apparatus for processing image data stored in a memory. A read interface circuit is coupled to the memory to transfer a patch of the image data from the memory to a buffer. A scale filter is coupled to the read interface circuit to scale the image data in the patch from the buffer. A receive circuit is coupled to the scale filter to re-organize the scaled image data.

Abstract: The invention provides a method and apparatus for conversion of video data from a source format to a second destination. Conversion can be performed in real time and intermediate data is stored in a buffer. Converted video data is written into the buffer at a first rate and read out of the buffer at a second rate. In order to avoid overflow and underflow conditions, a threshold value is determined based, at least in part, on the video format being converted. The threshold value indicates a point in frame conversion at which converted data is read out of the buffer.

Abstract: The present invention is a method and apparatus for converting scan rates of image data in a memory. A buffer stores a source image data. A scaling filter is coupled to the buffer to scale the source image data.