Patents by Inventor Gerrit Ary Slavenburg

Gerrit Ary Slavenburg has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190266961
    Abstract: A display controller progressively updates LEDs and LCD pixels in scanline order as portions of an image are scanned into a frame buffer. The display controller analyzes a first portion of the image that includes a first pixel value associated with a first LCD pixel. The display controller identifies a first LED that contributes luminance to the first LCD pixel and determines an LED current setting for the LED based on the first pixel value. The display controller then identifies a second LCD pixel that resides above the first LED and is associated with a second pixel value. The display controller configures the second LCD pixel based on the second pixel value and luminance contributions received at the second LCD pixel. Accordingly, the display controller need not wait for the entire image to be scanned into the frame buffer before initiating display of the image.
    Type: Application
    Filed: February 5, 2019
    Publication date: August 29, 2019
    Inventors: Gerrit Ary SLAVENBURG, Robert Jan SCHUTTEN, Jens ROEVER, Tom J. VERBEURE
  • Patent number: 8994640
    Abstract: One embodiment of the present invention sets forth a technique for reducing motion blur in a liquid crystal display (LCD) by pulsing each frame with a relatively short pulse of backlight illumination while driving pixels within the LCD with compensated intensity values to account for LCD settling time and vertical position. An LCD drive compensation unit implements the disclosed technique to generate an intensity value for each pixel that is scanned into the LCD. The technique advantageously reduces motion blur while preserving uniform vertical display accuracy.
    Type: Grant
    Filed: March 14, 2013
    Date of Patent: March 31, 2015
    Assignee: NVIDIA Corporation
    Inventors: Gerrit Ary Slavenburg, Tom J. Verbeure, Robert Jan Schutten
  • Publication number: 20140266996
    Abstract: One embodiment of the present invention sets forth a technique for reducing motion blur in a liquid crystal display (LCD) by pulsing each frame with a relatively short pulse of backlight illumination while driving pixels within the LCD with compensated intensity values to account for LCD settling time and vertical position. An LCD drive compensation unit implements the disclosed technique to generate an intensity value for each pixel that is scanned into the LCD. The technique advantageously reduces motion blur while preserving uniform vertical display accuracy.
    Type: Application
    Filed: March 14, 2013
    Publication date: September 18, 2014
    Applicant: NVIDIA CORPORATION
    Inventors: Gerrit Ary SLAVENBURG, Tom J. VERBEURE, Robert Jan SCHUTTEN
  • Patent number: 8350900
    Abstract: A method includes reducing a red rivalry through adjusting a color temperature on a first image, converting the first image from the RGB domain to a YCbCr domain, shifting a hue of a red color in the first image towards a magenta color to reduce a red color vibrancy, and adjusting a blue color in the first image such that a dark blue visible through a second lens corresponding to a second image is at least partially visible through a first lens corresponding to the first image. The method also includes reducing the red rivalry through adjusting a tone of the red color in the first image towards a brown color, converting the first image from the YCbCr domain back to the RGB domain, adjusting a color saturation in the first image, and combining the first image with the second image in a processor to generate an anaglyph image.
    Type: Grant
    Filed: December 15, 2009
    Date of Patent: January 8, 2013
    Assignee: Nvidia Corporation
    Inventors: Santanu Dutta, Gerrit Ary Slavenburg, David R Cook
  • Publication number: 20110141240
    Abstract: A method includes reducing a red rivalry through adjusting a color temperature on a first image, converting the first image from the RGB domain to a YCbCr domain, shifting a hue of a red color in the first image towards a magenta color to reduce a red color vibrancy, and adjusting a blue color in the first image such that a dark blue visible through a second lens corresponding to a second image is at least partially visible through a first lens corresponding to the first image. The method also includes reducing the red rivalry through adjusting a tone of the red color in the first image towards a brown color, converting the first image from the YCbCr domain back to the RGB domain, adjusting a color saturation in the first image, and combining the first image with the second image in a processor to generate an anaglyph image.
    Type: Application
    Filed: December 15, 2009
    Publication date: June 16, 2011
    Inventors: Santanu Dutta, Gerrit Ary Slavenburg, David R. Cook
  • Publication number: 20100201788
    Abstract: The present invention sets forth a method and system for mating a signal transmitting device and a viewing device. In one embodiment, the method includes determining presence of the signal transmitting device and the viewing device, selecting a unique code from a pre-determined group of codes assigned to the signal transmitting device, and sending the unique code to the viewing device for the viewing device to decipher data packets from the signal transmitting device.
    Type: Application
    Filed: February 6, 2009
    Publication date: August 12, 2010
    Inventors: David Yu-Li HO, Gerrit Ary SLAVENBURG, Andrei Victor RYLIN
  • Patent number: 6370623
    Abstract: A multiport register file includes a first file unit having registers of a first width and a second file unite having registers of a second width. The second width being less than the first width. The first file unit accommodates data destined to be operands for functional units of a VLIW processor, or result data from those functional units. The second file unit accommodates guard bits for conditioning operation of those functional units.
    Type: Grant
    Filed: December 30, 1994
    Date of Patent: April 9, 2002
    Assignee: Philips Electronics North America Corporation
    Inventors: Vijay K. Mehra, Gerrit Ary Slavenburg
  • Patent number: 6141675
    Abstract: Custom operations are useable in processor systems for performing functions including multimedia functions. These custom operations enhance a system, such as PC system, to provide real-time multimedia capabilities while maintaining advantages of a special-purpose, embedded solution, i.e., low cost and chip count, and advantages of a general-purpose processor reprogramability. These custom operations work in a computer system which supplies input data having at least two operand data, performs operations on the operand data, and supplies result data to a destination register.
    Type: Grant
    Filed: August 30, 1996
    Date of Patent: October 31, 2000
    Assignee: Philips Electronics North America Corporation
    Inventors: Gerrit Ary Slavenburg, Pieter van der Muelen, Yong H. Cho, Vijay K. Mehra, Yen C. Lee
  • Patent number: 6122722
    Abstract: Cost/performance of VLIW architecture is improved by reducing the number of slots in the instruction issue register.
    Type: Grant
    Filed: March 17, 1999
    Date of Patent: September 19, 2000
    Assignee: Philips Electronics North America Corporation
    Inventor: Gerrit Ary Slavenburg
  • Patent number: 6044451
    Abstract: Cost/performance of VLIW architecture is improved by reducing the number of slots in the instruction issue register.
    Type: Grant
    Filed: June 10, 1998
    Date of Patent: March 28, 2000
    Assignee: Philips Electronics North America Corporation
    Inventors: Gerrit Ary Slavenburg, Vijay K Mehra
  • Patent number: 6002880
    Abstract: A VLIW processor has less instruction issue slots than functional units. Operands and results for the operations specified by the instruction issue register are stored in a multiport register file. The multiport register file has numbers of read and write ports which are tied to the number of instruction issue slots rather than to the number of functional units. A write control unit controls transfer of results from functional units to the multiport register file to take into account instruction latency.
    Type: Grant
    Filed: March 3, 1997
    Date of Patent: December 14, 1999
    Assignee: Philips Electronics North America Corporation
    Inventor: Gerrit Ary Slavenburg
  • Patent number: 5978910
    Abstract: A circuit for processing a jump operation also enables handling pending interrupts or exceptions. The jump operation has an operand specifying a destination address. If an interrupt or exception is pending, a destination program counter is set to the contents of the operand. Then the program counter is set to an interrupt or exception handler address. If no interrupt or exception is pending, then the program counter is set to the destination address.
    Type: Grant
    Filed: January 20, 1998
    Date of Patent: November 2, 1999
    Assignee: Philips Electronics North America Corporation
    Inventor: Gerrit Ary Slavenburg
  • Patent number: 5963744
    Abstract: Custom operations are useable in processor systems for performing functions including multimedia functions. These custom operations enhance a system, such as PC system, to provide real-time multimedia capabilities while maintaining advantages of a special-purpose, embedded solution, i.e., low cost and chip count, and advantages of a general-purpose processor reprogramability. These custom operations work in a computer system which supplies input data having operand data, performs operations on the operand data, and supplies result data to a destination register. Operations performed may include audio and video processing including clipping or saturation operations. The present invention also performs parallel operations on select operand data from input registers and stores results in the destination register.
    Type: Grant
    Filed: April 30, 1997
    Date of Patent: October 5, 1999
    Assignee: Philips Electronics North America Corporation
    Inventors: Gerrit Ary Slavenburg, Pieter van der Meulen, Yong Cho, Vijay K. Mehra, Yen C. Lee
  • Patent number: 5862399
    Abstract: Cost/performance of VLIW architecture is improved by reducing the number of slots in the instruction issue register.
    Type: Grant
    Filed: September 17, 1996
    Date of Patent: January 19, 1999
    Assignee: Philips Electronics North America Corporation
    Inventors: Gerrit Ary Slavenburg, Vijay K. Mehra
  • Patent number: 5832202
    Abstract: A processing device performs operations in response to program instructions. In particular, values are written to a data memory of the system, which alters a defined visible state of the system. In the event of an exception (e.g. a pagefault or TLB miss in a virtual memory system), control returns to a recent checkpoint instruction after handling the exception, and instructions are re-executed. A record/replay circuit is provided in the form of an event memory, which remembers only those values read from the data memory since the last checkpoint. During the re-execution, the recorded values are reproduced instead of performing actual memory reads, and all memory accesses are suppressed. When the re-execution reaches the point where execution was originally interrupted, recording begins again to prepare for any further exception which may arise before the next checkpoint.
    Type: Grant
    Filed: December 16, 1994
    Date of Patent: November 3, 1998
    Assignee: U.S. Philips Corporation
    Inventors: Gerrit Ary Slavenburg, Junien Labrousse
  • Patent number: 5815701
    Abstract: Registers are divided into a global pool and a local pool. Code to be used in the processor must allocate registers from the global pool for values that live across decision trees and from the local pool for local values. The processor only accepts interrupts and exceptions during successful inter decision tree jumps. The code signals such jumps with special interruptable jump operations. To put a ceiling on clock cycles between interruptable jumps, each loop should have at least one successful interruptable jump and/or backwards jumps should be interruptable. The interrupt and exception handlers use only registers from the local pool. During a context switch, only contents of the global pool are saved in the task record.
    Type: Grant
    Filed: June 29, 1995
    Date of Patent: September 29, 1998
    Assignee: Philips Electronics North America Corporation
    Inventor: Gerrit Ary Slavenburg
  • Patent number: 5692139
    Abstract: A processing device includes an imitation multiport memory circuit (10) interconnecting inputs and outputs of a group of functional units (F1, . . . FN), all operating under control of a single series of very long program instructions. The memory circuit (10) comprises a plurality of separate memory units (15), each having a read port (12) connected to a respective functional unit input, and a crossbar switching circuit (18) connected between the functional unit outputs and write ports of the separate memory units. The memory circuit (10) provides substantially the same performance as a true multiport memory but requires a smaller circuit area, allowing a larger processing device to be integrated in one chip than previously. Collisions for access to a memory unit write port can be resolved without rescheduling by use of a delay element (21,70) and/or an additional write port (82) to a memory unit.
    Type: Grant
    Filed: April 19, 1995
    Date of Patent: November 25, 1997
    Assignee: North American Philips Corporation, Signetics Div.
    Inventors: Gerrit Ary Slavenburg, Jean-Michel Junien Labrousse