Abstract: Thinning and dicing substrates using inductively coupled plasma reactive ion etching (ICP RIE). When dicing, a hard photo-resist pattern or metal mask pattern that defines scribe lines is formed on a sapphire substrate or on a semiconductor epitaxial layer, beneficially by lithographic techniques. Then, the substrate is etched along the scribe lines to form etched channels. An etching gas comprised of BCl3 and/or BCl3/Cl2 gas is used (optionally, Ar can be added). Stress lines are then produced through the substrate along the etched channels. The substrate is then diced along the stress lines. When thinning, a surface of a substrate is subjected to inductively coupled plasma reactive ion etching (ICP RIE) using BCl3 and/or BCl3/Cl2 gas, possibly with some Ar. ICP RIE is particularly useful when working sapphire and other hard substrates.

Abstract: Thinning and dicing substrates using inductively coupled plasma reactive ion etching (ICP RIE). When dicing, a hard photo-resist pattern or metal mask pattern that defines scribe lines is formed on a sapphire substrate or on a semiconductor epitaxial layer, beneficially by lithographic techniques. Then, the substrate is etched along the scribe lines to form etched channels. An etching gas comprised of BCl3 and/or BCl3/Cl2 gas is used (optionally, Ar can be added). Stress lines are then produced through the substrate along the etched channels. The substrate is then diced along the stress lines. When thinning, a surface of a substrate is subjected to inductively coupled plasma reactive ion etching (ICP RIE) using BCl3 and/or BCl3/Cl2 gas, possibly with some Ar. ICP RIE is particularly useful when working sapphire and other hard substrates.

Abstract: Disclosed is an inductively coupled plasma processing apparatus for a large area processing. The inductively coupled plasma processing apparatus has a reaction chamber, a plurality of linear antennas horizontally arranged at an inner upper portion of the reaction chamber while being spaced from each other by a predetermined distance for receiving induced RF power, and at least one magnet positioned adjacent to the linear antennas for creating a magnetic field perpendicularly crossing an electric field created by the linear antennas in such a manner that electrons perform a spiral movement. The linear antennas are coupled to each other at an outer portion of the reaction chamber and include at least one bending antenna formed by connecting first ends of adjacent antennas, which are exposed to the outer portion of the reaction chamber, to each other. Selectively, the linear antennas include a plurality of first linear antennas and second antennas arranged between the first linear antennas.

Abstract: A cleaning method of an apparatus for manufacturing a semiconductor device includes providing a first cleaning gas and a second cleaning gas into a chamber, and forming a mixture of the first cleaning gas and the second cleaning gas, wherein the first cleaning gas includes a fluorocarbon gas and an oxygen gas and the second cleaning gas includes nitrogen, activating the mixture of the first cleaning gas and the second cleaning gas by a high frequency power, and exhausting residues cleaned by the activated mixture and remaining gases.

Abstract: Disclosed is an inductively coupled plasma processing apparatus having an internal antenna for large area processing and capable of improving plasma characteristics, such as plasma density and plasma uniformity while reducing plasma potential. The inductively coupled plasma processing apparatus has a plurality of linear antennas horizontally arranged at an inner upper portion of a reaction chamber while being spaced from each other by a predetermined distance and being connected to each other in series or in a row for receiving induced RF power and at least one magnet positioned adjacent to the linear antennas for creating a magnetic field perpendicularly crossing an electric field created by the linear antennas in such a manner that electrons perform a spiral movement.

Abstract: A method for fabricating a PDP is disclosed. The method for fabricating a PDP including the steps of preparing first and second panels for connecting with each other, forming at least one electrode on the first panel, forming a dielectric layer of PbO on the first panel, sequentially forming Cr and Ni on the PbO layer as a mask material of the PbO layer, performing photolithography and lift-off processes on the Ni/Cr layers to form a mask pattern of Ni/Cr, and etching the PbO layer using the mask pattern of Ni/Cr to form at least one capillary tube within the PbO layer to expose the electrode.

Abstract: A method and an apparatus for etching a semiconductor device which can perform an etching process without causing electrical and physical damages using a neutral beam generated by a simple apparatus. In the method, ions of an ion beam having a predetermined polarity are extracted from an ion source and accelerated. An accelerated ion beam is reflected by a reflector and neutralized. A substrate to be etched positioned in the path of the neutral beam in order to etch a special material layer on the substrate with the neutral beam. The gradient of the reflector is adjusted to control an angle of incidence of the ion beam incident on the reflector, and a voltage is applied to the reflector to control the path of an incident ion beam.

Abstract: A layer-by-layer etching apparatus and an etching method using a neutral beam which enables to control etching depth to an atomic level by controlling the etching of each atom of a material layer to be etched under precise control of the supply of an etching gas and irradiation of the neutral beam and enables to minimize etching damage. In the layer-by-layer etching method, a substrate to be etched, on which a layer to be etched is exposed, is loaded on a stage in a reaction chamber. An etching gas is supplied into the reaction chamber to adsorb the etching gas on the surface of an exposed portion of the layer to be etched. Excessive etching gas remaining after being adsorbed is removed. A neutral beam is irradiated on the layer to be etched on which the etching gas is adsorbed. Etch by-products generated by the irradiation of the neutral beam is removed.

Abstract: Thinning and dicing substrates using inductively coupled plasma reactive ion etching (ICP RIE). When dicing, a hard photo-resist pattern or metal mask pattern that defines scribe lines is formed on a sapphire substrate or on a semiconductor epitaxial layer, beneficially by lithographic techniques. Then, the substrate is etched along the scribe lines to form etched channels. An etching gas comprised of BCl3 and/or BCl3/Cl2 gas is used (optionally, Ar can be added). Stress lines are then produced through the substrate along the etched channels. The substrate is then diced along the stress lines. When thinning, a surface of a substrate is subjected to inductively coupled plasma reactive ion etching (ICP RIE) using BCl3 and/or BCl3/Cl2 gas, possibly with some Ar. ICP RIE is particularly useful when working sapphire and other hard substrates.

Abstract: A damage-free apparatus for etching the large area by using a neutral beam which can perform an etching process without causing electrical and physical damages by the use of the neutral beam is provided. The damage-free etching apparatus includes: an ion source for extracting and accelerating an ion beam having a predetermined polarity; a grid positioned at the rear of the ion source and having a plurality of grid holes through which the ion beam passes; a reflector closely attached to the grid and having a plurality of reflector holes corresponding to the grid holes in the grid, the reflector for reflecting the ion beam passed through the grid holes in the reflector holes and neutralizing the ion beam into a neutral beam; and a stage for placing a substrate to be etched in a path of the neutral beam.

Abstract: A layer-by-layer etching apparatus and an etching method using a neutral beam which enables to control etching depth to an atomic level by controlling the etching of each atom of a material layer to be etched under precise control of the supply of an etching gas and irradiation of the neutral beam and enables to minimize etching damage. In the layer-by-layer etching method, a substrate to be etched, on which a layer to be etched is exposed, is loaded on a stage in a reaction chamber. An etching gas is supplied into the reaction chamber to adsorb the etching gas on the surface of an exposed portion of the layer to be etched. Excessive etching gas remaining after being adsorbed is removed. A neutral beam is irradiated on the layer to be etched on which the etching gas is adsorbed. Etch by-products generated by the irradiation of the neutral beam is removed.

Abstract: A method of fabricating a plasma display panel having a substrate includes the steps of forming an electrode on the substrate, forming a dielectric layer on the substrate including the electrode, forming at least one capillary in the dielectric layer using dry-etching, wherein the capillary and the electrode are separated apart by a portion of the dielectric layer, and sequentially removing the portion of dielectric layer to expose the electrode through the capillary.

Abstract: A method and an apparatus for etching a semiconductor device which can perform an etching process without causing electrical and physical damages using a neutral beam generated by a simple apparatus. In the method, ions of an ion beam having a predetermined polarity are extracted from an ion source and accelerated. An accelerated ion beam is reflected by a reflector and neutralized. A substrate to be etched positioned in the path of the neutral beam in order to etch a special material layer on the substrate with the neutral beam. The gradient of the reflector is adjusted to control an angle of incidence of the ion beam incident on the reflector, and a voltage is applied to the reflector to control the path of an incident ion beam.

Abstract: A method for fabricating a PDP is disclosed. The method for fabricating a PDP comprising the steps of preparing first and second panels for connecting with each other, forming at least one electrode on the first panel, forming a dielectric layer of PbO on the first panel, sequentially forming Cr and Ni on the PbO layer as a mask material of the PbO layer, performing photolithography and lift-off processes on the Ni/Cr layers to form a mask pattern of Ni/Cr, and etching the PbO layer using the mask pattern of Ni/Cr to form at least one capillary tube within the PbO layer to expose the electrode.

Abstract: A field emission display and a method of fabricating the same are disclosed in the present invention. The field emission display includes a glass substrate, an electron emitter on the glass substrate, a first electrode on the electron emitter having a first hollow substantially on the center thereon, an insulating layer on the first electrode having a second hollow in the vicinity of the first hollow, and a second electrode on the insulating layer having a third hollow located over the first and second hollows.