Patents by Inventor Ghavam G. Shahidi

Ghavam G. Shahidi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190123230
    Abstract: A photovoltaic device and method include a substrate coupled to an emitter side structure on a first side of the substrate and a back side structure on a side opposite the first side of the substrate. The emitter side structure or the back side structure include layers alternating between wide band gap layers and narrow band gap layers to provide a multilayer contact with an effectively increased band offset with the substrate and/or an effectively higher doping level over a single material contact. An emitter contact is coupled to the emitter side structure on a light collecting end portion of the device. A back contact is coupled to the back side structure opposite the light collecting end portion.
    Type: Application
    Filed: December 12, 2018
    Publication date: April 25, 2019
    Inventors: Bahman Hekmatshoar-Tabari, Devendra K. Sadana, Ghavam G. Shahidi, Davood Shahrjerdi
  • Patent number: 10262991
    Abstract: The electrical device includes a plurality of fin structures, the plurality of fin structures including at least one decoupling fin and at least one semiconductor fin. Each of the plurality of fin structures having substantially a same geometry. The electrical device includes at least one semiconductor device including a channel region present in the at least one semiconductor fin, a gate structure present on the channel region of the at least one semiconductor fin, and source and drain regions present on source and drain region portion of the at least one semiconductor fin. The electrical device includes at least one decoupling capacitor including the decoupling fin structure as a first electrode of the decoupling capacitor, a node dielectric layer and a second electrode provided by the metal contact to the source and drain regions of the semiconductor fin structures, wherein the decoupling capacitor is present underlying the power line to the semiconductor fin structures.
    Type: Grant
    Filed: August 12, 2016
    Date of Patent: April 16, 2019
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Kangguo Cheng, Ali Khakifirooz, Darsen D. Lu, Ghavam G. Shahidi
  • Publication number: 20190109250
    Abstract: A multi-level photovoltaic cell comprises a substrate layer and a plurality of photovoltaic cells positioned above the substrate layer. Each photovoltaic cell has a top contact layer and a bottom contact layer connected in series such that the top contact layer of the first photovoltaic cell is connected to the bottom contact layer of a next photovoltaic cell until the last photovoltaic cell is connected. A different voltage is output between the substrate layer and the top contact layer of each photovoltaic cell. Another multi-level photovoltaic cell comprises a substrate layer and a plurality of photovoltaic cells stacked vertically above the substrate layer. Each photovoltaic cell comprises an active layer separated from the next photovoltaic cell by an etch stop layer until a last photovoltaic cell is reached. A different voltage is output between the substrate layer and the active layer of each photovoltaic cell.
    Type: Application
    Filed: October 5, 2017
    Publication date: April 11, 2019
    Inventors: Ning LI, Devendra SADANA, Ghavam G. SHAHIDI, Chitra K. SUBRAMANIAN
  • Patent number: 10256357
    Abstract: A method for fabricating a device with integrated photovoltaic cells includes supporting a semiconductor substrate on a first handle substrate and doping the semiconductor substrate to form doped alternating regions with opposite conductivity. A doped layer is formed over a first side the semiconductor substrate. A conductive material is patterned over the doped layer to form conductive islands such that the conductive islands are aligned with the alternating regions to define a plurality of photovoltaic cells connected in series on a monolithic structure.
    Type: Grant
    Filed: November 14, 2017
    Date of Patent: April 9, 2019
    Assignee: International Business Machines Corporation
    Inventors: Stephen W. Bedell, Bahman Hekmatshoartabari, Devendra K. Sadana, Ghavam G. Shahidi, Davood Shahrjerdi
  • Patent number: 10256365
    Abstract: A method of forming an electrical device that includes epitaxially growing a first conductivity type semiconductor material of a type III-V semiconductor on a semiconductor substrate. The first conductivity type semiconductor material continuously extending along an entirety of the semiconductor substrate in a plurality of triangular shaped islands; and conformally forming a layer of type III-V semiconductor material having a second conductivity type on the plurality of triangular shaped islands to provide a textured surface of a photovoltaic device. A light emitting diode is formed on the textured surface of the photovoltaic device.
    Type: Grant
    Filed: April 9, 2018
    Date of Patent: April 9, 2019
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Stephen W. Bedell, Ning Li, Devendra K. Sadana, Ghavam G. Shahidi
  • Patent number: 10249782
    Abstract: An electrical device that includes a material stack present on a supporting substrate. An LED is present in a first end of the material stack having a first set of bandgap materials. A photovoltaic device is present in a second end of the material stack having a second set of bandgap materials. The first end of the material stack being a light receiving end, wherein a widest bandgap material for the first set of bandgap material is greater than a highest bandgap material for the second set of bandgap materials. A zinc oxide interface layer is present between the LED and the photovoltaic device. The zinc oxide layers or can also form a LED.
    Type: Grant
    Filed: March 24, 2017
    Date of Patent: April 2, 2019
    Assignee: International Business Machines Corporation
    Inventors: Stephen W. Bedell, Ning Li, Devendra K. Sadana, Ghavam G. Shahidi
  • Patent number: 10249783
    Abstract: An electrical device that includes a material stack present on a supporting substrate. An LED is present in a first end of the material stack having a first set of bandgap materials. A photovoltaic device is present in a second end of the material stack having a second set of bandgap materials. The first end of the material stack being a light receiving end, wherein a widest bandgap material for the first set of bandgap material is greater than a highest bandgap material for the second set of bandgap materials. A zinc oxide interface layer is present between the LED and the photovoltaic device. The zinc oxide layers or can also form a LED.
    Type: Grant
    Filed: December 5, 2017
    Date of Patent: April 2, 2019
    Assignee: International Business Machines Corporation
    Inventors: Stephen W. Bedell, Ning Li, Devendra K. Sadana, Ghavam G. Shahidi
  • Publication number: 20190092083
    Abstract: The present invention provides a method and a structure of electrical component assembly on flexible materials. In an exemplary embodiment, the method and the structure include patterning metal on a tape, creating one or more holes in the tape, attaching one or more electronic devices to the tape in the one or more holes such that a profile of the tape and the one or more electronic devices is less than a threshold, electrically connecting the one or more electronic devices to the patterned metal, cutting the tape, resulting in one or more component portions of the tape and one or more excess portions of the tape, where the one or more component portions comprises at least one of the one or more electronic devices, attached to the patterned metal, and bonding the one or more component portions to a ribbon.
    Type: Application
    Filed: September 25, 2017
    Publication date: March 28, 2019
    Inventors: Frank R. Libsch, Ghavam G. Shahidi
  • Patent number: 10224430
    Abstract: A method for manufacturing a semiconductor device includes forming a semiconductor layer on an insulating layer, epitaxially growing a first layer on the semiconductor layer, wherein the first layer has a first doping concentration, epitaxially growing a second layer on the semiconductor layer, wherein the second layer has a second doping concentration higher than the first doping concentration, forming a gate dielectric over an active region of the semiconductor layer, forming a gate electrode on the gate dielectric, and forming a plurality of source/drain contacts to the second layer, wherein the first and second layers comprise crystalline hydrogenated silicon (c-Si:H).
    Type: Grant
    Filed: December 6, 2017
    Date of Patent: March 5, 2019
    Assignee: International Business Machines Corporation
    Inventors: Bahman Hekmatshoartabari, Ghavam G. Shahidi, Marinus P. J. Hopstaken
  • Patent number: 10199524
    Abstract: Photovoltaic devices such as solar cells having one or more field-effect hole or electron inversion/accumulation layers as contact regions are configured such that the electric field required for charge inversion and/or accumulation is provided by the output voltage of the photovoltaic device or that of an integrated solar cell unit. In some embodiments, a power source may be connected between a gate electrode and a contact region on the opposite side of photovoltaic device. In other embodiments, the photovoltaic device or integrated unit is self-powering.
    Type: Grant
    Filed: January 13, 2012
    Date of Patent: February 5, 2019
    Assignee: International Business Machines Corporation
    Inventors: Bahman Hekmatshoartabari, Devendra K. Sadana, Wilfried E. Haensch, Ghavam G. Shahidi, Davood Shahrjerdi
  • Patent number: 10177266
    Abstract: A photovoltaic device and method include a substrate coupled to an emitter side structure on a first side of the substrate and a back side structure on a side opposite the first side of the substrate. The emitter side structure or the back side structure include layers alternating between wide band gap layers and narrow band gap layers to provide a multilayer contact with an effectively increased band offset with the substrate and/or an effectively higher doping level over a single material contact. An emitter contact is coupled to the emitter side structure on a light collecting end portion of the device. A back contact is coupled to the back side structure opposite the light collecting end portion.
    Type: Grant
    Filed: December 22, 2015
    Date of Patent: January 8, 2019
    Assignee: International Business Machines Corporation
    Inventors: Bahman Hekmatshoar-Tabari, Devendra K. Sadana, Ghavam G. Shahidi, Davood Shahrjerdi
  • Patent number: 10170361
    Abstract: The present disclosure relates to integrated circuits and to methods of manufacturing interconnects of integrated circuits. For example, an integrated circuit includes a surface of the integrated circuit and an interconnect formed on the surface and comprising a metal. An average grain size of the metal of the interconnect is greater than or equal to at least half of a line width of the interconnect. In another example, a method for manufacturing an interconnect of an integrated circuit includes depositing a layer of a metal onto a surface of the integrated circuit, annealing the metal, patterning a first hard mask for placement over the metal and forming a line of the interconnect and a first via of the interconnect by performing a timed etch of the metal using the first hard mask.
    Type: Grant
    Filed: May 28, 2014
    Date of Patent: January 1, 2019
    Assignee: International Business Machines Corporation
    Inventors: Robert L Bruce, Cyril Cabral, Jr., Gregory M Fritz, Eric A Joseph, Michael F Lofaro, Hiroyuki Miyazoe, Kenneth P Rodbell, Ghavam G Shahidi
  • Patent number: 10141461
    Abstract: A method for forming a multi-junction photovoltaic device includes providing a germanium layer and etching pyramidal shapes in the germanium layer such that (111) facets are exposed to form a textured surface. A first p-n junction is formed on or over the textured surface from III-V semiconductor materials. Another p-n junction is formed over the first p-n junction from III-V semiconductor materials and follows the textured surface.
    Type: Grant
    Filed: July 13, 2015
    Date of Patent: November 27, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Bahman Hekmatshoartabari, Ali Khakifirooz, Ghavam G. Shahidi, Davood Shahrjerdi
  • Publication number: 20180331052
    Abstract: A method of forming a semiconductor detector including: forming a p-n junction diode in an active device layer of a silicon-on-insulator (SOI) substrate, the active device layer being formed on an insulator layer of the SOI substrate; forming a first opening through the insulator layer to access a backside of a first doped region of the diode, the first doped region underlying a second doped region of the diode; forming a back contact on a back surface of the first doped region and electrically connecting with the first doped region; forming a conductive interconnect layer on an upper surface of the SOI substrate, the interconnect layer including a first top contact providing electrical connection with the second doped region; and forming an electrode in the first opening on the backside of the detector structure, the electrode providing electrical connection with the back contact of the diode.
    Type: Application
    Filed: July 11, 2018
    Publication date: November 15, 2018
    Inventors: Bahman Hekmatshoartabari, Ghavam G. Shahidi
  • Publication number: 20180331158
    Abstract: A photovoltaic device including a photovoltaic cell and method of use is disclosed. The photovoltaic cell includes at least a first photovoltaic layer and a second photovoltaic layer arranged in a stack. The first photovoltaic layer has a first thickness and receives light at its top surface. A second photovoltaic layer has a second thickness and is disposed beneath the first photovoltaic layer and receives light passing through the first photovoltaic layer. The first thickness and the second thickness are selected so that a first light absorption at the first photovoltaic layer is equal to a second light absorption at the second photovoltaic layer. The photovoltaic cell is irradiated at its top surface with monochromatic light to generate a current.
    Type: Application
    Filed: November 15, 2017
    Publication date: November 15, 2018
    Inventors: Stephen W. Bedell, Ning Li, Qinglong Li, Kunal Mukherjee, Devendra Sadana, Ghavam G. Shahidi
  • Publication number: 20180331157
    Abstract: A photovoltaic device including a photovoltaic cell and method of use is disclosed. The photovoltaic cell includes at least a first photovoltaic layer and a second photovoltaic layer arranged in a stack. The first photovoltaic layer has a first thickness and receives light at its top surface. A second photovoltaic layer has a second thickness and is disposed beneath the first photovoltaic layer and receives light passing through the first photovoltaic layer. The first thickness and the second thickness are selected so that a first light absorption at the first photovoltaic layer is equal to a second light absorption at the second photovoltaic layer. The photovoltaic cell is irradiated at its top surface with monochromatic light to generate a current.
    Type: Application
    Filed: May 15, 2017
    Publication date: November 15, 2018
    Inventors: Stephen W. Bedell, Ning Li, Qinglong Li, Kunal Mukherjee, Devendra Sadana, Ghavam G. Shahidi
  • Patent number: 10128452
    Abstract: Junction field-effect transistors including inorganic channels and organic gate junctions are used in some applications for forming high resolution active matrix displays. Arrays of such junction field-effect transistors are electrically connected to thin film switching transistors and provide high drive currents for passive devices such as organic light emitting diodes.
    Type: Grant
    Filed: March 1, 2017
    Date of Patent: November 13, 2018
    Assignee: International Business Machines Corporation
    Inventors: Ali Afzali-Ardakani, Tze-Chiang Chen, Bahman Hekmatshoartabari, Ghavam G. Shahidi
  • Publication number: 20180323330
    Abstract: A photovoltaic device that includes an upper cell that absorbs a first range of wavelengths of light and a bottom cell that absorbs a second range of wavelengths of light. The bottom cell includes a heterojunction comprising a crystalline germanium containing (Ge) layer. At least one surface of the crystalline germanium (Ge) containing layer is in contact with a silicon (Si) containing layer having a larger band gap than the crystalline (Ge) containing layer.
    Type: Application
    Filed: July 13, 2018
    Publication date: November 8, 2018
    Inventors: Keith E. Fogel, Bahman Hekmatshoartabari, Devendra K. Sadana, Ghavam G. Shahidi, Davood Shahrjerdi
  • Publication number: 20180323319
    Abstract: A photovoltaic device that includes a p-n junction of first type III-V semiconductor material layers, and a window layer of a second type III-V semiconductor material on the light receiving end of the p-n junction, wherein the second type III-V semiconductor material has a greater band gap than the first type III-V semiconductor material, and the window layer of the photovoltaic device has a cross-sectional area of microscale.
    Type: Application
    Filed: May 3, 2017
    Publication date: November 8, 2018
    Inventors: Talia S. Gershon, Ning Li, Devendra K. Sadana, Ghavam G. Shahidi
  • Patent number: 10121786
    Abstract: In one aspect, a method of forming finFET devices is provided which includes patterning fins in a wafer; forming dummy gates over the fins; forming spacers on opposite sides of the dummy gates; depositing a gap fill oxide on the wafer, filling any gaps between the spacers; removing the dummy gates forming gate trenches; trimming the fins within the gate trenches such that a width of the fins within the gate trenches is less than the width of the fins under the spacers adjacent to the gate trenches, wherein u-shaped grooves are formed in sides of the fins within the gate trenches; and forming replacement gate stacks in the gate trenches, wherein portions of the fins adjacent to the replacement gate stacks serve as source and drain regions of the finFET devices.
    Type: Grant
    Filed: March 20, 2017
    Date of Patent: November 6, 2018
    Assignee: International Business Machines Corporation
    Inventors: Takashi Ando, Robert H. Dennard, Isaac Lauer, Ramachandran Muralidhar, Ghavam G. Shahidi