Patents by Inventor Gilroy J. Vandentop

Gilroy J. Vandentop has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9508675
    Abstract: A method of fabricating a microelectronic package having a direct contact heat spreader, a package formed according to the method, a die-heat spreader combination formed according to the method, and a system incorporating the package. The method comprises metallizing a backside of a microelectronic die to form a heat spreader body directly contacting and fixed to the backside of the die thus yielding a die-heat spreader combination. The package includes the die-heat spreader combination and a substrate bonded to the die.
    Type: Grant
    Filed: August 22, 2013
    Date of Patent: November 29, 2016
    Assignee: Intel Corporation
    Inventors: Daoqiang Lu, Chuan Hu, Gilroy J. Vandentop, Shriram Ramanathan, Rajashree Baskaran, Valery M. Dubin
  • Publication number: 20130344659
    Abstract: A method of fabricating a microelectronic package having a direct contact heat spreader, a package formed according to the method, a die-heat spreader combination formed according to the method, and a system incorporating the package. The method comprises metallizing a backside of a microelectronic die to form a heat spreader body directly contacting and fixed to the backside of the die thus yielding a die-heat spreader combination. The package includes the die-heat spreader combination and a substrate bonded to the die.
    Type: Application
    Filed: August 22, 2013
    Publication date: December 26, 2013
    Inventors: Daoqiang Lu, Chuan Hu, Gilroy J. Vandentop, Shriram Ramanathan, Rajashree Baskaran, Valery M. Dubin
  • Patent number: 8541876
    Abstract: A method of fabricating a microelectronic package having a direct contact heat spreader, a package formed according to the method, a die-heat spreader combination formed according to the method, and a system incorporating the package. The method comprises metallizing a backside of a microelectronic die to form a heat spreader body directly contacting and fixed to the backside of the die thus yielding a die-heat spreader combination. The package includes the die-heat spreader combination and a substrate bonded to the die.
    Type: Grant
    Filed: September 30, 2005
    Date of Patent: September 24, 2013
    Assignee: Intel Corporation
    Inventors: Daoqiang Lu, Chuan Hu, Gilroy J. Vandentop, Shriram Ramanathan, Rajashree Baskaran, Valery M. Dubin
  • Patent number: 7826694
    Abstract: An electro-optic semiconductor package and fabrication method provides enhanced performance. An integrated circuit (IC) having one or more IC contact pads is provided, where the IC contact pads are connected to an IC on the IC wafer. An intermediate wafer having one or more intermediate contact pads is provided, where the intermediate contact pads are connected to an electro-optic arrangement on the intermediate wafer. The method further provides for direct copper bonding the IC contact pads to adjacent intermediate contact pads such that an electro-optic semiconductor package results.
    Type: Grant
    Filed: December 13, 2007
    Date of Patent: November 2, 2010
    Assignee: Intel Corporation
    Inventors: Gilroy J. Vandentop, Jun-Fei Zheng
  • Patent number: 7821073
    Abstract: Some embodiments of the present invention include selectively inducing back side stress opposite transistor regions to optimize transistor performance.
    Type: Grant
    Filed: April 3, 2008
    Date of Patent: October 26, 2010
    Assignee: Intel Corporation
    Inventors: Gilroy J. Vandentop, Rajashree Baskaran
  • Patent number: 7703991
    Abstract: An optical connector comprises a housing having a cavity extending there through to accept a mating connector. The connector comprises no optical components. Dummy solder bonding pads positioned on the connector allow the connector to be automated flip-chip bonded over a substrate waveguide.
    Type: Grant
    Filed: May 6, 2005
    Date of Patent: April 27, 2010
    Assignee: Intel Corporation
    Inventors: Daoqiang Lu, Gilroy J. Vandentop, Henning Braunisch
  • Patent number: 7569426
    Abstract: A die package and a method and apparatus for integrating an electro-osmotic pump and a microchannel cooling assembly into a die package.
    Type: Grant
    Filed: March 26, 2007
    Date of Patent: August 4, 2009
    Assignee: Intel Corporation
    Inventors: Alan M. Myers, R. Scott List, Gilroy J. Vandentop
  • Publication number: 20080237729
    Abstract: Some embodiments of the present invention include selectively inducing back side stress opposite transistor regions to optimize transistor performance.
    Type: Application
    Filed: April 3, 2008
    Publication date: October 2, 2008
    Inventors: Gilroy J. Vandentop, Rajashree Baskaran
  • Patent number: 7371630
    Abstract: Some embodiments of the present invention include selectively inducing back side stress opposite transistor regions to optimize transistor performance.
    Type: Grant
    Filed: September 24, 2004
    Date of Patent: May 13, 2008
    Assignee: Intel Corporation
    Inventors: Gilroy J. Vandentop, Rajashree Baskaran
  • Patent number: 7359591
    Abstract: An electro-optic semiconductor package and fabrication method provides enhanced performance. An integrated circuit (IC) having one or more IC contact pads is provided, where the IC contact pads are connected to an IC on the IC wafer. An intermediate wafer having one or more intermediate contact pads is provided, where the intermediate contact pads are connected to an electro-optic arrangement on the intermediate wafer. The method further provides for direct copper bonding the IC contact pads to adjacent intermediate contact pads such that an electro-optic semiconductor package results.
    Type: Grant
    Filed: July 14, 2006
    Date of Patent: April 15, 2008
    Assignee: Intel Corporation
    Inventors: Gilroy J. Vandentop, Jun-Fei Zheng
  • Patent number: 7355277
    Abstract: A die package and a method and apparatus for integrating an electro-osmotic pump and a microchannel cooling assembly into a die package.
    Type: Grant
    Filed: December 31, 2003
    Date of Patent: April 8, 2008
    Assignee: Intel Corporation
    Inventors: Alan M. Myers, R. Scott List, Gilroy J. Vandentop
  • Patent number: 7330357
    Abstract: A system may include a plurality of pliant conductive elements, a first end of one of the plurality of pliant conductive elements to be electrically coupled to a first electrical contact of an integrated circuit substrate and a second end of the one of the plurality of pliant conductive elements to be electrically coupled to a second electrical contact of an integrated circuit die.
    Type: Grant
    Filed: September 22, 2003
    Date of Patent: February 12, 2008
    Assignee: Intel Corporation
    Inventors: Gilroy J. Vandentop, Hamid R. Azimi
  • Patent number: 7236666
    Abstract: Optical apparatus, methods of forming the apparatus, and methods of using the apparatus are disclosed herein. In one aspect, an optical apparatus may include a substrate, an on-substrate microlens coupled with the substrate to receive light from an off-substrate light emitter and focus the light toward a focal point, and an on-substrate optical device coupled with the substrate proximate the focal point to receive the focused light. Communication of light in the reverse direction is also disclosed. Systems including the optical apparatus are also disclosed.
    Type: Grant
    Filed: September 30, 2004
    Date of Patent: June 26, 2007
    Assignee: Intel Corporation
    Inventors: Anna George, legal representative, Henning Braunisch, Daoqiang Lu, Gilroy J. Vandentop, Steven Towle, deceased
  • Patent number: 7063268
    Abstract: Embodiments of the invention provide one or more valves in which an electroactive material acts to open or close the valves to increase efficiency of a pump, which may be a pump that uses an electroactive diaphragm to pump fluid. The valves and pump may pump fluid to cool a device in a system.
    Type: Grant
    Filed: June 21, 2004
    Date of Patent: June 20, 2006
    Assignee: Intel Corporation
    Inventors: Gregory M. Chrysler, Gilroy J. Vandentop
  • Publication number: 20040188811
    Abstract: An apparatus and system, as well as methods for providing them, may include a die having a core circuit electrically coupled to a power converter included in an active substrate.
    Type: Application
    Filed: March 24, 2003
    Publication date: September 30, 2004
    Applicant: Intel Corporation
    Inventors: Gilroy J. Vandentop, Rajendran Nair
  • Patent number: 6792179
    Abstract: An optical or optoelectroronic component is mounted to a substrate, and an optical thumbtack is inserted into a through-hole of the substrate. The optical thumbtack is positioned to receive light from or send light to the optical or optoelectronic component and provide a conditioned, for example collimated or focused, beam. The optical thumbtack comprises a lens portion, a spacer portion, and a foot portion. Light may enter the thumbtack from either direction.
    Type: Grant
    Filed: December 31, 2002
    Date of Patent: September 14, 2004
    Assignee: Intel Corporation
    Inventors: Daoqiang Lu, Gilroy J. Vandentop, Steven N. Towle, Henning Braunisch
  • Publication number: 20040126058
    Abstract: An optical or optoelectronic component is mounted to a substrate, and an optical thumbtack is inserted into a through-hole of the substrate. The optical thumbtack is positioned to receive light from or send light to the optical or optoelectronic component and provide a conditioned, for example collimated or focused, beam. The optical thumbtack comprises a lens portion, a spacer portion, and a foot portion. Light may enter the thumbtack from either direction.
    Type: Application
    Filed: December 31, 2002
    Publication date: July 1, 2004
    Inventors: Daoqiang Lu, Gilroy J. Vandentop, Steven N. Towle, Henning Braunisch
  • Publication number: 20040126064
    Abstract: One or more optical or optoelectronic components are mounted to one or more substrates/boards, and an optical assembly is inserted into one or more through-holes in the one or more substrates/boards. The optical assembly is positioned to receive light from or send light to the optical or optoelectronic components and provide a conditioned, for example collimated or focused, beam. The optical assembly comprises at least one lens portion, spacer portion, coupler portion, and a waveguide.
    Type: Application
    Filed: December 31, 2002
    Publication date: July 1, 2004
    Inventors: Gilroy J. Vandentop, Henning Braunisch, Steven N. Towle, Daoqiang Lu
  • Patent number: 6717066
    Abstract: To accommodate thermal stresses arising from different coefficients of thermal expansion (CTE) of a packaged or unpackaged die and a substrate, the package incorporates two or more different interconnect zones. A first interconnect zone, located in a central region of the die, employs a relatively stiff interconnect structure. A second interconnect zone, located near the periphery of the die, employs a relatively compliant interconnect structure. Additional interconnect zones, situated between the first and second interconnect zones and having interconnect structure with compliance qualities intermediate those of the first and second zones, can optionally be employed. In one embodiment, solder connections providing low electrical resistance are used in the first interconnect zone, and compliant connections, such as nanosprings, are used in the second interconnect zone.
    Type: Grant
    Filed: November 30, 2001
    Date of Patent: April 6, 2004
    Assignee: Intel Corporation
    Inventors: Gilroy J. Vandentop, Yuan-Liang Li
  • Publication number: 20030113947
    Abstract: An electro-optic semiconductor package and fabrication method provides enhanced performance. An integrated circuit (IC) having one or more IC contact pads is provided, where the IC contact pads are connected to an IC on the IC wafer. An intermediate wafer having one or more intermediate contact pads is provided, where the intermediate contact pads are connected to an electro-optic arrangement on the intermediate wafer. The method further provides for direct copper bonding the IC contact pads to adjacent intermediate contact pads such that an electro-optic semiconductor package results.
    Type: Application
    Filed: December 19, 2001
    Publication date: June 19, 2003
    Inventors: Gilroy J. Vandentop, Jun-Fei Zheng