Patents by Inventor Gita Koblents

Gita Koblents has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11762677
    Abstract: Vectorization and scalarization of methods are provided. A plurality of node webs is constructed based on traversing an intermediate representation of a program. Transitive closure of the plurality of node webs is performed to form a set of final node webs. It is determined that each respective node in the set of final node webs can be converted into one of vector operation code or a sequence of scalar operation codes based on at least one node including a specified vector length and only one vector length value being specified within the set of final node webs. Each respective node in the set of final node webs is converted into one of corresponding vector operation code or a corresponding sequence of scalar operation codes to accelerate execution of supported and unsupported methods of the program.
    Type: Grant
    Filed: April 22, 2022
    Date of Patent: September 19, 2023
    Assignee: International Business Machines Corporation
    Inventors: Gita Koblents, Vijay Sundaresan
  • Patent number: 10929161
    Abstract: A method, computer program product, and system includes a processor(s) obtaining, during runtime, from a compiler, two versions of a data parallel loop for an operation. The host computing system comprises includes a CPU and a GPU is accessible to the host. The processor(s) online profiles the two versions by asynchronously executing the first version, in a profile mode, with the GPU and executing the second version, in the profile mode, with the CPU. The processor(s) generates execution times for the first version and the second version. The processor(s) stores the executions times and performance data in a storage, where the performance data comprises a size of the data parallel loop for the operation. The processor(s) update a regression model(s) to predict performance numbers for a process of an unknown loop size. The processor(s) execute the operation with the CPU or the GPU based on the performance data.
    Type: Grant
    Filed: August 27, 2019
    Date of Patent: February 23, 2021
    Assignee: International Business Machines Corporation
    Inventors: Gita Koblents, Alon Shalev Housfater, Kazuaki Ishizaki, Akihiro Hayashi
  • Patent number: 10540194
    Abstract: A method, computer program product, and system includes a processor(s) obtaining, during runtime, from a compiler, two versions of a data parallel loop for an operation. The host computing system comprises includes a CPU and a GPU is accessible to the host. The processor(s) online profiles the two versions by asynchronously executing the first version, in a profile mode, with the GPU and executing the second version, in the profile mode, with the CPU. The processor(s) generates execution times for the first version and the second version. The processor(s) stores the executions times and performance data in a storage, where the performance data comprises a size of the data parallel loop for the operation. The processor(s) update a regression model(s) to predict performance numbers for a process of an unknown loop size. The processor(s) execute the operation with the CPU or the GPU based on the performance data.
    Type: Grant
    Filed: December 21, 2017
    Date of Patent: January 21, 2020
    Assignee: International Business Machines Corporation
    Inventors: Gita Koblents, Alon Shalev Housfater, Kazuaki Ishizaki, Akihiro Hayashi
  • Publication number: 20190384623
    Abstract: A method, computer program product, and system includes a processor(s) obtaining, during runtime, from a compiler, two versions of a data parallel loop for an operation. The host computing system comprises includes a CPU and a GPU is accessible to the host. The processor(s) online profiles the two versions by asynchronously executing the first version, in a profile mode, with the GPU and executing the second version, in the profile mode, with the CPU. The processor(s) generates execution times for the first version and the second version. The processor(s) stores the executions times and performance data in a storage, where the performance data comprises a size of the data parallel loop for the operation. The processor(s) update a regression model(s) to predict performance numbers for a process of an unknown loop size. The processor(s) execute the operation with the CPU or the GPU based on the performance data.
    Type: Application
    Filed: August 27, 2019
    Publication date: December 19, 2019
    Inventors: Gita Koblents, Alon Shalev Housfater, Kazuaki Ishizaki, Akihiro Hayashi
  • Publication number: 20190196853
    Abstract: A method, computer program product, and system includes a processor(s) obtaining, during runtime, from a compiler, two versions of a data parallel loop for an operation. The host computing system comprises includes a CPU and a GPU is accessible to the host. The processor(s) online profiles the two versions by asynchronously executing the first version, in a profile mode, with the GPU and executing the second version, in the profile mode, with the CPU. The processor(s) generates execution times for the first version and the second version. The processor(s) stores the executions times and performance data in a storage, where the performance data comprises a size of the data parallel loop for the operation. The processor(s) update a regression model(s) to predict performance numbers for a process of an unknown loop size. The processor(s) execute the operation with the CPU or the GPU based on the performance data.
    Type: Application
    Filed: December 21, 2017
    Publication date: June 27, 2019
    Inventors: Gita Koblents, Alon Shalev Housfater, Kazuaki Ishizaki, Akihiro Hayashi