Patents by Inventor Graham Alan Chapman
Graham Alan Chapman has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11188316Abstract: An embodiment includes executing a code interpretation engine such that the interpretation engine interprets a first portion of a source code that includes a first comparison between a first pair of operands. The embodiment also includes performing, in memory, a first bitwise comparison between a block A1 and a block B1 of the first portion of the source code. The embodiment also speeds up execution of the first portion of the source code responsive to the first bitwise comparison producing a negative result. The embodiment speeds up the first portion by omitting at least one of (i) a second bitwise comparison between a block A2 and a block B2, and (ii) a field-wise comparison between a block A3 and a block B3.Type: GrantFiled: March 9, 2020Date of Patent: November 30, 2021Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Oluwatobi Ajila, Andrew James Craik, Daniel Heidinga, Graham Alan Chapman
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Patent number: 11150915Abstract: During verification of a bytecode, when a second class remains to be loaded for verification in an MRE, a verifier in the MRE is prevented from loading the second class, where the bytecode includes a relationship between a first class and the second class. The relationship is recorded and the verifier is caused to omit a loading operation on the second class. An execution is started of an application encoded in the bytecode. The second class is caused to be loaded and verified prior to a use of the second class during the execution.Type: GrantFiled: September 13, 2019Date of Patent: October 19, 2021Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Daniel Heidinga, Sharon Wang, Oluwatobi Adeoye Ajila, Graham Alan Chapman
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Publication number: 20210279044Abstract: An embodiment includes executing a code interpretation engine such that the interpretation engine interprets a first portion of a source code that includes a first comparison between a first pair of operands. The embodiment also includes performing, in memory, a first bitwise comparison between a block A1 and a block B1 of the first portion of the source code. The embodiment also speeds up execution of the first portion of the source code responsive to the first bitwise comparison producing a negative result. The embodiment speeds up the first portion by omitting at least one of (i) a second bitwise comparison between a block A2 and a block B2, and (ii) a field-wise comparison between a block A3 and a block B3.Type: ApplicationFiled: March 9, 2020Publication date: September 9, 2021Applicant: International Business Machines CorporationInventors: Oluwatobi Ajila, Andrew James Craik, Daniel Heidinga, Graham Alan Chapman
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Publication number: 20210081220Abstract: During verification of a bytecode, when a second class remains to be loaded for verification in an MRE, a verifier in the MRE is prevented from loading the second class, where the bytecode includes a relationship between a first class and the second class. The relationship is recorded and the verifier is caused to omit a loading operation on the second class. An execution is started of an application encoded in the bytecode. The second class is caused to be loaded and verified prior to a use of the second class during the execution.Type: ApplicationFiled: September 13, 2019Publication date: March 18, 2021Applicant: International Business Machines CorporationInventors: Daniel Heidinga, Sharon Wang, Oluwatobi Adeoye Ajila, Graham Alan Chapman
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Patent number: 10936290Abstract: A computer-implemented method includes: selecting, by a computer device, a set of fields in a program which are marked as final fields to be treated as constants; adding, by the computer device, detection logic to the program, the detection logic including a process that detects writes to the final fields to be treated as constants; compiling, by the computer device, the program into compiled code; executing, by the computer device, the compiled code; detecting, by the computer device, a write to a first one of the final fields to be treated as constants; and transitioning, by the computer device, execution of the compiled code from the compiled code to an interpreter for processing by compensation code that operates on the first one of the final fields to be treated as constants.Type: GrantFiled: November 29, 2018Date of Patent: March 2, 2021Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Andrew James Craik, Nicholas James Coughlin, Graham Alan Chapman, Daniel Heidinga
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Publication number: 20200174763Abstract: A computer-implemented method includes: selecting, by a computer device, a set of fields in a program which are marked as final fields to be treated as constants; adding, by the computer device, detection logic to the program, the detection logic including a process that detects writes to the final fields to be treated as constants; compiling, by the computer device, the program into compiled code; executing, by the computer device, the compiled code; detecting, by the computer device, a write to a first one of the final fields to be treated as constants; and transitioning, by the computer device, execution of the compiled code from the compiled code to an interpreter for processing by compensation code that operates on the first one of the final fields to be treated as constants.Type: ApplicationFiled: November 29, 2018Publication date: June 4, 2020Inventors: Andrew James CRAIK, Nicholas James COUGHLIN, Graham Alan CHAPMAN, Daniel HEIDINGA
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Patent number: 9389843Abstract: A method for obtaining accurate call path information in a mixed-mode environment where interpreted methods and non-interpreted methods can call one another is disclosed. In one embodiment, such a method includes generating an event and recording it in a buffer when an interpreted method calls an interpreted method. The method also generates an event and records it in the buffer when an interpreted method calls a non-interpreted method. The method further generates an event and records it in the buffer when a non-interpreted method calls an interpreted method. The method refrains from generating an event when a non-interpreted method calls a non-interpreted method. A corresponding apparatus and computer program product are also disclosed.Type: GrantFiled: March 15, 2013Date of Patent: July 12, 2016Assignee: International Business Machines CorporationInventors: Graham Alan Chapman, James Ian Andrew Gartley, Daniel Jonathan Heidinga, Vijay Sundaresan
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Patent number: 8099723Abstract: A method, apparatus, and computer instructions for referencing a constant pool. A determination is made as to whether a bytecode references the constant pool. A relative offset to the constant pool is identified for the bytecode, in response to the bytecode referencing the constant pool. The bytecode is then replaced with a new bytecode containing the relative offset. The relative offset is used to reference the constant pool.Type: GrantFiled: April 3, 2008Date of Patent: January 17, 2012Assignee: International Business Machines CorporationInventors: Peter Wiebe Burka, Graham Alan Chapman, Trent A. Gray-Donald, Karl Michael Taylor
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Publication number: 20080189691Abstract: A method, apparatus, and computer instructions for referencing a constant pool. A determination is made as to whether a bytecode references the constant pool. A relative offset to the constant pool is identified for the bytecode, in response to the bytecode referencing the constant pool. The bytecode is then replaced with a new bytecode containing the relative offset. The relative offset is used to reference the constant pool.Type: ApplicationFiled: April 3, 2008Publication date: August 7, 2008Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Peter Wiebe Burka, Graham Alan Chapman, Trent A. Gray-Donald, Karl Michael Taylor
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Patent number: 7356811Abstract: A method, apparatus, and computer instructions for referencing a constant pool. A determination is made as to whether a bytecode references the constant pool. A relative offset to the constant pool is identified for the bytecode, in response to the bytecode referencing the constant pool. The bytecode is then replaced with a new bytecode containing the relative offset. The relative offset is used to reference the constant pool.Type: GrantFiled: July 8, 2004Date of Patent: April 8, 2008Assignee: International Business Machines CorporationInventors: Peter Wiebe Burka, Graham Alan Chapman, Trent A. Gray-Donald, Karl Michael Taylor