Patents by Inventor Greg A. Kranawetter

Greg A. Kranawetter has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7545438
    Abstract: A graphics integrated circuit chip is used in a set-top box for controlling a television display. The graphics chip processes analog video input, digital video input, graphics input and audio input simultaneously. The system includes a video decoder having a chroma-locked sample rate converter. The chroma-locked sample rate converter converts the samples to those taken at a sample rate that is a multiple of the chroma subcarrier frequency and that is locked to chroma bursts of the analog video signal in a control loop. The video decoder also includes a line-locked sample rate converter that receives samples at a multiple of the chroma subcarrier frequency and converts the samples to samples with a sample frequency that is a multiple of the horizontal line rate of the video input. The line-locked sample rate converter measures the horizontal line rate to an accuracy of a fraction of a pixel and adjusts the sample rate and phase of the line-locked sample rate converter to produce accurate line-locked samples.
    Type: Grant
    Filed: April 23, 2007
    Date of Patent: June 9, 2009
    Assignee: Broadcom Corporation
    Inventors: Alexander G. MacInnis, Chengfuh Jeffrey Tang, Xiaodong Xie, James T. Patterson, Greg A. Kranawetter
  • Patent number: 7538783
    Abstract: A graphics integrated circuit chip is used in a set-top box for controlling a television display. The graphics chip processes analog video input, digital video input, graphics input and audio input simultaneously. A video scaling system preferably conserves memory by downscaling video prior to capturing the video in memory and upscaling video after the video is called out of memory.
    Type: Grant
    Filed: September 25, 2003
    Date of Patent: May 26, 2009
    Assignee: Broadcom Corporation
    Inventors: Alexander G. MacInnis, Chengfuh Jeffrey Tang, Xiaodong Xie, James T. Patterson, Greg A. Kranawetter
  • Publication number: 20090128572
    Abstract: A video and graphics system on an integrated circuit chip includes an integrated system bridge controller to interface a CPU with devices internal to the system as well as external peripheral devices. The system bridge controller is capable of performing format conversion between big-endian data and little-endian data. The system bridge controller includes a PCI bridge to interface with PCI devices, an I/O bus bridge to interface with I/O devices such as RAM, ROM, flash memory and 68000-compatible peripheral devices, and a CPU interface block to interface the CPU to video processing devices on the integrated circuit chip such as an MPEG video decoder.
    Type: Application
    Filed: September 22, 2008
    Publication date: May 21, 2009
    Inventors: Alexander G. MacInnis, Chengfuh Jeffrey Tang, Greg A. Kranawetter
  • Patent number: 7530027
    Abstract: A graphics integrated circuit chip is used in a set-top box for controlling a television display. The graphics chip processes analog video input, digital video input, a graphics input and an audio input simultaneously. The chip processes graphics images organized as windows. The chip obtains data that describes the windows, sorts the data according to the depth of the window on the display, transfers graphics images from memory, and blends the graphics images using alpha values associated with the graphics images.
    Type: Grant
    Filed: July 18, 2003
    Date of Patent: May 5, 2009
    Assignee: Broadcom Corporation
    Inventors: Alexander G. MacInnis, Chengfuh Jeffrey Tang, Xiaodong Xie, James T. Patterson, Greg A. Kranawetter
  • Publication number: 20090066724
    Abstract: A graphics integrated circuit chip is used in a set-top box for controlling a television display. The graphics chip processes analog video input, digital video input, a graphics input and an audio input simultaneously. The chip processes graphics images organized as windows. The chip obtains data that describes the windows, sorts the data according to the depth of the window on the display, transfers graphics images from memory, and blends the graphics images using alpha values associated with the graphics images.
    Type: Application
    Filed: November 10, 2008
    Publication date: March 12, 2009
    Inventors: Alexander G. MacInnis, Chengfuh Jeffrey Tang, Xiaodong Xie, James T. Patterson, Greg A. Kranawetter
  • Patent number: 7489362
    Abstract: A television on a chip (TVOC) system that provides a cost effective approach for providing television functionality on a single integrated circuit chip is disclosed. A TVOC includes the functionality necessary to receive and display television signals in a variety of input and output formats. A TVOC can be used in set-top boxes for cable and satellite television, or directly within a television. All functionality provided can be provided on a single integrated circuit. TVOC includes a data transport module, an IF demodulator, a digital audio engine, an analog audio engine, a digital video engine, and an analog video engine. The TVOC also includes three sets of interfaces including output interfaces, control interfaces and ancillary interfaces. Further features and embodiments provide enhanced functionality and increased efficiencies.
    Type: Grant
    Filed: March 3, 2004
    Date of Patent: February 10, 2009
    Assignee: Broadcom Corporation
    Inventors: David A. Baer, Jeff Tingley, Aleksandr Movshovich, Brad Grossman, Brian F. Schoner, Chengfuh Jeffrey Tang, Chuck Monahan, Darren D. Neuman, David Chao Hua Wu, Francis Cheung, Greg A. Kranawetter, Hoang Nhu, Hsien-Chih Jim Tseng, Iue-Shuenn Chen, James D. Sweet, Jeffrey S. Bauch, Keith LaRell Klingler, Patrick Law, Rajesh Mamidwar, Dan Simon, Sang Van Tran, Shawn V. Johnson, Steven T. Jaffe, Thu T. Nguyen, Ut Nguyen, Yao-Hua Steven Tseng, Brad Delanghe, Ben Giese, Jason Demas, Lakshman Ramakrishnan, Sandeep Bhatia, Guang-Ting Shih, Tracy C. Denk
  • Patent number: 7446774
    Abstract: A video and graphics system on an integrated circuit chip includes an integrated system bridge controller to interface a CPU with devices internal to the system as well as external peripheral devices. The system bridge controller is capable of performing format conversion between big-endian data and little-endian data. The system bridge controller includes a PCI bridge to interface with PCI devices, an I/O bus bridge to interface with I/O devices such as RAM, ROM, flash memory and 68000-compatible peripheral devices, and a CPU interface block to interface the CPU to video processing devices on the integrated circuit chip such as an MPEG video decoder.
    Type: Grant
    Filed: August 18, 2000
    Date of Patent: November 4, 2008
    Assignee: Broadcom Corporation
    Inventors: Alexander G. MacInnis, Chengfuh Jeffrey Tang, Greg A. Kranawetter
  • Publication number: 20080094506
    Abstract: A graphics integrated circuit chip is used in a set-top box for controlling a television display. The graphics chip processes analog video input, digital video input, and graphics input. The chip includes a single polyphase filter that preferably provides both anti-flutter filtering and scaling of graphics. Anti-flutter filtering may help reduce display flicker due to the interlaced nature of television displays. The scaling of graphics may be used to convert the normally square pixel aspect ratio of graphics to the normally rectangular pixel aspect ratio of video.
    Type: Application
    Filed: December 18, 2007
    Publication date: April 24, 2008
    Inventors: Alexander MacInnis, Chengfuh Tang, Xiaodong Xie, James Patterson, Greg Kranawetter
  • Publication number: 20080094416
    Abstract: A graphics integrated circuit chip is used in a set-top box for controlling a television display. The graphics chip processes analog video input, digital video input, and graphics input. The chip includes a single polyphase filter that preferably provides both anti-flutter filtering and scaling of graphics. Anti-flutter filtering may help reduce display flicker due to the interlaced nature of television displays. The scaling of graphics may be used to convert the normally square pixel aspect ratio of graphics to the normally rectangular pixel aspect ratio of video.
    Type: Application
    Filed: December 18, 2007
    Publication date: April 24, 2008
    Inventors: Alexander MacInnis, Chengfuh Tang, Xiaodong Xie, James Patterson, Greg Kranawetter
  • Patent number: 7310104
    Abstract: A graphics integrated circuit chip is used in a set-top box for controlling a television display. The graphics chip processes analog video input, digital video input, and graphics input. The chip includes a single polyphase filter that preferably provides both anti-flutter filtering and scaling of graphics. Anti-flutter filtering may help reduce display flicker due to the interlaced nature of television displays. The scaling of graphics may be used to convert the normally square pixel aspect ratio of graphics to the normally rectangular pixel aspect ratio of video.
    Type: Grant
    Filed: August 28, 2006
    Date of Patent: December 18, 2007
    Assignee: Broadcom Corporation
    Inventors: Alexander G. MacInnis, Chengfuh Jeffrey Tang, Xiaodong Xie, James T. Patterson, Greg A. Kranawetter
  • Publication number: 20070285440
    Abstract: A graphics integrated circuit chip is used in a set-top box for controlling a television display. The graphics chip processes analog video input, digital video input, graphics input and audio input simultaneously. The system includes a video decoder having a chroma-locked sample rate converter. The chroma-locked sample rate converter converts the samples to those taken at a sample rate that is a multiple of the chroma subcarrier frequency and that is locked to chroma bursts of the analog video signal in a control loop. The video decoder also includes a line-locked sample rate converter that receives samples at a multiple of the chroma subcarrier frequency and converts the samples to samples with a sample frequency that is a multiple of the horizontal line rate of the video input. The line-locked sample rate converter measures the horizontal line rate to an accuracy of a fraction of a pixel and adjusts the sample rate and phase of the line-locked sample rate converter to produce accurate line-locked samples.
    Type: Application
    Filed: April 23, 2007
    Publication date: December 13, 2007
    Inventors: Alexander MacInnis, Chengfuh Tang, Xiadong Xie, James Patterson, Greg Kranawetter
  • Publication number: 20070216808
    Abstract: Presented herein are systems and methods for scaling. In one embodiment, there is presented a method for scaling. The method comprises receiving a top field and a bottom field, detecting whether the top field and bottom field correspond to the same time period, and generating a scaled field for display using both the top field and bottom field, if the top field and the bottom field correspond to the same time period.
    Type: Application
    Filed: October 18, 2006
    Publication date: September 20, 2007
    Inventors: Alexander MacInnis, Greg Kranawetter, Sandeep Bhatia, Robin (Shen-yung) Chen, Mahadhevan Sivagururaman, Srilakshmi Dorarajulu
  • Patent number: 7227582
    Abstract: A graphics integrated circuit chip is used in a set-top box for controlling a television display. The graphics chip processes analog video input, digital video input, graphics input and audio input simultaneously. The system includes a video decoder having a chroma-locked sample rate converter. The chroma-locked sample rate converter converts the samples to those taken at a sample rate that is a multiple of the chroma subcarrier frequency and that is locked to chroma bursts of the analog video signal in a control loop. The video decoder also includes a line-locked sample rate converter that receives samples at a multiple of the chroma subcarrier frequency and converts the samples to samples with a sample frequency that is a multiple of the horizontal line rate of the video input. The line-locked sample rate converter measures the horizontal line rate to an accuracy of a fraction of a pixel and adjusts the sample rate and phase of the line-locked sample rate converter to produce accurate line-locked samples.
    Type: Grant
    Filed: May 17, 2004
    Date of Patent: June 5, 2007
    Assignee: Broadcom Corporation
    Inventors: Alexander G. MacInnis, Chengfuh Jeffrey Tang, Xiaodong Xie, James T. Patterson, Greg A. Kranawetter
  • Publication number: 20070120874
    Abstract: A graphics integrated circuit chip is used in a set-top box for controlling a television display. The graphics chip processes analog video input, digital video input, a graphics input and an audio input simultaneously. The chip includes a display engine that processes graphics images organized as windows. The system includes plurality of line buffers for receiving the graphics contents. The graphics contents are composited into each of the plurality of line buffers by blending the graphics contents with the existing contents of the line buffer until all of the graphics surfaces for the line have been composited.
    Type: Application
    Filed: May 26, 2006
    Publication date: May 31, 2007
    Inventors: Alexander MacInnis, Chengfuh Tang, Xiaodong Xie, James Patterson, Greg Kranawetter
  • Publication number: 20070103489
    Abstract: A graphics integrated circuit chip is used in a set-top box for controlling a television display. The graphics chip processes analog video input, digital video input, a graphics input and an audio input simultaneously. The system may use anti-aliased text and graphics to provide high quality display of graphical elements, or glyphs, which represent an image of a character of text or graphics, on television and other displays. The graphical elements may be superimposed over live video or arbitrary graphics imagery.
    Type: Application
    Filed: December 28, 2006
    Publication date: May 10, 2007
    Inventors: Alexander MacInnis, Chengfuh Tang, Xiaodong Xie, James Patterson, Greg Kranawetter
  • Patent number: 7209992
    Abstract: A graphics display system integrated circuit is used in a set-top box for controlling a television display. The graphics display system processes analog video input, digital video input, and graphics input. The system incorporates a unified memory architecture that is shared by the graphics system, a CPU, and other peripherals. The unified memory architecture uses real time scheduling to service tasks. Critical instant analysis is used to find a schedule for memory usage that does not affect memory requirements of real time tasks while at the same time servicing non-real-time tasks as needed.
    Type: Grant
    Filed: January 22, 2004
    Date of Patent: April 24, 2007
    Assignee: Broadcom Corporation
    Inventors: Alexander G. MacInnis, Chengfuh Jeffrey Tang, Xiaodong Xie, James T. Patterson, Greg A. Kranawetter
  • Patent number: 7184058
    Abstract: A graphics integrated circuit chip is used in a set-top box for controlling a television display. The graphics chip processes analog video input, digital video input, a graphics input and an audio input simultaneously. The system may use anti-aliased text and graphics to provide high quality display of graphical elements, or glyphs, which represent an image of a character of text or graphics, on television and other displays. The graphical elements may be superimposed over live video or arbitrary graphics imagery.
    Type: Grant
    Filed: April 14, 2005
    Date of Patent: February 27, 2007
    Assignee: Broadcom Corporation
    Inventors: Alexander G. MacInnis, Chengfuh Jeffrey Tang, Xiaodong Xie, James T. Patterson, Greg A. Kranawetter
  • Publication number: 20070030276
    Abstract: A display engine of a video and graphics system includes one or more processing elements and receives graphics from a memory. The graphics data define multiple graphics layers, and the processing elements process two or more graphics layers in parallel to generate blended graphics. Alpha values may be used while blending graphics. The processing elements may be integrated on an integrated circuit chip with an input for receiving the graphics data and other video and graphics components. The display engine may also include a graphics controller for receiving two or more graphics layers in parallel, for arranging the graphics layers in an order suitable for parallel processing, and for providing the arranged graphics layers to the processing elements. The blended graphics may be blended with HDTV video or SDTV video, which may be extracted from compressed data streams such as an MPEG Transport stream.
    Type: Application
    Filed: July 12, 2006
    Publication date: February 8, 2007
    Inventors: Alexander MacInnis, Chengfuh Tang, Greg Kranawetter
  • Publication number: 20060290708
    Abstract: A graphics integrated circuit chip is used in a set-top box for controlling a television display. The graphics chip processes analog video input, digital video input, and graphics input. The chip includes a single polyphase filter that preferably provides both anti-flutter filtering and scaling of graphics. Anti-flutter filtering may help reduce display flicker due to the interlaced nature of television displays. The scaling of graphics may be used to convert the normally square pixel aspect ratio of graphics to the normally rectangular pixel aspect ratio of video.
    Type: Application
    Filed: August 28, 2006
    Publication date: December 28, 2006
    Inventors: Alexander MacInnis, Chengfuh Tang, Xiaodong Xie, James Patterson, Greg Kranawetter
  • Publication number: 20060268012
    Abstract: A video, audio and graphics system uses multiple transport processors to receive in-band and out-of-band MPEG Transport streams, to perform PID and section filtering as well as DVB and DES decryption and to de-multiplex them. The system processes the PES into digital audio, MPEG video and message data. The system is capable of decoding multiple MPEG SLICEs concurrently. Graphics windows are blended in parallel, and blended with video using alpha blending. During graphics processing, a single-port SRAM is used equivalently as a dual-port SRAM. The video may include both analog video, e.g., NTSC/PAL/SECAM/S-video, and digital video, e.g., MPEG-2 video in SDTV or HDTV format. The system has a reduced memory mode in which video images are reduced in half in horizontal direction only during decoding. The system is capable of receiving and processing digital audio signals such as MPEG Layer 1 and Layer 2 audio and Dolby AC-3 audio, as well as PCM audio signals. The system includes a memory controller.
    Type: Application
    Filed: August 3, 2006
    Publication date: November 30, 2006
    Inventors: Alexander MacInnis, Chengfuh Tang, Xiaodong Xie, Greg Kranawetter, Vivian Hsiun, Francis Cheung, Sandeep Bhatia, Ramanujan Valmiki, Sathish Kumar