Abstract: A sensor interface circuit is provided which realizes common mode rejection and achieves a desired transfer response while realizing a simplified amplifier arrangement. The interface circuit is particularly useful for amplifying and conditioning signals generated by an oxygen sensor on an automotive vehicle. The sensor interface circuit has first and second inputs for receiving input voltages from a sensor which are joined together to provide a differential voltage representative of the voltage potential between the first and second inputs. One input may receive a common mode ground employed by the sensor. An amplifier having a first input receives a differential voltage at an inverting input and a positive non-zero reference voltage at a non-inverting input. The amplifier has an output coupled to a grounded switch for providing an output signal referenced to reference ground.

Abstract: A sensor interface circuit and method are provided which realizes common mode rejection, compensates for external input impedance and internal loads and achieves a desired transfer response. The interface circuit is particularly useful for amplifying and conditioning signals generated by an oxygen sensor on an automotive vehicle. The sensor interface circuit has first and second inputs for receiving input voltages from a sensor which are joined together to provide a differential voltage representative of the voltage potential between the first and second inputs. RF filtering circuitry is coupled to both inputs. An amplifier having a gain and a first input receives a differential voltage and has an output coupled to a grounded switch for providing an output signal referenced to reference ground. A supply voltage is applied across the inputs and a current is supplied to one of the inputs.

Abstract: A MOS hysteresis comparator having a source transistor bias circuit which generates a source current Is that compensates for temperature and manufacturing process variations, thereby providing a hysteresis characteristic which is substantially insensitive to such temperature and manufacturing process variations. The source transistor bias circuit includes a set of MOS transistors which replicate the comparator load currents which occur at the switch points of the comparator, and a source transistor which mirrors the sum of the replicated currents to form the source current Is of the comparator.

Abstract: An integrated circuit apparatus comprises a first stage amplifier and a second stage amplifier. The first stage amplifier is characterized by a cross-coupled integrated layout providing a rail-to-rail swing and a linear gain, A, substantially defined as A=g.sub.m r.sub.o '. The second stage amplifier is coupled to the output of the first stage amplifier and comprises a high-voltage integrated circuit transistor with an AC feedback circuit, the AC feedback circuit comprising, in series, a capacitor, a N+ resistor and an N-WELL resistor, wherein the output of the second stage amplifier is used to directly drive an inductive load.

Abstract: An AM stereo receiver in which a synchronous in-phase signal is determined comprises a low pass filter circuit for determining an average DC value of the synchronous in-phase signal, a reference voltage supply for providing a reference voltage indicative of a predetermined portion of the DC value of the synchronous in-phase signal occurring during a 100% IF signal level condition, a comparison circuit for comparing the average DC value of the synchronous in-phase signal to the predetermined reference, and an output circuit outputting a signal indicative of an out-of-lock condition when the average DC value of the synchronous in-phase signal falls below the predetermined reference.

Abstract: A synchronous AM detector and processor requiring a reduced number of external components and fewer integrated circuit pins comprises an audio processor having a first filter operation controlled by a control voltage and an AM stereo decoder including a lock detector and a phase locked loop having a second filter operation controlled by the control voltage. A single control node is coupled to the audio processor and the phase locked loop, the control node providing the control voltage for the audio processor and the phase locked loop. The voltage at the control node is biased normally high, capable of being pulled low by the audio processing circuit and capable of being pulled low by the lock detector. An RC circuit decays the rise time of the control voltage at the control node after the control voltage has been pulled low. Circuitry is added to control the first filter operation of the audio processing circuitry responsive to the control voltage at the control node.

Abstract: An AM stereo input signal is processed by an envelope detector, an in-phase detector and a quadrature phase detector to yield outputs which may carry short noise impulses. Each output is low pass filtered to derive an average signal level and each output is ratiometrically compared to the corresponding average to detect a tic or modulation substantially above the average. In response to a tic a hold circuit generates a flag for a period which depends on the quality of the input signal. A dual mode deemphasis and sample/hold circuit normally filters the audio signal in each channel and is effective for the duration of the flag to hold the existing signal in the circuit to blank out the noise impulse.

Abstract: An adaptive audio processor for stereo AM broadcast signals includes independent signal processing paths. Each path has a variable lowpass filter and a matrix and variable Q 10 kHz notch filter to form LEFT and RIGHT channel signals with a 10 kHz notched pass band determined by adjacent channel noise. A 10 kHz pass band signal representative of adjacent channel noise from one of the signal processing paths is compared to a reference to generate a correction signal that is fedback to control the lowpass and notch filters. The correction signal adjusts the pass band and Q of the lowpass and notch filters so that the effects of adjacent channel noise are minimized. Other receiver signals which are reflective of the quality of the received broadcast signal, e.g., the AGC signal, an excess modulation signal, and a receiver microprocessor signal are similarly employed to control the lowpass and notch filters.

Abstract: A differential operational amplifier comprises a differential input circuit that provides a differential output signal to a plurality of independent output circuits. The gains of the differential input circuit and one output circuit are set by a fixed bias source. A variable bias source controlled by an external signal determines the gain of each other output circuit so that various attenuation characteristics are obtained in the other output circuits without affecting the operating conditions of the operational amplifier. A feedback element between the output of the one output circuit and the differential input circuit assures gain stability.

Abstract: An ajustable switched capacitor circuit comprises a first stage, a second stage and a switched capacitor circuit coupling the output of the first stage to the input of the second stage. The operating parameters of the second stage are a function of the effective resistance of the switched capacitor coupling circuit. An attenuator interposed between the output of the first stage and the input of the switched capacitor coupling circuit controls the charging voltage of the switched capacitor coupler thereby controlling its effective resistance and parameters of the output stage. The signal loss through the attenuator is continuously adjustable responsive to an external control voltage to obtain continuous control of various output stage parameters. The output stage may comprise a filter having the parameters of its transfer function determined by the effective resistance of the switched capacitor coupling circuit.

Abstract: An audio detector circuit forms L+R and L-R audio signals from an intermediate frequency compatible quadrature amplitude modulated signal in the form (1+L+R)cos(fct+.phi.) where .phi. contains phase modulated L+R and L-R signals. An envelope detector generates an L+R audio signal and in-phase and quadrature phase detectors produce L+R and L-R audio signals, respectively. The difference between L+R outputs of the envelope and in-phase detectors are amplified to generate a cosine correction signal. Each detector includes a differential operational amplifier having an field effect feedback transistor coupled between each amplifier output and the corresponding input and an field effect transistor coupling the compatible quadrature amplitude modulated signal to the operational amplifier inputs.

Abstract: An FM stereo radio circuit has an ultrasonic noise detector and an amplitude noise detector each for detecting impulse noise by developing an average noise signal and comparing the average noise signal with an attenuated value of the instantaneous noise signal to generate a noise flag. A dual mode circuit normally operates as a low pass filter for a deemphasis function and is switched by the noise flag to operate as a sample and hold circuit which blanks the noise pulse. The dual mode circuit uses a switched capacitance design and is driven by clock signals to serve as a filter. The clock signals are stopped by the noise flag to effect the sample and hold function.

Abstract: An analog/digital voltage controlled oscillator includes a voltage to pulse converter which responds to a control voltage to generate appropriate control pulses to change the mode of operation of a divider to thereby vary the output frequency of the oscillator.

Abstract: A phase locked loop (PLL) with a narrow bandwidth, and small phase noise which is particularly useful in a FM stereo decoder includes both analog and digital circuitry and has the advantages of both types of systems, performing better than standard PLL's without the need for any external components. An externally referenced digital voltage controlled oscillator, establishes the center frequency of the PLL while analog portions of the circuit permits accurate locking to the input signal and provides a high level of quietness of the system.

Abstract: An attenuator in the composite L-R signal path used for dynamic signal control for blend purposes is limited in range by a static separation adjust signal which attenuates the maximum L-R signal to a value selected for the best right and left channel separation upon matrixing of the L+R and L-R signals. The gain of the L-R signal path is set greater than the L+R path so that a wide adjustment range is available to the separation adjustment circuit.

Abstract: A circuit is provided which gauges the amount of significant high-frequency spectral energy in the very recent history of the program material and ignores the effects of short noise bursts and other transients associated with FM reception in the moving vehicle. The circuit provides an output voltage which can be used to adjust the attack characteristics of an audio processor.

Abstract: A switched capacitor low pass filter is used to sample an FM stereo composite signal with non-overlapping clock signal to achieve phase or magnitude detection of the 19 kHz pilot without being adversely affected by the presence of information at or about 57 kHz.

Abstract: A switched capacitor pilot cancellation circuit included in an FM stereo decoder signal path which substantially eliminates the 19 kHz pilot from the FM composite by subtracting a reconstructed pilot frequency signal from the FM composite. The reconstructed pilot signal is obtained by applying the DC output voltage of a pilot magnitude detector to a switched capacitor network which is sampled by clock signals which convert the DC to 19 kHz.

Abstract: A closed-loop attenuator for an FM stereo receiver provides attenuation to the L+R audio signal in a controlled and predictable reaction to an ultrasonic noise (USN) voltage presented to an input amplifier. This is accomplished through a closed-loop circuit configuration including a multiplier which modulates the current output of the input amplifier in accordance with the output of a master differential amplifier and supplies the modulated current to a gain stage connected to the input of the master differential amplifier. The output of the master amplifier is mirrored by a slave differential amplifier which applies the actual audio signal attenuation. The closed-loop configuration confines this linear control action to a very narrow range. Outside of this range, the circuit provides either full attenuation or no attenuation.

Abstract: A current mirror implemented preferably in MOS technology provides low total harmonic distortion and high output impedance and maintains the input signal within one Vgs of the supply voltage source. For an input signal having DC and AC components I and i, a constant curent of 2I is fed to the input terminal. A transistor couples the input terminal to the output terminal. The difference of the constant current and the input current is the output current I-i which passes through the transistor to the output terminal. An amplifier having its input connected to the input terminal and its output fed back to the gate or base of the transistor helps maintain the input terminal at a constant voltage.