Abstract: The present disclosure describes apparatuses and methods of performance-based antenna selection for user devices. In some aspects, a user device includes a transceiver having a first receiver, as well as second and third receivers. The transceiver is coupled to a first antenna to enable communication via the first antenna and the second receiver is coupled to the second antenna to enable reception via the second antenna. The third receiver is coupled to a third antenna to enable monitoring of performance of the third antenna. Based on a comparison of respective performance of the first antenna and the third antenna, the first antenna or third antenna is coupled the transceiver to enable subsequent communication. By monitoring and comparing respective performance of the antennas before antenna switching is implemented, a better-performing antenna of the two antennas can be selected for coupling to the transceiver without impacting communication performance.

Abstract: The present disclosure describes apparatuses and methods of performance-based antenna selection for user devices. In some aspects, a user device includes a transceiver having a first receiver, as well as second and third receivers. The transceiver is coupled to a first antenna to enable communication via the first antenna and the second receiver is coupled to the second antenna to enable reception via the second antenna. The third receiver is coupled to a third antenna to enable monitoring of performance of the third antenna. Based on a comparison of respective performance of the first antenna and the third antenna, the first antenna or third antenna is coupled the transceiver to enable subsequent communication. By monitoring and comparing respective performance of the antennas before antenna switching is implemented, a better-performing antenna of the two antennas can be selected for coupling to the transceiver without impacting communication performance.

Abstract: The present disclosure describes apparatuses and methods of performance-based antenna selection for user devices. In some aspects, a user device includes a transceiver having a first receiver, as well as second and third receivers. The transceiver is coupled to a first antenna to enable communication via the first antenna and the second receiver is coupled to the second antenna to enable reception via the second antenna. The third receiver is coupled to a third antenna to enable monitoring of performance of the third antenna. Based on a comparison of respective performance of the first antenna and the third antenna, the first antenna or third antenna is coupled the transceiver to enable subsequent communication. By monitoring and comparing respective performance of the antennas before antenna switching is implemented, a better-performing antenna of the two antennas can be selected for coupling to the transceiver without impacting communication performance.

Abstract: The present disclosure describes apparatuses and methods of performance-based antenna selection for user devices. In some aspects, a user device includes a transceiver having a first receiver, as well as second and third receivers. The transceiver is coupled to a first antenna to enable communication via the first antenna and the second receiver is coupled to the second antenna to enable reception via the second antenna. The third receiver is coupled to a third antenna to enable monitoring of performance of the third antenna. Based on a comparison of respective performance of the first antenna and the third antenna, the first antenna or third antenna is coupled the transceiver to enable subsequent communication. By monitoring and comparing respective performance of the antennas before antenna switching is implemented, a better-performing antenna of the two antennas can be selected for coupling to the transceiver without impacting communication performance.

Abstract: Described are methods of a mobile communication device for processing a balance information message from a service provider in response to a balance information query. A method includes obtaining a service provider identity from a SIM, determining a format of a balance information message and identifying a balance information message from the service provider according to the format of the balance information message. Also described is a mobile communication device that includes a transceiver, a controller, and a memory configured to store format information including a format of a balance information message. The controller is configured to generate a communication to the service provider for transmission via the wireless transceiver, the communication being based on format information including the format of a balance information query, and to determine whether an incoming message received by the wireless transceiver from the service provider conforms to the balance information message.

Abstract: Described are methods of a mobile communication device for processing a balance information message from a service provider in response to a balance information query. A method includes obtaining a service provider identity from a SIM, determining a format of a balance information message and identifying a balance information message from the service provider according to the format of the balance information message. Also described is a mobile communication device that includes a transceiver, a controller, and a memory configured to store format information including a format of a balance information message. The controller is configured to generate a communication to the service provider for transmission via the wireless transceiver, the communication being based on format information including the format of a balance information query, and to determine whether an incoming message received by the wireless transceiver from the service provider conforms to the balance information message.

Abstract: A distributive capacitor 205 and impedance matching network 201 and transmitter 101 that use the capacitor and are suitable for high density integration applications include a printed circuit substrate 303 comprising one of a printed circuit board and a silicon based substrate, a first conductive layer 305 disposed on the printed circuit substrate, a layer of dielectric material 307 disposed on the first conductive layer and having a thickness, the dielectric material having a dielectric constant more than five times greater than the dielectric constant of the printed circuit substrate; and a second conductive layer 309 disposed on the layer of dielectric material and having a second length 311 and a second width 603 that are selected so that the distributive capacitor operates as a transmission line.

Abstract: A distributive capacitor 205 and impedance matching network 201 and transmitter 101 that use the capacitor and are suitable for high density integration applications include a printed circuit substrate 303 comprising one of a printed circuit board and a silicon based substrate, a first conductive layer 305 disposed on the printed circuit substrate, a layer of dielectric material 307 disposed on the first conductive layer and having a thickness, the dielectric material having a dielectric constant more than five times greater than the dielectric constant of the printed circuit substrate; and a second conductive layer 309 disposed on the layer of dielectric material and having a second length 311 and a second width 603 that are selected so that the distributive capacitor operates as a transmission line.

Abstract: An exciter matching circuit (125), interstage matching circuit (134), and harmonic filter matching circuit (140) match impedances at the input to a two-stage power amplifier (130), between the first stage (132) and the second stage (136) of the power amplifier (130), and at the output of the power amplifier (130) for more than one frequency band of interest. In a GSM/DCS dual band radiotelephone (101), the matching circuits (124, 134, 140) provide low return loss at 900 MHz when the dual band transmitter (110) is operating in the GSM mode. The harmonic filter matching circuit (140) also filters out signals at 1800 MHz, 2700 MHz, and high order harmonics. When the dual band transmitter (110) is in DCS mode, however, the matching circuits (124, 134, 140) provide a low return loss at 1800 MHz and filter out signals at 2700 MHz and harmonics of 1800 MHz.

Abstract: An exciter matching circuit (125), interstage matching circuit (134), and harmonic filter matching circuit (140) match impedances at the input to a two-stage power amplifier (130), between the first stage (132) and the second stage (136) of the power amplifier (130), and at the output of the power amplifier (130) for more than one frequency band of interest. In a GSM/DCS dual band radiotelephone (101), the matching circuits (124, 134, 140) provide low return loss at 900 MHz when the dual band transmitter (110) is operating in the GSM mode. The harmonic filter matching circuit (140) also filters out signals at 1800 MHz, 2700 MHz, and high order harmonics. When the dual band transmitter (110) is in DCS mode, however, the matching circuits (124, 134, 140) provide a low return loss at 1800 MHz and filter out signals at 2700 MHz and harmonics of 1800 MHz.

Abstract: An exciter matching circuit (125), interstage matching circuit (134), and harmonic filter matching circuit (140) match impedances at the input to a two-stage power amplifier (130), between the first stage (132) and the second stage (136) of the power amplifier (130), and at the output of the power amplifier (130) for more than one frequency band of interest. In a GSM/DCS dual band radiotelephone (101), the matching circuits (124, 134, 140) provide low return loss at 900 MHz when the dual band transmitter (110) is operating in the GSM mode. The harmonic filter matching circuit (140) also filters out signals at 1800 MHz, 2700 MHz, and high order harmonics. When the dual band transmitter (110) is in DCS mode, however, the matching circuits (124, 134, 140) provide a low return loss at 1800 MHz and filter out signals at 2700 MHz and harmonics of 1800 MHz.

Abstract: A direct modulation phase lock loop (PLL) a voltage controlled oscillator (VCO) (114). A divider (118) has a first divider input coupled to the VCO and a second divider input to receive a modulation inducing divisor sequence. A phase detector (102) has a first detector input coupled to the divider to receive the output thereof, and a second detector input to receive a reference input. A tuning circuit (306, 406) is coupled to the phase detector and the VCO, the tuning circuit responsive to a variable DC reference potential such that the tuning circuit has a frequency response that is constant over the modulation bandwidth whereby the PLL is a type 1 PLL with low modulation distortion.

Abstract: An exciter matching circuit (125), interstage matching circuit (134), and harmonic filter matching circuit (140) match impedances at the input to a two-stage power amplifier (130), between the first stage (132) and the second stage (136) of the power amplifier (130), and at the output of the power amplifier (130) for more than one frequency band of interest. In a GSM/DCS dual band radiotelephone (101), the matching circuits (124, 134, 140) provide low return loss at 900 MHz when the dual band transmitter (110) is operating in the GSM mode. The harmonic filter matching circuit (140) also filters out signals at 1800 MHz, 2700 MHz, and high order harmonics. When the dual band transmitter (110) is in DCS mode, however, the matching circuits (124, 134, 140) provide a low return loss at 1800 MHz and filter out signals at 2700 MHz and harmonics of 1800 MHz.

Abstract: An electronic device (102) includes a power supply (114), an amplifier circuit (132), and a power down protection circuit (160). The power supply (114) supplies power to the electronic device (102). The amplifier circuit (132) is powered by the power supply (114) to amplify a signal into an amplified output signal and controllable to vary a power level of the amplified output signal. The power down protection circuit (160) is coupled directly to the power supply (114) to lower the power level of the amplified output signal of the amplifier circuit (132) when the power supply (114) falls below a threshold.

Abstract: A switching circuit (30) in a portable telephone connects a gate of a field-effect transistor (Q1) to a voltage below the transistor's gate threshold voltage when the voltage at a first power source terminal (B) falls below a threshold voltage, thus disconnecting the first power source terminal (B) from a portable telephone power input terminal (B+) and connecting a second power source terminal (A) to the power input terminal (B+). The threshold voltage is set at a voltage above the minimum supply voltage of the portable telephone. The first power source terminal may be connected to a main battery and the second power source terminal may be connected to an adapter such as a battery eliminator adapter, hands-free adapter, or mobile transceiver adapter. This switching circuit prevents a call in progress from being disconnected when power sources are exchanged during a GSM burst.

Abstract: A power amplifier circuit (200) for amplifying a radio frequency (RF) signal received at an input (208) into an amplified RF signal at an output (210) includes a coupler circuit (222, 122), a second input (206), a power amplifier (218), and a level shifter (228). The coupler circuit (222, 122) is coupled to the output (210) to detect a level of the amplified RF signal. The second input (206) receives a control signal derived from the detected level. The power amplifier (218) includes a transistor (234/236) having a gate (238/240) coupled to the input (208) and a drain (242/244) coupled to the output (210). The level shifter (228) is coupled to the second input (206) and the gate (238/240) and, responsive to the control signal, supplies a biasing voltage (VGG) to the gate (238/240). The level shifter (228) includes circuitry (255) to minimize temperature sensitivity of the biasing voltage (VGG).

Abstract: A communication device (104) comprises a receiver circuit (108) receiving a modulated receive signal. A reference oscillator (132) generates a first clock signal at a first frequency, the first clock signal having harmonics. Circuitry (130) coupled to the reference oscillator and to the receiver responds to the first clock signal to produce a signal used by the receiver to reduce the frequency of the modulating signal. A frequency spreading circuit (134) is also coupled to the reference oscillator to modulate the first clock signal with a frequency spreading signal to produce a modulated clock signal including modulated harmonic frequency components. The frequency spreading circuit selectively combines the frequency spreading signal and the first clock signal. A control circuit (114) controls the frequency spreading circuit to modulate first clock signal with the frequency spreading signal when the selected received signal includes a harmonic of the first clock signal.