Patents by Inventor Guan-Wei Huang

Guan-Wei Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250045941
    Abstract: A depth camera capable of measuring the oblique velocity of an object is provided, wherein a depth camera capable of measuring the lateral velocity of an object includes a depth camera body, a first configuration file, and a lateral velocity calculation system. The lateral velocity calculation system includes: first image-processing software for recording a first depth distance at which images are taken of an object and for calculating the number of pixels corresponding to a lateral movement of the object and the duration of the lateral movement; and lateral velocity calculation software for calculating the lateral velocity of the object. The depth camera capable of measuring the oblique velocity of an object allows the lateral/longitudinal/oblique velocity of an object to be measured in real time using image-related techniques.
    Type: Application
    Filed: October 11, 2023
    Publication date: February 6, 2025
    Inventors: Wen-Hsin SUN, Jun-Yi YU, Siang-Siuan TSAI, Guan-Wei HUANG, Ching-Cherng SUN
  • Patent number: 12206907
    Abstract: A global index value is generated for selecting a global reshaping function for an input image of a relatively low dynamic range using luma codewords in the input image. Image filtering is applied to the input image to generate a filtered image. The filtered values of the filtered image provide a measure of local brightness levels in the input image. Local index values are generated for selecting specific local reshaping functions for the input image using the global index value and the filtered values of the filtered image. A reshaped image of a relatively high dynamic range is generated by reshaping the input image with the specific local reshaping functions selected using the local index values.
    Type: Grant
    Filed: October 1, 2021
    Date of Patent: January 21, 2025
    Assignee: DOLBY LABORATORIES LICENSING CORPORATION
    Inventors: Tsung-Wei Huang, Guan-Ming Su, Neeraj J. Gadgil
  • Publication number: 20250014948
    Abstract: A semiconductor device includes a fin-shaped structure on a substrate, a single diffusion break (SDB) structure in the fin-shaped structure to divide the first fin-shaped structure into a first portion and a second portion, and more than two gate structures on the SDB structure. Preferably, the more than two gate structures include a first gate structure, a second gate structure, a third gate structure, and a fourth gate structure disposed on the SDB structure.
    Type: Application
    Filed: September 15, 2024
    Publication date: January 9, 2025
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Fu-Jung Chuang, Po-Jen Chuang, Yu-Ren Wang, Chi-Mao Hsu, Chia-Ming Kuo, Guan-Wei Huang, Chun-Hsien Lin
  • Publication number: 20240379393
    Abstract: In certain embodiments, a workstation includes: a cleaning station configured to clean a die vessel, wherein the die vessel is configured to secure a semiconductor die; an inspection station configured to inspect the die vessel after cleaning to determine whether the die vessel is identified as passing inspection; and a conveyor configured to move the die vessel between the cleaning station and the inspection station.
    Type: Application
    Filed: July 25, 2024
    Publication date: November 14, 2024
    Inventors: Tsung-Sheng KUO, Guan-Wei HUANG, Chih-Hung HUANG, Yang-Ann CHU, Hsu-Shui LIU, Jiun-Rong PAI
  • Publication number: 20240363635
    Abstract: A semiconductor structure that includes a first semiconductor fin and a second semiconductor fin disposed over a substrate and adjacent to each other, a metal gate stack disposed over the substrate, and source/drain features disposed in each of the first semiconductor fin and the second semiconductor fin to engage with the metal gate stack. The metal gate stack includes a first region disposed over the first semiconductor fin, a second region disposed over the second semiconductor fin, and a third region connecting the first region to the second region in a continuous profile, where the first region is defined by a first gate length and the second region is defined by a second gate length less than the first gate length.
    Type: Application
    Filed: July 11, 2024
    Publication date: October 31, 2024
    Inventors: Guan-Wei Huang, Yu-Shan Lu, Yu-Bey Wu, Jiun-Ming Kuo, Yuan-Ching Peng
  • Patent number: 12125725
    Abstract: In certain embodiments, a workstation includes: a cleaning station configured to clean a die vessel, wherein the die vessel is configured to secure a semiconductor die; an inspection station configured to inspect the die vessel after cleaning to determine whether the die vessel is identified as passing inspection; and a conveyor configured to move the die vessel between the cleaning station and the inspection station.
    Type: Grant
    Filed: July 14, 2023
    Date of Patent: October 22, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Tsung-Sheng Kuo, Guan-Wei Huang, Chih-Hung Huang, Yang-Ann Chu, Hsu-Shui Liu, Jiun-Rong Pai
  • Patent number: 12119272
    Abstract: A semiconductor device includes a fin-shaped structure on a substrate, a single diffusion break (SDB) structure in the fin-shaped structure to divide the first fin-shaped structure into a first portion and a second portion, and more than two gate structures on the SDB structure. Preferably, the more than two gate structures include a first gate structure, a second gate structure, a third gate structure, and a fourth gate structure disposed on the SDB structure.
    Type: Grant
    Filed: August 14, 2023
    Date of Patent: October 15, 2024
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Fu-Jung Chuang, Po-Jen Chuang, Yu-Ren Wang, Chi-Mao Hsu, Chia-Ming Kuo, Guan-Wei Huang, Chun-Hsien Lin
  • Patent number: 12080715
    Abstract: A semiconductor structure that includes a first semiconductor fin and a second semiconductor fin disposed over a substrate and adjacent to each other, a metal gate stack disposed over the substrate, and source/drain features disposed in each of the first semiconductor fin and the second semiconductor fin to engage with the metal gate stack. The metal gate stack includes a first region disposed over the first semiconductor fin, a second region disposed over the second semiconductor fin, and a third region connecting the first region to the second region in a continuous profile, where the first region is defined by a first gate length and the second region is defined by a second gate length less than the first gate length.
    Type: Grant
    Filed: August 20, 2021
    Date of Patent: September 3, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Guan-Wei Huang, Yu-Shan Lu, Yu-Bey Wu, Jiun-Ming Kuo, Yuan-Ching Peng
  • Publication number: 20240213067
    Abstract: A system and computer-implemented method are provided for manufacturing a semiconductor electronic device. An assembler receives a jig and a boat supporting a die. The assembler includes a separator that separates the jig into a first jig portion and a second jig portion and a loader that positions the boat between the first jig portion and the second jig portion. A robot receives an assembly prepared by the assembler and manipulates a locking system that fixes an alignment of the boat relative to the first jig portion and the second jig portion to form a locked assembly. A process chamber receives the locked assembly and subjects the locked assembly to a fabrication operation.
    Type: Application
    Filed: March 11, 2024
    Publication date: June 27, 2024
    Inventors: Tsung-Sheng KUO, Chih-Hung HUANG, Guan-Wei HUANG, Ping-Yung YEN, Hsuan LEE, Jiun-Rong PAI
  • Patent number: 11929273
    Abstract: A system and computer-implemented method are provided for manufacturing a semiconductor electronic device. An assembler receives a jig and a boat supporting a die. The assembler includes a separator that separates the jig into a first jig portion and a second jig portion and a loader that positions the boat between the first jig portion and the second jig portion. A robot receives an assembly prepared by the assembler and manipulates a locking system that fixes an alignment of the boat relative to the first jig portion and the second jig portion to form a locked assembly. A process chamber receives the locked assembly and subjects the locked assembly to a fabrication operation.
    Type: Grant
    Filed: July 27, 2020
    Date of Patent: March 12, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LIMITED
    Inventors: Tsung-Sheng Kuo, Chih-Hung Huang, Guan-Wei Huang, Ping-Yung Yen, Hsuan Lee, Jiun-Rong Pai
  • Publication number: 20230386939
    Abstract: A semiconductor device includes a fin-shaped structure on a substrate, a single diffusion break (SDB) structure in the fin-shaped structure to divide the first fin-shaped structure into a first portion and a second portion, and more than two gate structures on the SDB structure. Preferably, the more than two gate structures include a first gate structure, a second gate structure, a third gate structure, and a fourth gate structure disposed on the SDB structure.
    Type: Application
    Filed: August 14, 2023
    Publication date: November 30, 2023
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Fu-Jung Chuang, Po-Jen Chuang, Yu-Ren Wang, Chi-Mao Hsu, Chia-Ming Kuo, Guan-Wei Huang, Chun-Hsien Lin
  • Publication number: 20230360939
    Abstract: In certain embodiments, a workstation includes: a cleaning station configured to clean a die vessel, wherein the die vessel is configured to secure a semiconductor die; an inspection station configured to inspect the die vessel after cleaning to determine whether the die vessel is identified as passing inspection; and a conveyor configured to move the die vessel between the cleaning station and the inspection station.
    Type: Application
    Filed: July 14, 2023
    Publication date: November 9, 2023
    Inventors: Tsung-Sheng KUO, Guan-Wei HUANG, Chih-Hung HUANG, Yang-Ann CHU, Hsu-Shui LIU, Jiun-Rong PAI
  • Patent number: 11791219
    Abstract: A method for fabricating semiconductor device includes the steps of first providing a substrate having a fin-shaped structure thereon, forming a single diffusion break (SDB) structure in the substrate to divide the fin-shaped structure into a first portion and a second portion, and then forming more than one gate structures such as a first gate structure and a second gate structure on the SDB structure. Preferably, each of the first gate structure and the second gate structure overlaps the fin-shaped structure and the SDB structure.
    Type: Grant
    Filed: November 7, 2022
    Date of Patent: October 17, 2023
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Fu-Jung Chuang, Po-Jen Chuang, Yu-Ren Wang, Chi-Mao Hsu, Chia-Ming Kuo, Guan-Wei Huang, Chun-Hsien Lin
  • Patent number: 11721572
    Abstract: In certain embodiments, a workstation includes: a cleaning station configured to clean a die vessel, wherein the die vessel is configured to secure a semiconductor die; an inspection station configured to inspect the die vessel after cleaning to determine whether the die vessel is identified as passing inspection; and a conveyor configured to move the die vessel between the cleaning station and the inspection station.
    Type: Grant
    Filed: July 26, 2022
    Date of Patent: August 8, 2023
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Tsung-Sheng Kuo, Guan-Wei Huang, Chih-Hung Huang, Yang-Ann Chu, Hsu-Shui Liu, Jiun-Rong Pai
  • Publication number: 20230095609
    Abstract: A system, includes, a semiconductor processing unit, an Automated Materials Handling System (AMHS) vehicle, and a warehouse apparatus, wherein the warehouse apparatus comprises at least one input port, at least one output port, and at least one load/unload port, wherein the warehouse apparatus is configured to perform one of the following: receiving a plurality of tray cassette containers from the AMHS vehicle at the at least one input port, transporting at least one tray cassette in each of a plurality of tray cassette containers to the at least one load/unload port via the at least one input port, transporting at least one first tray from the at least one tray cassette to the semiconductor processing unit via a tray feeder conveyor, and receiving at least one second tray from the semiconductor processing unit via the tray feeder conveyor.
    Type: Application
    Filed: December 2, 2022
    Publication date: March 30, 2023
    Inventors: Tsung-Sheng Kuo, Yang-Ann Chu, Chih-Hung Huang, Guan-Wei Huang, Jiun-Rong Pai, Hsuan Lee
  • Publication number: 20230054372
    Abstract: A semiconductor structure that includes a first semiconductor fin and a second semiconductor fin disposed over a substrate and adjacent to each other, a metal gate stack disposed over the substrate, and source/drain features disposed in each of the first semiconductor fin and the second semiconductor fin to engage with the metal gate stack. The metal gate stack includes a first region disposed over the first semiconductor fin, a second region disposed over the second semiconductor fin, and a third region connecting the first region to the second region in a continuous profile, where the first region is defined by a first gate length and the second region is defined by a second gate length less than the first gate length.
    Type: Application
    Filed: August 20, 2021
    Publication date: February 23, 2023
    Inventors: Guan-Wei Huang, Yu-Shan Lu, Yu-Bey Wu, Jiun-Ming Kuo, Yuan-Ching Peng
  • Publication number: 20230058811
    Abstract: A method for fabricating semiconductor device includes the steps of first providing a substrate having a fin-shaped structure thereon, forming a single diffusion break (SDB) structure in the substrate to divide the fin-shaped structure into a first portion and a second portion, and then forming more than one gate structures such as a first gate structure and a second gate structure on the SDB structure. Preferably, each of the first gate structure and the second gate structure overlaps the fin-shaped structure and the SDB structure.
    Type: Application
    Filed: November 7, 2022
    Publication date: February 23, 2023
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Fu-Jung Chuang, Po-Jen Chuang, Yu-Ren Wang, Chi-Mao Hsu, Chia-Ming Kuo, Guan-Wei Huang, Chun-Hsien Lin
  • Patent number: 11527425
    Abstract: A system, includes, a semiconductor processing unit, an Automated Materials Handling System (AMHS) vehicle, and a warehouse apparatus, wherein the warehouse apparatus comprises at least one input port, at least one output port, and at least one load/unload port, wherein the warehouse apparatus is configured to perform one of the following: receiving a plurality of tray cassette containers from the AMHS vehicle at the at least one input port, transporting at least one tray cassette in each of a plurality of tray cassette containers to the at least one load/unload port via the at least one input port, transporting at least one first tray from the at least one tray cassette to the semiconductor processing unit via a tray feeder conveyor, and receiving at least one second tray from the semiconductor processing unit via the tray feeder conveyor.
    Type: Grant
    Filed: December 31, 2019
    Date of Patent: December 13, 2022
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Tsung-Sheng Kuo, Yang-Ann Chu, Chih-Hung Huang, Guan-Wei Huang, Jiun-Rong Pai, Hsuan Lee
  • Patent number: 11527448
    Abstract: A method for fabricating semiconductor device includes the steps of first providing a substrate having a fin-shaped structure thereon, forming a single diffusion break (SDB) structure in the substrate to divide the fin-shaped structure into a first portion and a second portion, and then forming more than one gate structures such as a first gate structure and a second gate structure on the SDB structure. Preferably, each of the first gate structure and the second gate structure overlaps the fin-shaped structure and the SDB structure.
    Type: Grant
    Filed: December 27, 2020
    Date of Patent: December 13, 2022
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Fu-Jung Chuang, Po-Jen Chuang, Yu-Ren Wang, Chi-Mao Hsu, Chia-Ming Kuo, Guan-Wei Huang, Chun-Hsien Lin
  • Publication number: 20220359248
    Abstract: In certain embodiments, a workstation includes: a cleaning station configured to clean a die vessel, wherein the die vessel is configured to secure a semiconductor die; an inspection station configured to inspect the die vessel after cleaning to determine whether the die vessel is identified as passing inspection; and a conveyor configured to move the die vessel between the cleaning station and the inspection station.
    Type: Application
    Filed: July 26, 2022
    Publication date: November 10, 2022
    Inventors: Tsung-Sheng KUO, Guan-Wei HUANG, Chih-Hung HUANG, Yang-Ann CHU, Hsu-Shui LIU, Jiun-Rong PAI