Patents by Inventor Guangxiang Jin

Guangxiang Jin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7838434
    Abstract: A method of etching high dielectric constant materials using a halogen gas, a reducing gas and an etch rate control gas chemistry.
    Type: Grant
    Filed: August 14, 2006
    Date of Patent: November 23, 2010
    Assignee: Applied Materials, Inc.
    Inventors: Guangxiang Jin, Padmapani Nallan, Ajay Kumar
  • Patent number: 7368394
    Abstract: Methods for forming anisotropic features for high aspect ratio application in etch process are provided in the present invention. The methods described herein advantageously facilitates profile and dimension control of features with high aspect ratios through a sidewall passivation management scheme. In one embodiment, sidewall passivations are managed by selectively forming an oxidation passivation layer on the sidewall and/or bottom of etched layers. In another embodiment, sidewall passivation is managed by periodically clearing the overburden redeposition layer to preserve an even and uniform passivation layer thereon. The even and uniform passivation allows the features with high aspect ratios to be incrementally etched in a manner that pertains a desired depth and vertical profile of critical dimension in both high and low feature density regions on the substrate without generating defects and/or overetching the underneath layers.
    Type: Grant
    Filed: February 27, 2006
    Date of Patent: May 6, 2008
    Assignee: Applied Materials, Inc.
    Inventors: Meihua Shen, Uwe Leucke, Guangxiang Jin, Xikun Wang, Wei Liu, Scott Williams
  • Publication number: 20080057729
    Abstract: Methods for forming anisotropic features for high aspect ratio application in etch process are provided in the present invention. The methods described herein advantageously facilitates profile and dimension control of features with high aspect ratios through a sidewall passivation management scheme. In one embodiment, sidewall passivations are managed by selectively forming an oxidation passivation layer on the sidewall and/or bottom of etched layers. In another embodiment, sidewall passivation is managed by periodically clearing the overburden redeposition layer to preserve an even and uniform passivation layer thereon. The even and uniform passivation allows the features with high aspect ratios to be incrementally etched in a manner that pertains a desired depth and vertical profile of critical dimension in both high and low feature density regions on the substrate without generating defects and/or overetching the underneath layers.
    Type: Application
    Filed: October 29, 2007
    Publication date: March 6, 2008
    Inventors: Meihua Shen, Uwe Leucke, Guangxiang Jin, Xikun Wang, Wei Liu, Scott Williams
  • Publication number: 20070202700
    Abstract: Methods for forming anisotropic features for high aspect ratio application in etch process are provided in the present invention. The methods described herein advantageously facilitates profile and dimension control of features with high aspect ratios through a sidewall passivation management scheme. In one embodiment, sidewall passivations are managed by selectively forming an oxidation passivation layer on the sidewall and/or bottom of etched layers. In another embodiment, sidewall passivation is managed by periodically clearing the overburden redeposition layer to preserve an even and uniform passivation layer thereon. The even and uniform passivation allows the features with high aspect ratios to be incrementally etched in a manner that pertains a desired depth and vertical profile of critical dimension in both high and low feature density regions on the substrate without generating defects and/or overetching the underneath layers.
    Type: Application
    Filed: February 27, 2006
    Publication date: August 30, 2007
    Inventors: Uwe Leucke, Meihua Shen, Guangxiang Jin, Xikun Wang, Wei Liu, Scott Williams
  • Publication number: 20070199922
    Abstract: Methods for forming anisotropic features for high aspect ratio application in etch process are provided in the present invention. The methods described herein advantageously facilitates profile and dimension control of features with high aspect ratios through a sidewall passivation management scheme. In one embodiment, sidewall passivations are managed by selectively forming an oxidation passivation layer on the sidewall and/or bottom of etched layers. In another embodiment, sidewall passivation is managed by periodically clearing the overburden redeposition layer to preserve an even and uniform passivation layer thereon. The even and uniform passivation allows the features with high aspect ratios to be incrementally etched in a manner that pertains a desired depth and vertical profile of critical dimension in both high and low feature density regions on the substrate without generating defects and/or overetching the underneath layers.
    Type: Application
    Filed: February 27, 2006
    Publication date: August 30, 2007
    Inventors: Meihua Shen, Uwe Leucke, Guangxiang Jin, Xikun Wang, Wei Liu, Scott Williams
  • Patent number: 7217665
    Abstract: A method of plasma etching a layer of dielectric material having a dielectric constant that is greater than four (4). The method includes exposing the dielectric material layer to a plasma comprising a hydrocarbon gas and a halogen containing gas.
    Type: Grant
    Filed: November 20, 2002
    Date of Patent: May 15, 2007
    Assignee: Applied Materials, Inc.
    Inventors: Padmapani C. Nallan, Guangxiang Jin, Ajay Kumar
  • Publication number: 20070077767
    Abstract: A method of etching high dielectric constant materials using a halogen gas, a reducing gas and an etch rate control gas chemistry.
    Type: Application
    Filed: August 14, 2006
    Publication date: April 5, 2007
    Applicant: Applied Materials, Inc.
    Inventors: Guangxiang Jin, Padmapani Nallan, Ajay Kumar
  • Publication number: 20060252265
    Abstract: An apparatus and a method for etching high dielectric constant (high-?) materials using halogen containing gas and reducing gas chemistries are provided. One embodiment of the method is accomplished by etching a layer using two etch gas chemistries in separate steps. The first etch gas chemistry contain no oxygen containing gas in order to break through etching of the high dielectric constant materials, to dean any residues left from previous polysilicon etch process resulting in less high-? foot, and also to control silicon recess problem associated with an underlying silicon oxide layer. The second over-etch gas chemistry provides a high etch selectivity for high dielectric constant materials over silicon oxide materials to be combined with low source power to further reduce silicon substrate oxidation problem.
    Type: Application
    Filed: May 11, 2005
    Publication date: November 9, 2006
    Inventors: Guangxiang Jin, Meihua Shen
  • Patent number: 7094704
    Abstract: A method of etching high dielectric constant materials using a halogen gas, a reducing gas and an etch rate control gas chemistry.
    Type: Grant
    Filed: May 9, 2002
    Date of Patent: August 22, 2006
    Assignee: Applied Materials, Inc.
    Inventors: Guangxiang Jin, Padmapani Nallan, Ajay Kumar
  • Publication number: 20060060565
    Abstract: A method of plasma etching a metal layer (e.g., titanium (Ti), tantalum (Ta), tungsten (W), and the like) or a metal-containing layer (e.g., tantalum silicon nitride (TaSiN), titanium nitride (TiN), tungsten nitride (WN), and the like) formed on a hafnium-based dielectric material is disclosed. The metal/metal-containing layer is etched using a gas mixture comprising a halogen-containing gas and a fluorine-containing gas. The fluorine within the gas mixture provides a high etch selectivity for the hafnium-based dielectric material.
    Type: Application
    Filed: April 17, 2003
    Publication date: March 23, 2006
    Inventors: Padmapani Nallan, Ajay Kumar, Guangxiang Jin
  • Patent number: 6893893
    Abstract: A method for preventing electrical short circuits in a multi-layer magnetic film stack comprises providing a film stack that includes a layer of magnetic material having an exposed surface. A protective layer is deposited on the exposed surface of the magnetic layer. The protective layer may comprise, for example, a fluorocarbon or a hydrofluorocarbon. The film stack is etched and the protective layer protects the exposed surface from a conductive residue produced while etching the film stack. The method may be used in film stacks to form a magneto-resistive random access memory (MRAM) device.
    Type: Grant
    Filed: September 4, 2002
    Date of Patent: May 17, 2005
    Inventors: Padmapani C. Nallan, Ajay Kumar, Jeng H. Hwang, Guangxiang Jin, Ralph Kerns
  • Patent number: 6821907
    Abstract: A method and apparatus for etching a magnetic memory cell stack are described. More particularly, HCl is used as a main etchant gas for etching a magnetic memory cell stack. HCl is used in part to reduce corrosion and improve selectivity. Additionally, use of an amorphous carbon or hydrocarbon based polymer resin for a hard mask is described, as well as a post-etch passivation with a water rinse, a water vapor plasma treatment or an ammonia plasma treatment. Moreover, in an embodiment, a diffusion barrier layer dispose most of the magnetic memory cell stack is etched with hydrogen and fluorine containing gas in a separate process chambers.
    Type: Grant
    Filed: March 6, 2002
    Date of Patent: November 23, 2004
    Inventors: Jeng H. Hwang, Guangxiang Jin, Xiaoyi Chen
  • Publication number: 20040206724
    Abstract: A method of plasma etching a metal layer (e.g., titanium (Ti), tantalum (Ta), tungsten (W), and the like) or a metal-containing layer (e.g., tantalum silicon nitride (TaSiN), titanium nitride (TiN), tungsten nitride (WN), and the like) formed on a hafnium-based dielectric material is disclosed. The metal/metal-containing layer is etched using a gas mixture comprising a halogen-containing gas and a fluorine-containing gas. The fluorine within the gas mixture provides a high etch selectivity for the hafnium-based dielectric material.
    Type: Application
    Filed: April 17, 2003
    Publication date: October 21, 2004
    Applicant: Applied Materials, Inc.
    Inventors: Padmapani C. Nallan, Ajay Kumar, Guangxiang Jin
  • Patent number: 6806095
    Abstract: A method of etching high dielectric constant materials using halogen gas and reducing gas chemistry. An embodiment of the method is accomplished using a 20 to 300 sccm of chlorine and 2 to 200 sccm of carbon monoxide, regulated to a total chamber pressure of 2-100 mTorr to etch a hafnium oxide layer.
    Type: Grant
    Filed: March 6, 2002
    Date of Patent: October 19, 2004
    Inventors: Padmapani C. Nallan, Guangxiang Jin, Ajay Kumar
  • Publication number: 20040173572
    Abstract: A method of etching high dielectric constant materials using halogen gas and reducing gas chemistry. An embodiment of the method is accomplished using a 20 to 300 sccm of chlorine and 2 to 200 sccm of carbon monoxide, regulated to a total chamber pressure of 2-100 mTorr to etch a hafnium oxide layer.
    Type: Application
    Filed: March 22, 2004
    Publication date: September 9, 2004
    Applicant: Applied Materials, Inc.
    Inventors: Padmapani C. Nallan, Guangxiang Jin, Ajay Kumar
  • Publication number: 20040171272
    Abstract: A method of fabricating a structure having a tapered profile using a low temperature plasma etch (LTPE) process. In one embodiment, the LTPE process uses a gas comprising carbon tetrafluoride (CF4), trifluoromethane (CHF3), and nitrogen (N2) to fabricate the structure from a material layer of at least one of tantalum (Ta), tantalum nitride (TaN), and the like.
    Type: Application
    Filed: February 28, 2003
    Publication date: September 2, 2004
    Applicant: Applied Materials, Inc.
    Inventors: Guangxiang Jin, Padmapani C. Nallan, Chun Yan, Ajay Kumar
  • Patent number: 6767824
    Abstract: A method of fabricating a gate structure of a field effect transistor comprising processes of forming an &agr;-carbon mask and plasma etching a gate electrode and a gate dielectric using the &agr;-carbon mask. In one embodiment, the gate dielectric comprises hafnium dioxide.
    Type: Grant
    Filed: January 6, 2003
    Date of Patent: July 27, 2004
    Inventors: Padmapani C. Nallan, Ajay Kumar, Guangxiang Jin, Wei Liu
  • Publication number: 20040132311
    Abstract: A method of etching a dielectric layer having a dielectric constant that is greater than 4.0 on a semiconductor substrate using a pulsed substrate biasing technique (PSBT) that applies a plurality of processing cycles to the substrate, where each cycle comprises a period of plasma etching without substrate bias and a period of plasma etching with the substrate bias.
    Type: Application
    Filed: January 6, 2003
    Publication date: July 8, 2004
    Applicant: Applied Materials, Inc.
    Inventors: Padmapani C. Nallan, Guangxiang Jin, Ajay Kumar
  • Publication number: 20040097092
    Abstract: A method of plasma etching a layer of dielectric material having a dielectric constant that is greater than four (4). The method includes exposing the dielectric material layer to a plasma comprising a hydrocarbon gas and a halogen containing gas.
    Type: Application
    Filed: November 20, 2002
    Publication date: May 20, 2004
    Applicant: Applied Materials, Inc.
    Inventors: Padmapani C. Nallan, Guangxiang Jin, Ajay Kumar
  • Patent number: 6730561
    Abstract: A simple method of forming a cup capacitor is disclosed. The method typically involves only “dry” deposition and etching steps, allowing applicants' method to be performed in a single processing apparatus, if so desired.
    Type: Grant
    Filed: June 6, 2001
    Date of Patent: May 4, 2004
    Assignee: Applied Materials, Inc.
    Inventors: Jeng H. Hwang, Guangxiang Jin