Abstract: A multilayer wiring substrate includes a first wiring substrate including a plurality of stacked layers made of a thermosetting resin and having a wiring layer formed between each adjacent layers of the layers in a state in contact with the adjacent layers; a second wiring substrate made of a ceramic; and a joining layer disposed between a back surface of the first wiring substrate and a front surface of the second wiring substrate and configured to join the first wiring substrate and the second wiring substrate to each other. At least a surface of the joining layer adjacent to the second wiring substrate is made of a thermoplastic resin.

Abstract: A wiring board includes: an insulator layer composed mainly of ceramic; a conductor extending through the insulator layer in a thickness direction thereof; and an electrode pad disposed on a first surface of the insulator layer and connected electrically with the conductor, wherein: the electrode pad includes through holes extending through the electrode pad in a thickness direction thereof; and each of the through holes is positioned to avoid overlapping with the conductor in the thickness direction of the insulator layer.

Abstract: A wiring board includes: a ceramic board including a ceramic insulator layer composed mainly of ceramic, and a wiring disposed at the ceramic insulator layer; a first resin board and a second resin board each of which includes a resin insulator layer composed mainly of resin, and a wiring disposed at the resin insulator layer; and a metal member mounted to the second resin board. The first resin board is superposed to a first surface of the ceramic board. The second resin board is superposed to a second surface of the ceramic board opposite to the first surface of the ceramic board. The second resin board includes a joint pad at its first surface opposite to its second surface facing the ceramic board, the joint pad made of metal. The metal member is joined to the joint pad by brazing or soldering.

Abstract: [Objective] To provide a wiring substrate for electronic component inspection apparatus which includes a first laminate of resin layers with a plurality of pads for probe provided on its front surface and a second laminate of ceramic layers disposed on the back side of the first laminate and which, despite joining by brazing of a plurality of studs to the back surface of the second laminate, is free from deformation of resin of the first laminate caused by softening or the like and from accidental formation of a short circuit between brazing material layers used for the brazing and external connection terminals formed on the back surface of the second laminate.

Abstract: A wiring board includes: an insulator layer composed mainly of ceramic; a conductor extending through the insulator layer in a thickness direction thereof; and an electrode pad disposed on a first surface of the insulator layer and connected electrically with the conductor, wherein: the electrode pad includes through holes extending through the electrode pad in a thickness direction thereof; and each of the through holes is positioned to avoid overlapping with the conductor in the thickness direction of the insulator layer.

Abstract: A wiring board includes: a ceramic board including a ceramic insulator layer composed mainly of ceramic, and a wiring disposed at the ceramic insulator layer; a first resin board and a second resin board each of which includes a resin insulator layer composed mainly of resin, and a wiring disposed at the resin insulator layer; and a metal member mounted to the second resin board. The first resin board is superposed to a first surface of the ceramic board. The second resin board is superposed to a second surface of the ceramic board opposite to the first surface of the ceramic board. The second resin board includes a joint pad at its first surface opposite to its second surface facing the ceramic board, the joint pad made of metal. The metal member is joined to the joint pad by brazing or soldering.

Abstract: [Objective] To provide a wiring substrate for electronic component inspection apparatus which includes a first laminate of resin layers with a plurality of pads for probe provided on its front surface and a second laminate of ceramic layers disposed on the back side of the first laminate and which, despite joining by brazing of a plurality of studs to the back surface of the second laminate, is free from deformation of resin of the first laminate caused by softening or the like and from accidental formation of a short circuit between brazing material layers used for the brazing and external connection terminals formed on the back surface of the second laminate.

Abstract: Disclosed is a wiring board for simultaneously testing of multiple semiconductor devices. The wiring board includes a multilayer ceramic substrate, an organic wiring structure arranged on the multilayer ceramic substrate, a plurality of capacitor connection pads formed on the organic wiring structure and a plurality of test pads formed on the organic wiring structure. The organic wiring structure has a plurality of inner conductor layers including first and second plane layers. Each of the first plane layers is divided in a plurality of regions. Each of the second plane layer(s) is placed in a different layer from the first plane layers and made larger in area than the first plane layers. At least a part of the test pads of each test pad group is electrically connected to at least a part of the connection pads via an outermost one of the first plane layers.

Abstract: Disclosed is a wiring board for simultaneously testing of multiple semiconductor devices. The wiring board includes a multilayer ceramic substrate, an organic wiring structure arranged on the multilayer ceramic substrate, a plurality of capacitor connection pads formed on the organic wiring structure and a plurality of test pads formed on the organic wiring structure. The organic wiring structure has a plurality of inner conductor layers including first and second plane layers. Each of the first plane layers is divided in a plurality of regions. Each of the second plane layer(s) is placed in a different layer from the first plane layers and made larger in area than the first plane layers. At least a part of the test pads of each test pad group is electrically connected to at least a part of the connection pads via an outermost one of the first plane layers.