Patents by Inventor Guo-Chiang CHI

Guo-Chiang CHI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200066587
    Abstract: A method for forming a semiconductor device structure includes providing a substrate and forming a gate electrode on the substrate. A first contact structure is formed in and on the gate electrode. The first contact structure comprises a first portion and a second portion. The first portion is formed in the gate electrode, and the second portion is formed on the first portion.
    Type: Application
    Filed: November 4, 2019
    Publication date: February 27, 2020
    Inventors: Guo-Chiang CHI, Chia-Der CHANG, Chih-Hung LU, Wei-Chin CHEN
  • Patent number: 10468299
    Abstract: A method for forming a semiconductor device structure includes providing a substrate and forming a gate electrode on the substrate. A first contact structure is formed in and on the gate electrode. The first contact structure comprises a first portion and a second portion. The first portion is formed in the gate electrode, and the second portion is formed on the first portion.
    Type: Grant
    Filed: March 2, 2018
    Date of Patent: November 5, 2019
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Guo-Chiang Chi, Chia-Der Chang, Chih-Hung Lu, Wei-Chin Chen
  • Publication number: 20180197775
    Abstract: A method for forming a semiconductor device structure includes providing a substrate and forming a gate electrode on the substrate. A first contact structure is formed in and on the gate electrode. The first contact structure comprises a first portion and a second portion. The first portion is formed in the gate electrode, and the second portion is formed on the first portion.
    Type: Application
    Filed: March 2, 2018
    Publication date: July 12, 2018
    Inventors: Guo-Chiang CHI, Chia-Der CHANG, Chih-Hung LU, Wei-Chin CHEN
  • Patent number: 9911650
    Abstract: A method for forming a semiconductor device structure includes providing a substrate and forming a gate electrode on the substrate. A first contact structure is formed in and on the gate electrode. The first contact structure comprises a first portion and a second portion. The first portion is formed in the gate electrode, and the second portion is formed on the first portion.
    Type: Grant
    Filed: October 20, 2016
    Date of Patent: March 6, 2018
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Guo-Chiang Chi, Chia-Der Chang, Chih-Hung Lu, Wei-Chin Chen
  • Publication number: 20170040215
    Abstract: A method for forming a semiconductor device structure includes providing a substrate and forming a gate electrode on the substrate. A first contact structure is formed in and on the gate electrode. The first contact structure comprises a first portion and a second portion. The first portion is formed in the gate electrode, and the second portion is formed on the first portion.
    Type: Application
    Filed: October 20, 2016
    Publication date: February 9, 2017
    Inventors: Guo-Chiang CHI, Chia-Der CHANG, Chih-Hung LU, Wei-Chin CHEN
  • Patent number: 9496367
    Abstract: A method for forming a semiconductor device is provided. The method includes providing a semiconductor substrate, a metal gate stack, and an insulating layer formed over the semiconductor substrate. A source region and a drain region are formed in the semiconductor substrate. The metal gate stack is between the source region and the drain region. The insulating layer surrounds the metal gate stack. The method includes forming contact openings passing through the insulating layer to expose the source region and the drain region, respectively. The method includes performing a first pre-amorphized implantation process to form amorphous regions in the source region and the drain region exposed by the contact openings. The method includes after the first pre-amorphized implantation process, forming a dielectric spacer liner layer over sidewalls of the contact openings. The dielectric spacer liner layer has holes exposing portions of the amorphous regions, respectively.
    Type: Grant
    Filed: December 22, 2015
    Date of Patent: November 15, 2016
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Tien-Chun Wang, Yi-Chun Lo, Chia-Der Chang, Guo-Chiang Chi, Chia-Ping Lo, Fu-Kai Yang, Hung-Chang Hsu, Mei-Yun Wang
  • Patent number: 9478626
    Abstract: A semiconductor device structure and method for forming the semiconductor device structure are provided. The semiconductor device structure includes a substrate and a gate electrode formed on the substrate. The semiconductor device structure also includes a first contact structure including a first portion and a second portion. The first portion of the first contact structure is formed in the gate electrode, and the second portion is formed on the first portion.
    Type: Grant
    Filed: December 19, 2014
    Date of Patent: October 25, 2016
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Guo-Chiang Chi, Chia-Der Chang, Chih-Hung Lu, Wei-Chin Chen
  • Publication number: 20160181386
    Abstract: A semiconductor device structure and method for forming the semiconductor device structure are provided. The semiconductor device structure includes a substrate and a gate electrode formed on the substrate. The semiconductor device structure also includes a first contact structure including a first portion and a second portion. The first portion of the first contact structure is formed in the gate electrode, and the second portion is formed on the first portion.
    Type: Application
    Filed: December 19, 2014
    Publication date: June 23, 2016
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD
    Inventors: Guo-Chiang CHI, Chia-Der CHANG, Chih-Hung LU, Wei-Chin CHEN
  • Publication number: 20160118471
    Abstract: A method for forming a semiconductor device is provided. The method includes providing a semiconductor substrate, a metal gate stack, and an insulating layer formed over the semiconductor substrate. A source region and a drain region are formed in the semiconductor substrate. The metal gate stack is between the source region and the drain region. The insulating layer surrounds the metal gate stack. The method includes forming contact openings passing through the insulating layer to expose the source region and the drain region, respectively. The method includes performing a first pre-amorphized implantation process to form amorphous regions in the source region and the drain region exposed by the contact openings. The method includes after the first pre-amorphized implantation process, forming a dielectric spacer liner layer over sidewalls of the contact openings. The dielectric spacer liner layer has holes exposing portions of the amorphous regions, respectively.
    Type: Application
    Filed: December 22, 2015
    Publication date: April 28, 2016
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Tien-Chun WANG, Yi-Chun LO, Chia-Der CHANG, Guo-Chiang CHI, Chia-Ping LO, Fu-Kai YANG, Hung-Chang HSU, Mei-Yun WANG
  • Patent number: 9231098
    Abstract: Embodiments of mechanisms for forming a semiconductor device are provided. The semiconductor device includes a semiconductor substrate. A source region and a drain region are formed in the semiconductor substrate, and metal silicide regions are formed in the source region and the drain region, respectively. The semiconductor device further includes a metal gate stack formed over the semiconductor substrate and between the source region and the drain region. The semiconductor device also includes an insulating layer formed over the semiconductor substrate and surrounding the metal gate stack, wherein the insulating layer has contact openings exposing the metal silicide regions, respectively. The semiconductor device includes a dielectric spacer liner layer formed over inner walls of the contact openings, wherein the whole of the dielectric spacer liner layer is right above the metal silicide regions. The semiconductor device includes contact plugs formed in the contact openings.
    Type: Grant
    Filed: October 30, 2013
    Date of Patent: January 5, 2016
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Tien-Chun Wang, Yi-Chun Lo, Chia-Der Chang, Guo-Chiang Chi, Chia-Ping Lo, Fu-Kai Yang, Hung-Chang Hsu, Mei-Yun Wang
  • Publication number: 20150115335
    Abstract: Embodiments of mechanisms for forming a semiconductor device are provided. The semiconductor device includes a semiconductor substrate. A source region and a drain region are formed in the semiconductor substrate, and metal silicide regions are formed in the source region and the drain region, respectively. The semiconductor device further includes a metal gate stack formed over the semiconductor substrate and between the source region and the drain region. The semiconductor device also includes an insulating layer formed over the semiconductor substrate and surrounding the metal gate stack, wherein the insulating layer has contact openings exposing the metal silicide regions, respectively. The semiconductor device includes a dielectric spacer liner layer formed over inner walls of the contact openings, wherein the whole of the dielectric spacer liner layer is right above the metal silicide regions. The semiconductor device includes contact plugs formed in the contact openings.
    Type: Application
    Filed: October 30, 2013
    Publication date: April 30, 2015
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd
    Inventors: Tien-Chun WANG, Yi-Chun LO, Chia-Der CHANG, Guo-Chiang CHI, Chia-Ping LO, Fu-Kai YANG, Hung-Chang HSU, Mei-Yun WANG