Patents by Inventor Gurtej Sandhu

Gurtej Sandhu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8718466
    Abstract: A wave division multiplexing (WDM) system is disclosed which accommodates shifts in the resonant frequency of optical modulators by using at least two carriers per optical communications channel and at least two resonant modulator circuits respectively associated with the carriers within each optical modulator. A first resonant modulator circuit resonates with a first carrier and a second resonates with a second carrier when there is a shift in resonance frequency of the at least two resonant optical modulator circuits. A switch circuit controls which carrier is being modulated by its respective resonant modulator circuit.
    Type: Grant
    Filed: July 12, 2012
    Date of Patent: May 6, 2014
    Assignee: Micron Technology Inc.
    Inventors: Roy Meade, Gurtej Sandhu
  • Patent number: 8703396
    Abstract: Some embodiments include methods of forming patterns of openings. The methods may include forming spaced features over a substrate. The features may have tops and may have sidewalls extending downwardly from the tops. A first material may be formed along the tops and sidewalls of the features. The first material may be formed by spin-casting a conformal layer of the first material across the features, or by selective deposition along the features relative to the substrate. After the first material is formed, fill material may be provided between the features while leaving regions of the first material exposed. The exposed regions of the first material may then be selectively removed relative to both the fill material and the features to create the pattern of openings.
    Type: Grant
    Filed: December 11, 2012
    Date of Patent: April 22, 2014
    Assignee: Micron Technology, Inc.
    Inventors: Scott Sllls, Gurtej Sandhu, John Smythe, Ming Zhang
  • Publication number: 20140097503
    Abstract: A memory array that includes access devices that are each electrically coupled to more than one memory cell. The memory cells are coupled to the access devices via diode devices. The access devices include vertical semiconductor material mesas upstanding from a semiconductor base that form a conductive channel between first and second doped regions, and also planar access devices.
    Type: Application
    Filed: December 13, 2013
    Publication date: April 10, 2014
    Applicant: MICRON TECHNOLOGY, INC.
    Inventor: Gurtej Sandhu
  • Publication number: 20140094026
    Abstract: An integrated circuit and a method of formation provide a contact area formed at an angled end of at least one linearly extending conductive line. In an embodiment, conductive lines with contact landing pads are formed by patterning lines in a mask material, cutting at least one of the material lines to form an angle relative to the extending direction of the material lines, forming extensions from the angled end faces of the mask material, and patterning an underlying conductor by etching using said material lines and extension as a mask. In another embodiment, at least one conductive line is cut at an angle relative to the extending direction of the conductive line to produce an angled end face, and an electrical contact landing pad is formed in contact with the angled end face.
    Type: Application
    Filed: December 4, 2013
    Publication date: April 3, 2014
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: Gurtej Sandhu, Scott Sills
  • Patent number: 8686411
    Abstract: Self-aligning fabrication methods for forming memory access devices comprising a doped chalcogenide material. The methods may be used for forming three-dimensionally stacked cross point memory arrays. The method includes forming an insulating material over a first conductive electrode, patterning the insulating material to form vias that expose portions of the first conductive electrode, forming a memory access device within the vias of the insulating material and forming a memory element over the memory access device, wherein data stored in the memory element is accessible via the memory access device. The memory access device is formed of a doped chalcogenide material and formed using a self-aligned fabrication method.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: April 1, 2014
    Assignee: Micron Technology, Inc.
    Inventors: Neil Greeley, Bhaskar Srinivasan, Gurtej Sandhu, John Smythe
  • Patent number: 8686487
    Abstract: Semiconductor devices include one or more transistors having a floating gate and a control gate. In at least one embodiment, the floating gate comprises an intermediate portion extending between two end portions. The intermediate portion has an average cross-sectional area less than one or both of the end portions. In some embodiments, the intermediate portion may comprise a single nanowire. In additional embodiments, semiconductor devices have one or more transistors having a control gate and a floating gate in which a surface of the control gate opposes a lateral side surface of a floating gate that defines a recess in the floating gate. Electronic systems include such semiconductor devices. Methods of forming semiconductor devices include, for example, forming a floating gate having an intermediate portion extending between two end portions, and configuring the intermediate portion to have an average cross-sectional area less than one or both of the end portions.
    Type: Grant
    Filed: June 14, 2007
    Date of Patent: April 1, 2014
    Assignee: Micron Technology, Inc.
    Inventors: Gurtej Sandhu, Chandra Mouli, Di Li
  • Publication number: 20140087563
    Abstract: Multiple pitch-multiplied spacers are used to form mask patterns having features with exceptionally small critical dimensions. One of each pair of spacers formed mandrels is removed and alternating layers, formed of two mutually selectively etchable materials, are deposited around the remaining spacers. Layers formed of one of the materials are then etched, leaving behind vertically-extending layers formed of the other of the materials, which form a mask pattern. Alternatively, instead of depositing alternating layers, amorphous carbon is deposited around the remaining spacers followed by a plurality of cycles of forming pairs of spacers on the amorphous carbon, removing one of the pairs of spacers and depositing an amorphous carbon layer. The cycles can be repeated to form the desired pattern. Because the critical dimensions of some features in the pattern can be set by controlling the width of the spaces between spacers, exceptionally small mask features can be formed.
    Type: Application
    Filed: December 2, 2013
    Publication date: March 27, 2014
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: Sanket Sant, Gurtej Sandhu, Neal R. Rueger
  • Patent number: 8682129
    Abstract: A photonic device and methods of formation that provide an area providing reduced optical coupling between a substrate and an inner core of the photonic device are described. The area is formed using holes in the inner core and an outer cladding. The holes may be filled with materials which provide a photonic crystal. Thus, the photonic device may function as a waveguide and as a photonic crystal.
    Type: Grant
    Filed: January 20, 2012
    Date of Patent: March 25, 2014
    Assignee: Micron Technology, Inc.
    Inventors: Gurtej Sandhu, Roy Meade
  • Patent number: 8665640
    Abstract: A magnetic memory cell including a soft magnetic layer and a coupling layer, and methods of operating the memory cell are provided. The memory cell includes a stack with a free ferromagnetic layer and a pinned ferromagnetic layer, and a soft magnetic layer and a coupling layer may also be formed as layers in the stack. The coupling layer may cause antiferromagnetic coupling to induce the free ferromagnetic layer to be magnetized in a direction antiparallel to the magnetization of the soft magnetic layer, or the coupling layer may cause ferromagnetic coupling to induce the free ferromagnetic layer to be magnetized in a direction parallel to the magnetization of the soft magnetic layer. The coupling layer, through a coupling effect, reduces the critical switching current of the memory cell.
    Type: Grant
    Filed: July 9, 2012
    Date of Patent: March 4, 2014
    Assignee: Micron Technologies, Inc.
    Inventors: Jun Liu, Gurtej Sandhu
  • Patent number: 8652934
    Abstract: A method of forming a substrate with isolation areas suitable for integration of electronic and photonic devices is provided. A common reticle and photolithographic technique is used to fabricate a mask defining openings for etching first and second areas in a substrate, with the openings for the second trench isolation areas being wider than the openings for the first trench isolation areas. The first and second trench isolation areas are etched in the substrate through the mask and filled with an oxide material. The oxide material is removed from the bottom of the second trench isolation areas. The second trench isolation areas are further etched to the deeper than the first trench isolation areas, and are then filled with oxide material. Electrical devices can be formed on the substrate and electrically isolated by the first trench isolation areas and photonic devices can be formed over the second trench isolation areas and be optically isolated from the substrate.
    Type: Grant
    Filed: December 26, 2012
    Date of Patent: February 18, 2014
    Assignee: Micron Technology, Inc.
    Inventors: Roy Meade, Gurtej Sandhu
  • Patent number: 8648428
    Abstract: A memory array that includes access devices that are each electrically coupled to more than one memory cell. The memory cells are coupled to the access devices via diode devices. The access devices include vertical semiconductor material mesas upstanding from a semiconductor base that form a conductive channel between first and second doped regions, and also planar access devices.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: February 11, 2014
    Assignee: Micron Technology, Inc.
    Inventor: Gurtej Sandhu
  • Patent number: 8644649
    Abstract: A silicon optical waveguide for transmitting an optical signal input to the optical waveguide with a first frequency. The optical waveguide includes a plurality of modulator circuits configured along a silicon optical transmission channel. Each modulator circuit includes at least one resonant structure that resonates at the first frequency when the modulator circuit that includes the at least one resonant structure is at a resonant temperature. Each modulator circuit has a different resonant temperature.
    Type: Grant
    Filed: May 27, 2011
    Date of Patent: February 4, 2014
    Assignee: Micron Technology, Inc.
    Inventors: Roy Meade, Gurtej Sandhu
  • Patent number: 8637113
    Abstract: A method of forming a non-volatile resistive oxide memory array includes forming a plurality of one of conductive word lines or conductive bit lines over a substrate. Metal oxide-comprising material is formed over the plurality of said one of the word lines or bit lines. A series of elongated trenches is provided over the plurality of said one of the word lines or bit lines. A plurality of self-assembled block copolymer lines is formed within individual of the trenches in registered alignment with and between the trench sidewalls. A plurality of the other of conductive word lines or conductive bit lines is provided from said plurality of self-assembled block copolymer lines to form individually programmable junctions comprising said metal oxide-comprising material where the word lines and bit lines cross one another.
    Type: Grant
    Filed: January 19, 2012
    Date of Patent: January 28, 2014
    Assignee: Micron Technology, Inc.
    Inventors: Gurtej Sandhu, John Smythe, Bhaskar Srinivasan
  • Publication number: 20140024141
    Abstract: A magnetic cell structure including a nonmagnetic bridge, and methods of fabricating the structure are provided. The magnetic cell structure includes a free layer, a pinned layer, and a nonmagnetic bridge electrically connecting the free layer and the pinned layer. The shape and/or configuration of the nonmagnetic bridge directs a programming current through the magnetic cell structure such that the cross sectional area of the programming current in the free layer of the structure is less than the cross section of the structure. The decrease in the cross sectional area of the programming current in the free layer enables a lower programming current to reach a critical switching current density in the free layer and switch the magnetization of the free layer, programming the magnetic cell.
    Type: Application
    Filed: September 25, 2013
    Publication date: January 23, 2014
    Applicant: Micron Technology, Inc.
    Inventors: Jun Liu, Gurtej Sandhu
  • Publication number: 20140016931
    Abstract: A wave division multiplexing (WDM) system is disclosed which accommodates shifts in the resonant frequency of optical modulators by using at least two carriers per optical communications channel and at least two resonant modulator circuits respectively associated with the carriers within each optical modulator. A first resonant modulator circuit resonates with a first carrier and a second resonates with a second carrier when there is a shift in resonance frequency of the at least two resonant optical modulator circuits. A switch circuit controls which carrier is being modulated by its respective resonant modulator circuit.
    Type: Application
    Filed: July 12, 2012
    Publication date: January 16, 2014
    Inventors: Roy Meade, Gurtej Sandhu
  • Patent number: 8629051
    Abstract: An integrated circuit and a method of formation provide a contact area formed at an angled end of at least one linearly extending conductive line. In an embodiment, conductive lines with contact landing pads are formed by patterning lines in a mask material, cutting at least one of the material lines to form an angle relative to the extending direction of the material lines, forming extensions from the angled end faces of the mask material, and patterning an underlying conductor by etching using said material lines and extension as a mask. In another embodiment, at least one conductive line is cut at an angle relative to the extending direction of the conductive line to produce an angled end face, and an electrical contact landing pad is formed in contact with the angled end face.
    Type: Grant
    Filed: January 28, 2013
    Date of Patent: January 14, 2014
    Assignee: Micron Technology, Inc.
    Inventors: Gurtej Sandhu, Scott Sills
  • Publication number: 20140010494
    Abstract: Disclosed are methods of providing a hermetically sealed optical connection between an optical fiber and an optical element of a chip and a photonic-integrated chip manufactured using such methods.
    Type: Application
    Filed: July 6, 2012
    Publication date: January 9, 2014
    Inventors: Roy Meade, Gurtej Sandhu
  • Patent number: 8617958
    Abstract: Some embodiments include methods of forming diodes. A stack may be formed over a first conductive material. The stack may include, in ascending order, a sacrificial material, at least one dielectric material, and a second conductive material. Spacers may be formed along opposing sidewalls of the stack, and then an entirety of the sacrificial material may be removed to leave a gap between the first conductive material and the at least one dielectric material. In some embodiments of forming diodes, a layer may be formed over a first conductive material, with the layer containing supports interspersed in sacrificial material. At least one dielectric material may be formed over the layer, and a second conductive material may be formed over the at least one dielectric material. An entirety of the sacrificial material may then be removed.
    Type: Grant
    Filed: November 26, 2012
    Date of Patent: December 31, 2013
    Assignee: Micron Technology, Inc.
    Inventors: Gurtej Sandhu, Bhaskar Srinivasan
  • Publication number: 20130336613
    Abstract: Described embodiments include photonic integrated circuits and systems with photonic devices, including thermal isolation regions for the photonic devices. Methods of fabricating such circuits and systems are also described.
    Type: Application
    Filed: June 15, 2012
    Publication date: December 19, 2013
    Inventors: Roy Meade, Gurtej Sandhu
  • Patent number: 8609221
    Abstract: Methods for fabricating sublithographic, nanoscale microstructures arrays including openings and linear microchannels utilizing self-assembling block copolymers, and films and devices formed from these methods are provided. In some embodiments, the films can be used as a template or mask to etch openings in an underlying material layer.
    Type: Grant
    Filed: July 12, 2010
    Date of Patent: December 17, 2013
    Assignee: Micron Technology, Inc.
    Inventors: Dan B. Millward, Donald Westmoreland, Gurtej Sandhu