Patents by Inventor Gustavo A. Suarez
Gustavo A. Suarez has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20180038089Abstract: An apparatus, system and method for a receptacle suitable for control, data collection, and remote management. An exemplary receptacle may include a basin for receiving at least one viscous element; at least one sensor physically associated with the basin; and at least one actuator responsive to the at least one sensor, wherein actuation of the actuator outputs the viscous element to the basin. The receptacle may further include a controller at least partially physically proximate to the basin and capable of controlling the actuation of the at least one actuator; and a control system communicative with the local controller over at least open data path, wherein the control system imposes a plurality of rules to the controller.Type: ApplicationFiled: December 18, 2015Publication date: February 8, 2018Applicant: Jabil Circuit, Inc.Inventors: Barry CALDWELL, Gustavo SUAREZ
-
Patent number: 5508734Abstract: A system for electronic imaging of a hemispheric field of view includes a camera for receiving optical images of the field of view and for producing output data corresponding to the optical images. The camera includes an optical assembly for producing images throughout a hemispheric field of view for optical conveyance to an imaging device or photographic film. The optical system assembly has lens components that selectively emphasize the peripheral content of the hemispheric field of view. An electronic imaging device within the camera or a film-to-digital date conversion system provides digitized output signals to input image memory or electronic storage devices. A transform processor selectively accesses and processes the digitized output signals from the input image memory according to user-defined criteria and stores the signals in output image memory. The signals in the output image memory can then be displayed according to the user-defined criteria.Type: GrantFiled: July 27, 1994Date of Patent: April 16, 1996Assignee: International Business Machines CorporationInventors: Robert G. Baker, Kevin Kettler, Gustavo A. Suarez, Kenneth A. Uplinger, Candace J. F. Freedenberg
-
Patent number: 5434590Abstract: An information handling apparatus for transferring and composing image signals including a plurality of media sources configured to provide a corresponding plurality of image signals, a media bus connected to the media sources, and a media control module coupled to the media bus. The media bus allows selective access for the plurality of image signals. The selective access enables composition of the independent image signals in response to control information. The media control module receives a composed image signal from the media bus and provides the composed image signal to a display device.Type: GrantFiled: October 14, 1993Date of Patent: July 18, 1995Assignee: International Business Machines CorporationInventors: John M. Dinwiddie, Jr., Bobby J. Freeman, Gustavo A. Suarez, Bruce J. Wilkie
-
Patent number: 5434592Abstract: A multimedia solution is presented which allows a multimedia architecture to be implemented on an existing computer system. According to the invention, an expansion unit which incorporates a multimedia architecture is provided. The expansion unit is connected to an existing computer system via an expansion slot of an I/O bus of the existing computer as well as via a display device output terminal of the computer. The expansion unit is also connected to a display device. Accordingly, the expansion unit controls the presentation which is provided on the display device.Type: GrantFiled: September 17, 1993Date of Patent: July 18, 1995Assignee: International Business Machines CorporationInventors: John M. Dinwiddie, Jr., Bobby J. Freeman, Thomas J. Micallef, Gustavo A. Suarez, Bruce J. Wilkie
-
Patent number: 5363497Abstract: The functions of two virtual operating systems (e.g., S/370 VM, VSE or IX370 and S/88 OS) are merged into one physical system. Partner pairs of S/88 processors run the S/88 OS and handle the fault tolerant and single system image aspects of the system. One or more partner pairs of S/370 processors are coupled to corresponding S/88 processors directly and through the S/88 bus. Each S/370 processor is allocated from 1 to 16 megabytes of contiguous storage from the S/88 main storage. Each S/370 virtual operating system thinks its memory allocation starts at address 0, and it manages its memory through normal S/370 dynamic memory allocation and paging techniques, The S/370 is limit checked prevent the S/370 from accessing S/88 memory space. The S/88 Operating System is the master over all system hardware and I/O devices.Type: GrantFiled: September 30, 1993Date of Patent: November 8, 1994Assignee: IBM CorporationInventors: Ernest D. Baker, John M. Dinwiddie, Jr., Lonnie E. Grice, John M. Loffredo, Kenneth R. Sanderson, Gustavo A. Suarez
-
Patent number: 5325517Abstract: The functions of two virtual operating systems (e.g., S/370 VM, VSE or IX370 and S/88 OS) are merged into one physical system. Partner pairs of S/88 processors run the S/88 OS and handle the fault tolerant and single system image aspects of the system. One or more partner pairs of S/370 processors are coupled to corresponding S/88 processors directly and through the S/88 bus. Each S/370 processor is allocated from 1 to 16 megabytes of contiguous storage from the S/88 main storage. Each S/370 virtual operating system thinks its memory allocation starts at address 0, and it manages its memory through normal S/370 dynamic memory allocation and paging techniques. The S/370 is limit checked to prevent the S/370 from accessing S/88 memory space. The S/88 Operating System is the master over all system hardware and I/O devices.Type: GrantFiled: May 17, 1989Date of Patent: June 28, 1994Assignee: International Business Machines CorporationInventors: Ernest D. Baker, John M. Dinwiddie, Jr., Lonnie E. Grice, James M. Joyce, John M. Loffredo, Kenneth R. Sanderson, Gustavo A. Suarez
-
Patent number: 5245322Abstract: An information handling apparatus for transferring and composing image signals for display. The apparatus includes a bus adapted to allow selective access for multiple independent image signals generated by respective independent image sources. The selective access enables composition of the independent image signals in response to control information; the composition enables real time display of a composed image signal.Type: GrantFiled: December 11, 1990Date of Patent: September 14, 1993Assignee: International Business Machines CorporationInventors: John M. Dinwiddie, Jr., Bobby J. Freeman, Gustavo A. Suarez, Bruce J. Wilkie
-
Patent number: 5230041Abstract: An information handling apparatus for transferring and composing image signals for display including a bus interface circuit adapted to allow selective access to a bus of an independent image signal generated by an independent image source. The selective access enables composition of the independent image signal in response to control information; the composition enables real time display of a composed image signal.Type: GrantFiled: December 11, 1990Date of Patent: July 20, 1993Assignee: International Business Machines CorporationInventors: John M. Dinwiddie, Jr., Bobby J. Freeman, Gustavo A. Suarez, Bruce J. Wilkie
-
Patent number: 5175731Abstract: The invention is an N-bit arbitration circuit which includes N bit subcircuits, each of which provides a single bit output signal of an N-bit arbitration signal. The bit subcircuits include a more significant bit subcircuit and at least significant bit subcircuit. The more significant bit subcircuit includes a gate, which receives a more significant bit priority signal and an arbitration enable signal and provides a more significant bit output of the N-bit arbitration signal, and a pipeline circuit, which receives the more significant bit priority signal, the arbitration enable signal and the more significant bit output and provides a pipelined arbitration enable signal based upon the more significant bit priority signal, the arbitration enable signal and the more significant bit.Type: GrantFiled: December 11, 1990Date of Patent: December 29, 1992Assignee: International Business Machines CorporationInventor: Gustavo A. Suarez
-
Patent number: 5144692Abstract: The functions of two virtual operating systems (e.g., S/370 VM, VSE or IX370 and S/88 OS) are merged into one physical system. Partner pairs of S/88 processors run the S/88 OS and handle the fault tolerant and single system image aspects of the system. One or more partner pairs of S/370 processors are coupled to corresponding S/88 processors directly and through the S/88 bus. Each S/370 processor is allocated from 1 to 16 megabytes of contiguous storage from the S/88 main storage. Each S/370 virtual operating system thinks its memory allocation starts at address 0, and it manages its memory through normal S/370 dynamic memory allocation and paging techniques. The S/370 is limit checked to prevent the S/370 from accessing S/88 memory space. The S/88 Operating System is the master over all system hardware and I/O devices.Type: GrantFiled: May 17, 1989Date of Patent: September 1, 1992Assignee: International Business Machines CorporationInventors: Ernest D. Baker, John M. Dinwiddie, Jr., Lonnie E. Grice, John M. Loffredo, Kenneth R. Sanderson, Gustavo A. Suarez
-
Patent number: 5113522Abstract: The functions of two virtual operating systems (e.g., S/370 VM, VSE or IX370 and S/88 OS) are merged into one physical system. Partner pairs of S/88 processors run the S/88 OS and handle the fault tolerant and single system image aspects of the system. One or more partner pairs of S/370 processors are coupled to corresponding S/88 processors directly and through the S/88 bus. Each S/370 processor is allocated from 1 to 16 megabytes of contigous storage from the S/88 main storage. Each S/370 virtual operating system thinks its memory allocation starts at address 0, and it manages its memory through normal S/370 dynamic memory allocation and paging techniques. The S/370 is limit checked to prevent the S/370 from accessing S/88 memory space. The S/88 Operating System is the master over all system hardware and I/O devices.Type: GrantFiled: May 17, 1989Date of Patent: May 12, 1992Assignee: International Business Machines CorporationInventors: John M. Dinwiddie, Jr., Bobby J. Freeman, Lonnie E. Grice, John M. Loffredo, Kenneth R. Sanderson, Gustavo A. Suarez