Patents by Inventor Haideh Khorramabadi
Haideh Khorramabadi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8045066Abstract: An integrated receiver with channel selection and image rejection substantially implemented on a single CMOS integrated circuit is described. A receiver front end provides programmable attenuation and a programmable gain low noise amplifier. Frequency conversion circuitry advantageously uses LC filters integrated onto the substrate in conjunction with image reject mixers to provide sufficient image frequency rejection. Filter tuning and inductor Q compensation over temperature are performed on chip. The filters utilize multi track spiral inductors. The filters are tuned using local oscillators to tune a substitute filter, and frequency scaling during filter component values to those of the filter being tuned. In conjunction with filtering, frequency planning provides additional image rejection. The advantageous choice of local oscillator signal generation methods on chip is by PLL out of band local oscillation and by direct synthesis for in band local oscillator.Type: GrantFiled: September 16, 2010Date of Patent: October 25, 2011Assignee: Broadcom CorporationInventors: Pieter Vorenkamp, Klaas Bult, Frank Carr, Christopher M. Ward, Ralph Duncan, Tom W. Kwan, James Y. C. Chang, Haideh Khorramabadi
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Publication number: 20110067083Abstract: An integrated receiver with channel selection and image rejection substantially implemented on a single CMOS integrated circuit is described. A receiver front end provides programmable attenuation and a programmable gain low noise amplifier. Frequency conversion circuitry advantageously uses LC filters integrated onto the substrate in conjunction with image reject mixers to provide sufficient image frequency rejection. Filter tuning and inductor Q compensation over temperature are performed on chip. The filters utilize multi track spiral inductors. The filters are tuned using local oscillators to tune a substitute filter, and frequency scaling during filter component values to those of the filter being tuned. In conjunction with filtering, frequency planning provides additional image rejection. The advantageous choice of local oscillator signal generation methods on chip is by PLL out of band local oscillation and by direct synthesis for in band local oscillator.Type: ApplicationFiled: September 16, 2010Publication date: March 17, 2011Applicant: Broadcom CorporationInventors: Pieter Vorenkamp, Klaas Bult, Frank Carr, Christopher M. Ward, Ralph Duncan, Tom W. Kwan, James Y.C. Chang, Haideh Khorramabadi
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Patent number: 7821581Abstract: An integrated receiver with channel selection and image rejection substantially implemented on a single CMOS integrated circuit is described. A receiver front end provides programmable attenuation and a programmable gain low noise amplifier. Frequency conversion circuitry advantageously uses LC filters integrated onto the substrate in conjunction with image reject mixers to provide sufficient image frequency rejection. Filter tuning and inductor Q compensation over temperature are performed on chip. The filters utilize multi track spiral inductors. The filters are tuned using local oscillators to tune a substitute filter, and frequency scaling during filter component values to those of the filter being tuned. In conjunction with filtering, frequency planning provides additional image rejection. The advantageous choice of local oscillator signal generation methods on chip is by PLL out of band local oscillation and by direct synthesis for in band local oscillator.Type: GrantFiled: July 30, 2008Date of Patent: October 26, 2010Assignee: Broadcom CorporationInventors: Pieter Vorenkamp, Klaas Bult, Frank Carr, Christopher M. Ward, Ralph Duncan, Tom W. Kwan, James Y. C. Chang, Haideh Khorramabadi
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Patent number: 7696823Abstract: An integrated receiver with channel selection and image rejection substantially implemented on a single CMOS integrated circuit. A receiver front end provides programmable attenuation and a programmable gain low noise amplifier. LC filters integrated onto the substrate in conjunction with image reject mixers provide image frequency rejection. Filter tuning and inductor Q compensation over temperature are performed on chip. Active filters utilize multi track spiral inductors with shields to increase circuit Q. The filters incorporate a gain stage that provides improved dynamic range through the use of cross coupled auxiliary differential pair CMOS amplifiers to cancel distortion in a main linearized differential pair amplifier. Frequency planning provides additional image rejection. Local oscillator signal generation methods on chip reduce distortion. A PLL generates needed out of band LO signals. Direct synthesis generates in band LO signals. PLL VCOs are centered automatically.Type: GrantFiled: August 17, 2007Date of Patent: April 13, 2010Assignee: Broadcom CorporationInventor: Haideh Khorramabadi
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Publication number: 20080284919Abstract: An integrated receiver with channel selection and image rejection substantially implemented on a single CMOS integrated circuit is described. A receiver front end provides programmable attenuation and a programmable gain low noise amplifier. Frequency conversion circuitry advantageously uses LC filters integrated onto the substrate in conjunction with image reject mixers to provide sufficient image frequency rejection. Filter tuning and inductor Q compensation over temperature are performed on chip. The filters utilize multi track spiral inductors. The filters are tuned using local oscillators to tune a substitute filter, and frequency scaling during filter component values to those of the filter being tuned. In conjunction with filtering, frequency planning provides additional image rejection. The advantageous choice of local oscillator signal generation methods on chip is by PLL out of band local oscillation and by direct synthesis for in band local oscillator.Type: ApplicationFiled: July 30, 2008Publication date: November 20, 2008Applicant: Broadcom CorporationInventors: Pieter Vorenkamp, Klaas Bult, Frank Carr, Christopher M. Ward, Ralph Duncan, Tom W. Kwan, James Y.C. Chang, Haideh Khorramabadi
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Patent number: 7423699Abstract: An integrated receiver with channel selection and image rejection substantially implemented on a single CMOS integrated circuit is described. A receiver front end provides programable attenuation and a programable gain low noise amplifier. Frequency conversion circuitry advantageously uses LC filters integrated onto the substrate in conjunction with image reject mixers to provide sufficient image frequency rejection. Filter tuning and inductor Q compensation over temperature are performed on chip. The filters utilize multi track spiral inductors. The filters are tuned using local oscillators to tune a substitute filter, and frequency scaling during filter component values to those of the filter being tuned. In conjunction with filtering, frequency planning provides additional image rejection. The advantageous choice of local oscillator signal generation methods on chip is by PLL out of band local oscillation and by direct synthesis for in band local oscillator.Type: GrantFiled: March 31, 2006Date of Patent: September 9, 2008Assignee: Broadcom CorporationInventors: Pieter Vorenkamp, Klaas Bult, Frank Carr, Christopher M. Ward, Ralph Duncan, Tom W. Kwan, James Y. C. Chang, Haideh Khorramabadi
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Publication number: 20080036536Abstract: An integrated receiver with channel selection and image rejection substantially implemented on a single CMOS integrated circuit. A receiver front end provides programmable attenuation and a programmable gain low noise amplifier. LC filters integrated onto the substrate in conjunction with image reject mixers provide image frequency rejection. Filter tuning and inductor Q compensation over temperature are performed on chip. Active filters utilize multi track spiral inductors with shields to increase circuit Q. The filters incorporate a gain stage that provides improved dynamic range through the use of cross coupled auxiliary differential pair CMOS amplifiers to cancel distortion in a main linearized differential pair amplifier. Frequency planning provides additional image rejection. Local oscillator signal generation methods on chip reduce distortion. A PLL generates needed out of band LO signals. Direct synthesis generates in band LO signals. PLL VCOs are centered automatically.Type: ApplicationFiled: August 17, 2007Publication date: February 14, 2008Applicant: Broadcom CorporationInventor: Haideh Khorramabadi
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Patent number: 7276970Abstract: An integrated receiver with channel selection and image rejection substantially implemented on a single CMOS integrated circuit. A receiver front end provides programable attenuation and a programable gain low noise amplifier. LC filters integrated onto the substrate in conjunction with image reject mixers provide image frequency rejection. Filter tuning and inductor Q compensation over temperature are performed on chip. Active filters utilize multi track spiral inductors with shields to increase circuit Q. The filters incorporate a gain stage that provides improved dynamic range through the use of cross coupled auxiliary differential pair CMOS amplifiers to cancel distortion in a main linearized differential pair amplifier. Frequency planning provides additional image rejection. Local oscillator signal generation methods on chip reduce distortion. A PLL generates needed out of band LO signals. Direct synthesis generates in band LO signals. PLL VCOs are centered automatically.Type: GrantFiled: May 18, 2005Date of Patent: October 2, 2007Assignee: Broadcom CorporationInventor: Haideh Khorramabadi
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Publication number: 20070077908Abstract: An integrated receiver with channel selection and image rejection substantially implemented on a single CMOS integrated circuit is described. A receiver front end provides programable attenuation and a programable gain low noise amplifier. Frequency conversion circuitry advantageously uses LC filters integrated onto the substrate in conjunction with image reject mixers to provide sufficient image frequency rejection. Filter tuning and inductor Q compensation over temperature are performed on chip. The filters utilize multi track spiral inductors. The filters are tuned using local oscillators to tune a substitute filter, and frequency scaling during filter component values to those of the filter being tuned. In conjunction with filtering, frequency planning provides additional image rejection. The advantageous choice of local oscillator signal generation methods on chip is by PLL out of band local oscillation and by direct synthesis for in band local oscillator.Type: ApplicationFiled: March 31, 2006Publication date: April 5, 2007Applicant: Broadcom CorporationInventors: Pieter Vorenkamp, Klaas Bult, Frank Carr, Christopher Ward, Ralph Duncan, Tom Kwan, James Chang, Haideh Khorramabadi
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Patent number: 7092043Abstract: An integrated receiver with channel selection and image rejection substantially implemented on a single CMOS integrated circuit is described. A receiver front end provides programable attenuation and a programable gain low noise amplifier. Frequency conversion circuitry advantageously uses LC filters integrated onto the substrate in conjunction with image reject mixers to provide sufficient image frequency rejection. Filter tuning and inductor Q compensation over temperature are performed on chip. The filters utilize multi track spiral inductors. The filters are tuned using local oscillators to tune a substitute filter, and frequency scaling during filter component values to those of the filter being tuned. In conjunction with filtering, frequency planning provides additional image rejection. The advantageous choice of local oscillator signal generation methods on chip is by PLL out of band local oscillation and by direct synthesis for in band local oscillator.Type: GrantFiled: November 12, 1999Date of Patent: August 15, 2006Assignee: Broadcom CorporationInventors: Pieter Vorenkamp, Klaas Bult, Frank Carr, Christopher M. Ward, Ralph Duncan, Tom W. Kwan, James Y. C. Chang, Haideh Khorramabadi
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Patent number: 6985035Abstract: An integrated receiver with channel selection and image rejection substantially implemented on a single CMOS integrated circuit. A receiver front end provides programmable attenuation and a programmable gain low noise amplifier. LC filters integrated onto the substrate in conjunction with image reject mixers provide image frequency rejection. Filter tuning and inductor Q compensation over temperature are performed on chip. Active filters utilize multi track spiral inductors with shields to increase circuit Q. The filters incorporate a gain stage that provides improved dynamic range through the use of cross coupled auxiliary differential pair CMOS amplifiers to cancel distortion in a main linearized differential pair amplifier. Frequency planning provides additional image rejection. Local oscillator signal generation methods on chip reduce distortion. A PLL generates needed out of band LO signals. Direct synthesis generates in band LO signals. PLL VCOs are centered automatically.Type: GrantFiled: May 17, 2000Date of Patent: January 10, 2006Assignee: Broadcom CorporationInventor: Haideh Khorramabadi
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Publication number: 20050258901Abstract: An integrated receiver with channel selection and image rejection substantially implemented on a single CMOS integrated circuit. A receiver front end provides programable attenuation and a programable gain low noise amplifier. LC filters integrated onto the substrate in conjunction with image reject mixers provide image frequency rejection. Filter tuning and inductor Q compensation over temperature are performed on chip. Active filters utilize multi track spiral inductors with shields to increase circuit Q. The filters incorporate a gain stage that provides improved dynamic range through the use of cross coupled auxiliary differential pair CMOS amplifiers to cancel distortion in a main linearized differential pair amplifier. Frequency planning provides additional image rejection. Local oscillator signal generation methods on chip reduce distortion. A PLL generates needed out of band LO signals. Direct synthesis generates in band LO signals. PLL VCOs are centered automatically.Type: ApplicationFiled: May 18, 2005Publication date: November 24, 2005Applicant: Broadcom CorporationInventor: Haideh Khorramabadi
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Publication number: 20010007151Abstract: An integrated receiver with channel selection and image rejection substantially implemented on a single CMOS integrated circuit is described. A receiver front end provides programable attenuation and a programable gain low noise amplifier. Frequency conversion circuitry advantageously uses LC filters integrated onto the substrate in conjunction with image reject mixers to provide sufficient image frequency rejection. Filter tuning and inductor Q compensation over temperature are performed on chip. The filters utilize multi track spiral inductors. The filters are tuned using local oscillators to tune a substitute filter, and frequency scaling during filter component values to those of the filter being tuned. In conjunction with filtering, frequency planning provides additional image rejection. The advantageous choice of local oscillator signal generation methods on chip is by PLL out of band local oscillation and by direct synthesis for in band local oscillator.Type: ApplicationFiled: November 12, 1999Publication date: July 5, 2001Inventors: PIETER VORENKAMP, KLAAS BULT, FRANK CARR, CHRISTOPHER M. WARD, RALPH DUNCAN, TOM W. KWAN, JAMES Y.C. CHANG, HAIDEH KHORRAMABADI
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Patent number: 5982228Abstract: The present invention provides an apparatus and method of tuning the frequency characteristics of a continuous-time filter. First and second test signals are provided to a filter means and the respective first and second responses of the filter means are measured. The first and second responses are compared and based on the comparison a tuning control signal is provided to the filter means to tune the frequency response characteristics of the filter means. During a tuning phase of operation, a first switch connects a test signal generator and disconnects a data signal generator from the transmission input of a continuous-time filter. A signal processor receives a signal from the transmission output from the continuous-time filter and produces a tuning control signal based on that signal. The test signal generator is comprised of means for providing a first test signal, which may be an alternating signal source ("A.C."), and means for providing a second test signal, which may be a direct signal source ("D.C.Type: GrantFiled: July 14, 1995Date of Patent: November 9, 1999Assignee: Lucent Technologies IncInventors: Haideh Khorramabadi, Maurice J. Tarsia, Nam Sung Woo
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Patent number: 5864310Abstract: An analog signal processing system has an input, an analog processing path and an ADC. The offset of the processing path is measured digitally by the ADC by shorting the input to ground. The measured offset is stored in a register and used to modify the analog processing path in order to compensate for the offset.Type: GrantFiled: March 21, 1997Date of Patent: January 26, 1999Assignee: Philips Electronics North America CorporationInventor: Haideh Khorramabadi
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Patent number: 5532471Abstract: A preamplifier for use with currents developed by a photodetecting diode is disclosed wherein the currents are coupled to the base of an NPN transistor connected as a common emitter stage and a feedback resistor is connected by way of a buffer amplifier to the base to provide a standard transimpedance configuration. A control loop monitors the signal level by integrating the output of the buffer amplifier, and upon the detection of large signals the control loop causes a MOSFET in parallel with the feedback resistor to decrease the transimpedance and thereby increase the signal handling capability of the preamplifier. The control loop is also connected to a second MOSFET in parallel with the collector load resistor of said NPN transistor to decrease the effective collector load impedance for large signal levels.Type: GrantFiled: December 21, 1994Date of Patent: July 2, 1996Assignee: AT&T Corp.Inventors: Haideh Khorramabadi, Maurice J. Tarsia, Liang D. Tzeng
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Patent number: 5162753Abstract: An amplifier arrangement suitable for use as a line driver is built with a Class AB stage connected in parallel with a Class B stage, whereby the output currents of the stages are summed. Each of the Class AB and the Class B stages has an output current device that is connected in a common-source configuration.In a push-pull configuration of the arrangement, each of a pair of operational amplifiers in the Class AB stage separately drives each of a pair of operational amplifiers in the Class B stage.Type: GrantFiled: November 27, 1991Date of Patent: November 10, 1992Assignee: AT&T Bell LaboratoriesInventor: Haideh Khorramabadi