Patents by Inventor Hajime Hamada

Hajime Hamada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9294047
    Abstract: A power amplifier apparatus includes an amplifier configured to amplify an input signal converted into an analog signal, a distortion compensator circuitry configured to perform a pre-distortion process to an input signal at a second sampling rate higher than a first sampling rate at which the input signal is converted into an analog signal, a remover configured to remove a frequency component exceeding a frequency band corresponding to the first sampling rate from the input signal subjected to the pre-distortion process, a first rate converter configured to convert a sampling rate of the input signal from which the frequency component is removed from the second sampling rate to the first sampling rate, and a first signal converter configured to convert the input signal the sampling rate of which is converted into an analog signal at the first sampling rate to supply the input signal converted into the analog signal to the amplifier.
    Type: Grant
    Filed: May 19, 2014
    Date of Patent: March 22, 2016
    Assignee: Fujitsu Limited
    Inventors: Toshio Kawasaki, Hiroyoshi Ishikawa, Kazuo Nagatani, Yuichi Utsunomiya, Alexander Nikolaevich Lozhkin, Hajime Hamada
  • Patent number: 8933752
    Abstract: A power amplifier apparatus that includes a processor that performs a first distortion compensation processing on an input signal using a distortion compensation coefficient to obtain a first signal and an amplifier that amplifies the first signal. The processor performs a second distortion compensation processing the amplified signal using the distortion compensation coefficient to obtain a second signal and updates the distortion compensation coefficient to enable convergence between the first signal and the second signal.
    Type: Grant
    Filed: October 20, 2011
    Date of Patent: January 13, 2015
    Assignee: Fujitsu Limited
    Inventors: Kazuo Nagatani, Yuichi Utsunomiya, Nobukazu Fudaba, Hiroyoshi Ishikawa, Hajime Hamada
  • Publication number: 20140347132
    Abstract: A power amplifier apparatus includes an amplifier configured to amplify an input signal converted into an analog signal, a distortion compensator circuitry configured to perform a pre-distortion process to an input signal at a second sampling rate higher than a first sampling rate at which the input signal is converted into an analog signal, a remover configured to remove a frequency component exceeding a frequency band corresponding to the first sampling rate from the input signal subjected to the pre-distortion process, a first rate converter configured to convert a sampling rate of the input signal from which the frequency component is removed from the second sampling rate to the first sampling rate, and a first signal converter configured to convert the input signal the sampling rate of which is converted into an analog signal at the first sampling rate to supply the input signal converted into the analog signal to the amplifier.
    Type: Application
    Filed: May 19, 2014
    Publication date: November 27, 2014
    Applicant: FUJITSU LIMITED
    Inventors: Toshio KAWASAKI, Hiroyoshi Ishikawa, Kazuo Nagatani, Yuichi Utsunomiya, Alexander Nikolaevich Lozhkin, Hajime Hamada
  • Patent number: 8605815
    Abstract: A delay amount estimating apparatus includes a delay value search section that searches for a first delay value smaller than a delay setting value at which a given correlation value between an input signal and a feedback signal is provided, and also for a second delay value greater than the delay setting value, the feedback signal coming from a signal processing apparatus that applies signal processing on the input signal, wherein respective correlation values of the first delay value and the second delay value satisfy a given condition; and a delay estimating section that estimates a delay amount of the feedback signal relative to the input signal based on the first delay value and the second delay value.
    Type: Grant
    Filed: July 8, 2009
    Date of Patent: December 10, 2013
    Assignee: Fujitsu Limited
    Inventors: Yuichi Utsunomiya, Hiroyoshi Ishikawa, Nobukazu Fudaba, Hajime Hamada, Kazuo Nagatani
  • Patent number: 8571495
    Abstract: A distortion compensation apparatus includes a distortion compensation signal generation unit that performs, on a transmission signal, distortion compensation processing using a series operation; a coefficient updating unit that updates series operation coefficients used for the series operation based on a feedback signal of a power amplification output which is output through power amplification processing of a distortion compensation signal output from the distortion compensation signal generation unit, and based on the distortion compensation signal; a memory that stores the distortion compensation signal corresponding to a transmission signal having a given power value and the feedback signal of the power amplification output as restraint information; and a control unit that performs control so that, in accordance with the power value of the transmission signal, restraint information corresponding to a power value different from the power value of the transmission signal is read and used for updating the
    Type: Grant
    Filed: February 8, 2010
    Date of Patent: October 29, 2013
    Assignee: Fujitsu Limited
    Inventors: Kazuo Nagatani, Yuichi Utsunomiya, Hajime Hamada, Hiroyoshi Ishikawa, Nobukazu Fudaba, Shohei Ishikawa
  • Patent number: 8520770
    Abstract: An amplitude suppressing apparatus includes a differential circuit that calculates a differential value of amplitude of an input signal at a point when the amplitude reaches a predetermined threshold. The amplitude suppressing apparatus also includes an amplitude suppressing circuit that suppresses the amplitude of the input signal on the basis of the differential value calculated by the differential circuit.
    Type: Grant
    Filed: March 16, 2009
    Date of Patent: August 27, 2013
    Assignee: Fujitsu Limited
    Inventors: Hiroyoshi Ishikawa, Hajime Hamada, Nobukazu Fudaba, Yuichi Utsunomiya, Kazuo Nagatani
  • Patent number: 8493144
    Abstract: A distortion compensation device includes a distortion compensation unit which compensates for a distortion generated in a power amplifier by using a polynomial in which a signal to be input into a power amplifier is raised to a power of a degree N (N is an integer larger than 0) and the raised signal is delayed by a delay number K (K is an integer larger than 0), and a polynomial adjusting unit which adjusts the degree N or the delay number K of the polynomial based on a comparison between a prescribed value, which indicates a degree of variation of the distortion generated in the power amplifier and a threshold value.
    Type: Grant
    Filed: April 18, 2011
    Date of Patent: July 23, 2013
    Assignee: Fujitsu Limited
    Inventors: Hiroyoshi Ishikawa, Hajime Hamada, Nobukazu Fudaba, Yuichi Utsunomiya, Kazuo Nagatani, Yasuyuki Oishi
  • Patent number: 8489037
    Abstract: A power amplifying apparatus has a bandwidth limitation process circuit to which an envelope signal included in a transmission signal is inputted, and which performs a bandwidth limitation process on the envelope signal, a variable power supply circuit for generating a power amplifier supply voltage based on a voltage control signal generated by the bandwidth limitation process circuit, and a power amplifier which is fed an input signal, and which is driven in accordance with the supply voltage from the variable power supply circuit.
    Type: Grant
    Filed: December 5, 2008
    Date of Patent: July 16, 2013
    Assignee: Fujitsu Limited
    Inventors: Nobukazu Fudaba, Hiroyoshi Ishikawa, Hajime Hamada, Yuichi Utsunomiya, Kazuo Nagatani
  • Patent number: 8452250
    Abstract: A DC offset component that occurs in a quadrature modulation system, and that is contained in a modulated transmit signal, is compensated for with good accuracy. In a DC offset compensation method according to the present invention, a DC offset correction value obtained from the transmit signal is weighted in accordance with the signal level of an input signal which is transmit data input to the quadrature modulation system, and the DC offset component contained in the transmit signal is compensated for by using the thus weighted DC offset correction value.
    Type: Grant
    Filed: June 29, 2007
    Date of Patent: May 28, 2013
    Assignee: Fujitsu Limited
    Inventors: Hiroyoshi Ishikawa, Nobukazu Fudaba, Kazuo Nagatani, Hajime Hamada, Tokuro Kubo
  • Patent number: 8451055
    Abstract: An apparatus includes: a unit that stores the look-up table including distortion compensation coefficients; a unit that selects addresses according to an input signal, acquires coefficients stored at the selected addresses, and performs the predistortion of the input signal by using the acquired coefficients; a unit that calculates an error signal by comparing with the input signal a feedback signal that indicates an output of a power amplifier to which a result of the predistortion is inputted; a unit that calculates coefficients from the error signal and the acquired coefficients by using the adaptive algorithm; a unit that, for each of the selected addresses, selects coefficients as adequate coefficients from among the calculated coefficients according to the error signal; and a unit that, for each of the selected addresses, calculates an average value of the adequate coefficients and replaces a stored coefficient in the look-up table with the average value.
    Type: Grant
    Filed: January 21, 2011
    Date of Patent: May 28, 2013
    Assignee: Fujitsu Limited
    Inventors: Nobukazu Fudaba, Hiroyoshi Ishikawa, Hajime Hamada, Yuichi Utsunomiya, Kazuo Nagatani
  • Patent number: 8442157
    Abstract: A wireless apparatus includes: an A/D converter which samples an in-phase signal component and a quadrature signal component from a quadrature-modulated signal of analog form alternately; a digital quadrature demodulation unit which applies digital quadrature demodulation to an output signal of the A/D converter and outputs an in-phase signal and a quadrature signal; and an error detection unit which, based on the in-phase and quadrature signals output from the digital quadrature demodulation unit, detects a time difference error between the sample timing of the in-phase signal component and the sample timing of the quadrature signal component.
    Type: Grant
    Filed: June 4, 2010
    Date of Patent: May 14, 2013
    Assignee: Fujitsu Limited
    Inventors: Hiroyoshi Ishikawa, Kazuo Nagatani, Hajime Hamada, Nobukazu Fudaba, Yuichi Utsunomiya, Takeshi Ohba, Hideharu Shako, Yasuhito Funyu
  • Patent number: 8433262
    Abstract: A disclosed transmission device includes a voltage control signal generating unit configured to generate a first voltage control signal from a transmission signal, an amplifier configured to amplify the transmission signal in response to the first voltage control signal, a first timing adjusting unit configured to adjust a control timing for the first voltage control signal, and a control timing setting unit configured to set the control timing adjusted by the first timing adjusting unit based on the output signal from the amplifier and the transmission signal.
    Type: Grant
    Filed: August 5, 2010
    Date of Patent: April 30, 2013
    Assignee: Fujitsu Limited
    Inventors: Yuichi Utsunomiya, Nobukazu Fudaba, Hiroyoshi Ishikawa, Hajime Hamada, Kazuo Nagatani
  • Patent number: 8270530
    Abstract: A distortion compensating apparatus includes a processing circuit that calculates each of a plurality of series operation coefficient pairs based on a transmission signal and a feedback signal of an output from an amplifying circuit performing power amplification of the transmission signal, executes a series operation process with respect to the transmission signal based on the plurality of the series operation coefficient pairs as a distortion compensation of the transmission signal, and inputs a result of the series operation process to the amplifying circuit performing the power amplification, and a selecting unit that, on the basis of power of the transmission signal, selects the series operation process to be executed corresponding to one of the plurality of series operation coefficient pairs, or selects one of the plurality of series operation coefficient pairs to be used in the series operation process to be executed.
    Type: Grant
    Filed: September 8, 2009
    Date of Patent: September 18, 2012
    Assignee: Fujitsu Limited
    Inventors: Hajime Hamada, Hiroyoshi Ishikawa, Yuichi Utsunomiya, Kazuo Nagatani, Nobukazu Fudaba, Hideharu Shako
  • Patent number: 8254857
    Abstract: A radio communication device includes a power amplifier to amplify a transmit signal, a control unit to generate a voltage control signal for defining power to be supplied to the power amplifier in accordance with a conversion curve expressed using a polynomial series based on an envelope signal obtained from the transmit signal and determine the polynomial series based on an efficiency of the power amplifier, and a power source unit to supply the power to the power amplifier based on the voltage control signal, wherein the control unit divides an amplitude range of the envelope signal on the conversion curve into a plurality of sections and determines the polynomial series based on at least one of the plurality of sections.
    Type: Grant
    Filed: September 2, 2010
    Date of Patent: August 28, 2012
    Assignee: Fujitsu Limited
    Inventors: Nobukazu Fudaba, Hiroyoshi Ishikawa, Hajime Hamada, Yuichi Utsunomiya, Kazuo Nagatani
  • Publication number: 20120098596
    Abstract: A power amplifier apparatus that includes a processor that performs a first distortion compensation processing on an input signal using a distortion compensation coefficient to obtain a first signal and an amplifier that amplifies the first signal. The processor performs a second distortion compensation processing the amplified signal using the distortion compensation coefficient to obtain a second signal and updates the distortion compensation coefficient to enable convergence between the first signal and the second signal.
    Type: Application
    Filed: October 20, 2011
    Publication date: April 26, 2012
    Applicant: FUJITSU LIMITED
    Inventors: Kazuo NAGATANI, Yuichi Utsunomiya, Nobukazu Fudaba, Hiroyoshi Ishikawa, Hajime Hamada
  • Patent number: 8154341
    Abstract: A power amplifying apparatus includes a high-speed low pass filter which inputs an envelope signal included in a transmission signal therein, a low-speed low pass filter which inputs the envelope signal therein, a determination unit which inputs the envelope signal therein and determines rising or falling of the envelope signal, a selecting unit which selects one of the high-speed low pass filter and the low-speed low pass filter according to a determined result of the determination unit, and a voltage supply unit which generates a voltage based on a signal input according to a selection by the selecting unit and supplies the voltage to a power amplifier which inputs the transmission signal therein so as to amplify a power of the transmission signal.
    Type: Grant
    Filed: December 16, 2008
    Date of Patent: April 10, 2012
    Assignee: Fujitsu Limited
    Inventors: Hiroyoshi Ishikawa, Nobukazu Fudaba, Hajime Hamada, Yuichi Utsunomiya, Kazuo Nagatani, Toru Maniwa
  • Patent number: 8130866
    Abstract: A peak suppressing apparatus includes an amplitude limiter that limits amplitude of the transmission signal with a predetermined threshold; a peak-suppressing-signal extracting unit that extracts a peak suppressing signal by subtracting the transmission signal before the amplitude limiting from the transmission signal amplitude-limited by the amplitude limiter; a filtering unit that performs filtering so that a frequency characteristic of the peak suppressing signal extracted by the peak-suppressing-signal extracting unit becomes flat; and an adder that adds the peak suppressing signal filtered by the filtering unit to the transmission signal.
    Type: Grant
    Filed: March 26, 2009
    Date of Patent: March 6, 2012
    Assignee: Fujitsu Limited
    Inventors: Kazuo Nagatani, Hajime Hamada, Hiroyoshi Ishikawa, Nobukazu Fudaba, Yuichi Utsunomiya
  • Patent number: 8102941
    Abstract: A peak suppression threshold value control unit receives an input of quality requirement information, such as a modulation system and coding ratio, from a baseband signal generation unit, determines a threshold value of a peak suppression unit based on the quality requirement information and outputs the threshold value to a peak suppression unit. The peak suppression unit applies a peak suppression control to a baseband signal input from a baseband signal generation unit based on the threshold value and outputs a signal (i.e., a peak suppression signal) applied by the peak suppression process.
    Type: Grant
    Filed: July 11, 2007
    Date of Patent: January 24, 2012
    Assignee: Fujitsu Limited
    Inventors: Hajime Hamada, Tokuro Kubo, Kazuo Nagatani, Hiroyoshi Ishikawa, Nobukazu Fudaba
  • Patent number: 8064529
    Abstract: In a configuration where systems C and D having different reception quality requirements are present, a peak suppressor generates a replica of a signal from system C combined together with a signal from system D before peak suppression. Based on the replica, system specific peak suppressing units respectively perform peak suppression on signals of each system according to the respective reception quality requirements of each system. A combining unit combines the peak-suppressed signals of each system. Hence, peak suppression on signals from systems requiring different reception qualities is performed at an appropriate degree according to each system.
    Type: Grant
    Filed: July 25, 2007
    Date of Patent: November 22, 2011
    Assignee: Fujitsu Limited
    Inventors: Hajime Hamada, Kazuo Nagatani, Hiroyoshi Ishikawa, Nobukazu Fudaba
  • Publication number: 20110260792
    Abstract: A distortion compensation device includes a distortion compensation unit which compensates for a distortion generated in a power amplifier by using a polynomial in which a signal to be input into a power amplifier is raised to a power of a degree N (N is an integer larger than 0) and the raised signal is delayed by a delay number K (K is an integer larger than 0), and a polynomial adjusting unit which adjusts the degree N or the delay number K of the polynomial based on a comparison between a prescribed value, which indicates a degree of variation of the distortion generated in the power amplifier and a threshold value.
    Type: Application
    Filed: April 18, 2011
    Publication date: October 27, 2011
    Applicant: FUJITSU LIMITED
    Inventors: Hiroyoshi ISHIKAWA, Hajime Hamada, Nobukazu Fudaba, Yuichi Utsunomiya, Kazuo Nagatani, Yasuyuki Oishi