Patents by Inventor Han-Liang Tseng

Han-Liang Tseng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10770602
    Abstract: An optical sensor includes pixels disposed in a substrate and a light collimating layer disposed on the substrate. The light collimating layer includes a first light-shielding layer, first transparent pillars, a second light-shielding layer, and second transparent pillars. The first light-shielding layer is disposed on the substrate. The first transparent pillars through the first light-shielding layer are correspondingly disposed on the pixels. The second light-shielding layer is disposed on the first light-shielding layer and the first transparent pillars. The second transparent pillars through the second light-shielding layer are correspondingly disposed on the first transparent pillars. The top surface area of each of the first transparent pillars is not equal to the bottom surface area of each of the second transparent pillars.
    Type: Grant
    Filed: February 20, 2019
    Date of Patent: September 8, 2020
    Assignee: VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATION
    Inventors: Hsin-Hui Lee, Han-Liang Tseng, Jiunn-Liang Yu, Kwang-Ming Lin, Yin Chen, Si-Twan Chen, Hsueh-Jung Lin, Wen-Chih Lu, Ting-Jung Lu
  • Patent number: 10763288
    Abstract: A semiconductor device is provided. The semiconductor device includes a substrate. The substrate includes a plurality of pixels. The semiconductor device also includes a light collimator layer disposed on the substrate. The light collimator layer includes a transparent connection feature disposed on the substrate, and a plurality of transparent pillars disposed on the transparent connection feature. The plurality of transparent pillars cover the plurality of pixels, and the transparent connection feature connects to the plurality of transparent pillars. The plurality of transparent pillars and the transparent connection feature are made of a first material which includes a transparent material. The light collimator layer also includes a plurality of first light-shielding features disposed on the transparent connection feature. The top surface of one of the transparent pillars is level with the top surface of one of the first light-shielding features.
    Type: Grant
    Filed: February 15, 2019
    Date of Patent: September 1, 2020
    Assignee: VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATION
    Inventors: Hsin-Hui Lee, Han-Liang Tseng, Jiunn-Liang Yu, Kwang-Ming Lin, Yin Chen, Si-Twan Chen, Hsueh-Jung Lin, Wen-Chih Lu, Ting-Jung Lu
  • Publication number: 20200266226
    Abstract: A semiconductor device is provided. The semiconductor device includes a substrate. The substrate includes a plurality of pixels. The semiconductor device also includes a light collimator layer disposed on the substrate. The light collimator layer includes a transparent connection feature disposed on the substrate, and a plurality of transparent pillars disposed on the transparent connection feature. The plurality of transparent pillars cover the plurality of pixels, and the transparent connection feature connects to the plurality of transparent pillars. The plurality of transparent pillars and the transparent connection feature are made of a first material which includes a transparent material. The light collimator layer also includes a plurality of first light-shielding features disposed on the transparent connection feature. The top surface of one of the transparent pillars is level with the top surface of one of the first light-shielding features.
    Type: Application
    Filed: February 15, 2019
    Publication date: August 20, 2020
    Applicant: Vanguard International Semiconductor Corporation
    Inventors: Hsin-Hui LEE, Han-Liang TSENG, Jiunn-Liang YU, Kwang-Ming LIN, Yin CHEN, Si-Twan CHEN, Hsueh-Jung LIN, Wen-Chih LU, Ting-Jung LU
  • Publication number: 20200266305
    Abstract: An optical sensor includes pixels disposed in a substrate and a light collimating layer disposed on the substrate. The light collimating layer includes a first light-shielding layer, first transparent pillars, a second light-shielding layer, and second transparent pillars. The first light-shielding layer is disposed on the substrate. The first transparent pillars through the first light-shielding layer are correspondingly disposed on the pixels. The second light-shielding layer is disposed on the first light-shielding layer and the first transparent pillars. The second transparent pillars through the second light-shielding layer are correspondingly disposed on the first transparent pillars. The top surface area of each of the first transparent pillars is not equal to the bottom surface area of each of the second transparent pillars.
    Type: Application
    Filed: February 20, 2019
    Publication date: August 20, 2020
    Applicant: Vanguard International Semiconductor Corporation
    Inventors: Hsin-Hui LEE, Han-Liang TSENG, Jiunn-Liang YU, Kwang-Ming LIN, Yin CHEN, Si-Twan CHEN, Hsueh-Jung LIN, Wen-Chih LU, Ting-Jung LU
  • Publication number: 20200251506
    Abstract: An optical sensor includes pixels disposed in a substrate. A light collimating layer is disposed on the substrate and includes a transparent layer, a light-shielding layer, and transparent pillars. The transparent layer blanketly disposed on the substrate covers the pixels and the region between the pixels. The light-shielding layer is disposed on the transparent layer and between the transparent pillars. The transparent pillars penetrating through the light-shielding layer are correspondingly disposed on the pixels.
    Type: Application
    Filed: February 1, 2019
    Publication date: August 6, 2020
    Applicant: Vanguard International Semiconductor Corporation
    Inventors: Hsin-Hui LEE, Han-Liang TSENG, Jiunn-Liang YU, Kwang-Ming LIN, Yin CHEN, Si-Twan CHEN, Hsueh-Jung LIN, Wen-Chih LU, Ting-Jung LU
  • Publication number: 20200249490
    Abstract: An optical sensor includes a plurality of pixels disposed in a substrate and a light collimating layer. The light collimating layer is disposed on the substrate. The light collimating layer includes a light-shielding layer, a plurality of transparent pillars, and a plurality of first dummy transparent pillars. The light-shielding layer is disposed on the substrate. The plurality of transparent pillars pass through the light-shielding layer and are disposed correspondingly on the plurality of pixels. The plurality of first dummy transparent pillars that pass through the light-shielding layer are disposed on a first peripheral region of the light collimating layer, wherein the plurality of first dummy transparent pillars surround the plurality of transparent pillars from a top view.
    Type: Application
    Filed: January 31, 2019
    Publication date: August 6, 2020
    Applicant: Vanguard International Semiconductor Corporation
    Inventors: Hsin-Hui LEE, Han-Liang TSENG, Jiunn-Liang YU, Kwang-Ming LIN, Yin CHEN, Si-Twan CHEN, Hsueh-Jung LIN, Wen-Chih LU, Ting-Jung LU
  • Publication number: 20200210669
    Abstract: An optical sensor includes a substrate and a light collimating layer. The substrate includes a sensor pixel array having a plurality of sensor pixels. The light collimating layer is disposed on the substrate. The light collimating layer includes a patterned seed layer, a plurality of transparent pillars, a metal layer, and a mask layer. The patterned seed layer is disposed on the substrate. The patterned seed layer exposes the sensor pixel array. The transparent pillars are disposed on the sensor pixel array. The metal layer is disposed on the patterned seed layer and in between the transparent pillars. The mask layer is disposed on the metal layer.
    Type: Application
    Filed: December 28, 2018
    Publication date: July 2, 2020
    Applicant: Vanguard International Semiconductor Corporation
    Inventors: Hsin-Hui LEE, Han-Liang TSENG, Hsueh-Jung LIN
  • Patent number: 10699092
    Abstract: An optical sensor is provided, wherein the optical sensor includes an image sensing array, a collimator layer, and a light-shielding layer. The image sensor array includes a plurality of pixels. The collimator layer is disposed on the image sensor array and includes a plurality of openings corresponding to the pixels. The collimator layer includes a first surface facing the image sensor array and a second surface opposite to the first surface. The light-shielding layer is disposed on sidewalls of the openings.
    Type: Grant
    Filed: May 8, 2018
    Date of Patent: June 30, 2020
    Assignee: VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATION
    Inventors: Han-Liang Tseng, Hsin-Hui Lee
  • Patent number: 10651218
    Abstract: An optical sensor structure is provided. The optical sensor structure includes a sensor pixel array in a substrate, a light collimating layer on the substrate, and at least one through-substrate via. The sensor pixel array has a plurality of sensor pixels. The at least one through-substrate via extends from a first surface to an opposite second surface of the substrate. The at least one through-substrate via is in the sensor pixel array and vertically misaligned with the plurality of sensor pixels.
    Type: Grant
    Filed: January 3, 2019
    Date of Patent: May 12, 2020
    Assignee: VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATION
    Inventors: Hsin-Hui Lee, Han-Liang Tseng, Hsueh-Jung Lin
  • Publication number: 20190386048
    Abstract: A method for forming a semiconductor device is provided. The method includes providing a substrate, forming a first light-shielding layer on the substrate, and performing a first lithography process to pattern the first light-shielding layer to form a plurality of first openings in the first light-shielding layer. The first openings expose pixels of the substrate. The method also includes placing a first stencil on the first light-shielding layer. The first stencil has a first openwork pattern which exposes the pixels of the substrate. The method also includes providing a first material. The first material includes a transparent material. The method also includes applying the first material onto the substrate through the first stencil to cover the pixels and fill the first openings, such that a plurality of first transparent pillars made of the first material are formed on the pixels.
    Type: Application
    Filed: June 13, 2018
    Publication date: December 19, 2019
    Applicant: Vanguard International Semiconductor Corporation
    Inventors: Hsin-Hui LEE, Han-Liang TSENG, Hsueh-Jung LIN
  • Publication number: 20190347462
    Abstract: An optical sensor is provided, wherein the optical sensor includes an image sensing array, a collimator layer, and a light-shielding layer. The image sensor array includes a plurality of pixels. The collimator layer is disposed on the image sensor array and includes a plurality of openings corresponding to the pixels. The collimator layer includes a first surface facing the image sensor array and a second surface opposite to the first surface. The light-shielding layer is disposed on sidewalls of the openings.
    Type: Application
    Filed: May 8, 2018
    Publication date: November 14, 2019
    Applicant: Vanguard International Semiconductor Corporation
    Inventors: Han-Liang TSENG, Hsin-Hui LEE
  • Publication number: 20190304837
    Abstract: A method for forming a semiconductor device is provided. The method includes providing a substrate, placing a first stencil having a first openwork pattern on the substrate, applying a first material onto the substrate through the first stencil, and removing the first stencil from the substrate. The first material includes a transparent material. The method also includes placing a second stencil having a second openwork pattern on the substrate, applying a second material onto the substrate through the second stencil, and removing the second stencil from the substrate. The second material includes a light-shielding material, and the second openwork pattern is different from the first openwork pattern.
    Type: Application
    Filed: September 20, 2018
    Publication date: October 3, 2019
    Applicant: Vanguard International Semiconductor Corporation
    Inventors: Han-Liang TSENG, Hsin-Hui LEE, Hsueh-Jung LIN
  • Patent number: 8049323
    Abstract: A chip holder formed of silicon, glass, other ceramics or other suitable materials includes a plurality of recesses for retaining semiconductor chips. The bond pads of the semiconductor chip are formed on or over an area of the chip holder that surrounds the semiconductor chip thus expanding the bonding area. The bond pads are coupled, using semiconductor wafer processing techniques, to internal bond pads formed directly on the semiconductor chip.
    Type: Grant
    Filed: February 16, 2007
    Date of Patent: November 1, 2011
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chen-Shien Chen, Chao-Hsiang Yang, Jimmy Liang, Han-Liang Tseng, Mirng-Ji Lii, Tjandra Winata Karta, Hua-Shu Wu
  • Patent number: 7662665
    Abstract: A method for fabricating a semiconductor package is provided. In one embodiment, a semiconductor chip having a plurality of exposed conductive layers thereon is provided. A first substrate having a first surface and a second surface is provided, the first surface having a plurality of exposed via plugs thereunder. The semiconductor chip is bonded to the first substrate, wherein the plurality of exposed conductor layers are aligned and in contact with the surfaces of the exposed via plugs. A portion of the second surface of the first substrate is then removed to expose the opposite ends of the plurality of via plugs. A plurality of UBM layers is formed on the surfaces of the opposite ends of the plurality of via plugs. A plurality of solder bumps is formed and mounted on the UBM layers. A second substrate having a first surface and a second surface is provided, the solder bumps being mounted to the first surface of the second substrate.
    Type: Grant
    Filed: January 22, 2007
    Date of Patent: February 16, 2010
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chen-Shien Chen, Kuo-Chin Chang, Szu-Wei Lu, Pei-Haw Tsao, Chung-Yu Wang, Han-Liang Tseng, Mirng-Ji Lii
  • Publication number: 20080197473
    Abstract: A chip holder formed of silicon, glass, other ceramics or other suitable materials includes a plurality of recesses for retaining semiconductor chips. The bond pads of the semiconductor chip are formed on or over an area of the chip holder that surrounds the semiconductor chip thus expanding the bonding area. The bond pads are coupled, using semiconductor wafer processing techniques, to internal bond pads formed directly on the semiconductor chip.
    Type: Application
    Filed: February 16, 2007
    Publication date: August 21, 2008
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chen-Shien Chen, Chao-Hsiang Yang, Jimmy Liang, Han-Liang Tseng, Mirng-Ji Lii, Tjandra Winata Karta, Hua-Shu Wu
  • Publication number: 20080174002
    Abstract: A method for fabricating a semiconductor package is provided. In one embodiment, a semiconductor chip having a plurality of exposed conductive layers thereon is provided. A first substrate having a first surface and a second surface is provided, the first surface having a plurality of exposed via plugs thereunder. The semiconductor chip is bonded to the first substrate, wherein the plurality of exposed conductor layers are aligned and in contact with the surfaces of the exposed via plugs. A portion of the second surface of the first substrate is then removed to expose the opposite ends of the plurality of via plugs. A plurality of UBM layers is formed on the surfaces of the opposite ends of the plurality of via plugs. A plurality of solder bumps is formed and mounted on the UBM layers. A second substrate having a first surface and a second surface is provided, the solder bumps being mounted to the first surface of the second substrate.
    Type: Application
    Filed: January 22, 2007
    Publication date: July 24, 2008
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chen-Shien Chen, Kuo-Chin Chang, Szu-Wei Lu, Pei-Haw Tsao, Chung-Yu Wang, Han-Liang Tseng, Mirng-Ji Lii
  • Patent number: 6710889
    Abstract: A method for measuring a dielectric layer thickness calibration reference standard including providing a substrate having a dielectric layer for calibrating a dielectric layer thickness measuring tool; cleaning the dielectric layer according to a cleaning process including at least one of spraying and scrubbing; and, measuring the thickness of the dielectric layer with the dielectric layer thickness measuring tool including at least one portion of the dielectric layer displaced from the substrate center.
    Type: Grant
    Filed: July 2, 2002
    Date of Patent: March 23, 2004
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd
    Inventors: Pey-Yuan Lee, Chi-Shen Lo, Sian-Ren Horng, Han-Liang Tseng, Wei-Ming You, Yi-Hung Chen
  • Publication number: 20040004730
    Abstract: A method for measuring a dielectric layer thickness calibration reference standard including providing a substrate having a dielectric layer for calibrating a dielectric layer thickness measuring tool; cleaning the dielectric layer according to a cleaning process including at least one of spraying and scrubbing; and, measuring the thickness of the dielectric layer with the dielectric layer thickness measuring tool including at least one portion of the dielectric layer displaced from the substrate center.
    Type: Application
    Filed: July 2, 2002
    Publication date: January 8, 2004
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Pey-Yuan Lee, Chi-Shen Lo, Shean-Ren Horng, Han-Liang Tseng, Wei-Ming You, Yi-Hung Chen
  • Publication number: 20030230323
    Abstract: A method and apparatus comprising a wafer platform which rotates a semiconductor wafer at a predetermined speed while being moved in a linear motion with respect to a stationary water jet nozzle spraying a water or fluid jet onto the wafer during a wafer scrubbing process. The coupled rotary and linear motions of the wafer facilitates through washing or rinsing of the wafer surface and spreads impact energy of water or fluid sprayed onto a wafer surface over a large surface area on the wafer, resulting in a substantial reduction of particles remaining at the center of the wafer after the wafer scrubbing operation and preventing or minimizing the likelihood of impact damage to the wafer during the wafer scrubbing process. In another embodiment, the water or fluid jet nozzle moves along a horizontal axis while the spinning wafer remains stationary.
    Type: Application
    Filed: June 14, 2002
    Publication date: December 18, 2003
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Wei-Ming You, Jih-Churng Twu, Fu-Su Lee, Han-Liang Tseng, Kan-Wha Chang
  • Patent number: 6004864
    Abstract: A method is described for forming trench isolation for integrated circuits on silicon wafers by selectively doping the trench regions by ion implantation and then etching these areas with a wet chemical etch. A dopant such as boron, is implanted in a sequence of energies and doses to provide a desired trench profile of heavily doped silicon. The implanted silicon etches far more rapidly than the surrounding silicon and is readily etched out forming a trench. The concentration of dopant diminishes rapidly in the periphery of the implanted region. As the etch front approaches the periphery, the silicon etch rate, likewise diminishes and the etch can be quenched to leave a uniform surface layer of enhanced boron concentration which lines the resultant trench to form an effective channel stop. Wet etched trenches provide advantages over trenches formed by RIE including smooth rounded trench profiles which reduce stress. In addition, trenches having widths below 0.
    Type: Grant
    Filed: February 25, 1998
    Date of Patent: December 21, 1999
    Assignee: Taiwan Semiconductor Manufacturing Company Ltd.
    Inventors: Ji-Chung Huang, Han-Liang Tseng, Chia-Hsiang Chen, Kuo-Sheng Chuang