Abstract: The present invention relates to a polishing composition for a semiconductor process, a method of preparing the polishing composition, and a method of fabricating a semiconductor device using the polishing composition. The polishing composition for a semiconductor process may be applied to a process of polishing an amorphous carbon layer, may exhibit a high removal rate of the amorphous carbon layer, may prevent the occurrence of defects by preventing carbon residue from being re-adsorbed onto a semiconductor substrate during the polishing process, and has excellent storage stability. The present invention may also provide a method of fabricating a semiconductor device using the polishing composition for a semiconductor process.

Abstract: The present invention relates to a polishing composition for a semiconductor process, a method of preparing the polishing composition, and a method of fabricating a semiconductor device using the polishing composition, and specifically, to a polishing composition which is applied to a process of polishing an amorphous carbon layer (ACL). The polishing composition may exhibit a high removal rate of the amorphous carbon layer, does not cause the problem that the removal rate is lowered at 45° C. or higher. In addition, the polishing composition has increased long-term storage stability, may prevent carbon residue generated during the polishing process from being adsorbed onto the semiconductor substrate, and may prevent contamination of the polishing pad. The present invention may also provide a method of fabricating a semiconductor device using the polishing composition for a semiconductor process.

Abstract: The present invention relates to a polishing composition for a semiconductor process, a method of preparing the polishing composition, and a method of fabricating a semiconductor device using the polishing composition. The polishing composition for a semiconductor process contains abrasive particles, an accelerator, and a stabilizer. The polishing composition has excellent long-term storage stability because the particles contained therein do not aggregate even after the polishing composition is stored at 60° C. or higher for a long time. In addition, the polishing composition may be applied to a process of polishing an amorphous carbon layer, may exhibit a high removal rate, prevent carbon residue generated during the polishing process from being adsorbed onto a semiconductor substrate, and prevent contamination of a polishing pad. The present invention may also provide a method of fabricating a semiconductor device using the polishing composition for a semiconductor process.

Abstract: A polishing composition and method for semiconductor processing being applicable to a semiconductor process including a process of polishing a semiconductor wafer including a through-silicon via (TSV), being capable of implementing excellent polishing performance, being capable of minimizing defects such as dishing, erosion, and protrusion, being capable of realizing an evenly polished surface without deviation between films when polishing a surface where a plurality of different films is exposed to the outside, including abrasive grains and at least one additive, and having a value of 1.45 to 1.90 as calculated by Equation 1.

Abstract: A composition for semiconductor processing, includes abrasive particles surface-modified with an amino silane-based compound; a copper erosion inhibitor, including an azole-based compound; a copper surface protectant, including a compound having a betaine group and a salicylic group or a derivative thereof; and a surfactant, including fluorine in a molecule thereof. A surface of the surface-modified abrasive particles comprises an amino silane group.

Abstract: A composition for semiconductor processing includes abrasive particles, and a dishing control additive, comprising a first dishing control additive and a second dishing control additive. The first dishing control additive includes a compound having a betaine group and a salicylic group or a derivative thereof, and the second dishing control additive includes an azole-based compound. The first dishing control additive includes 0.07 parts by weight or more based on 100 parts by weight of the abrasive particles, and the second dishing control additive includes 0.13 parts by weight or less based on 100 parts by weight of the abrasive particles.

Abstract: The present invention relates to a semiconductor process polishing composition and a semiconductor device manufacturing method in which the polishing composition is applied, and can provide a preparation method applied to a CMP process for an amorphous carbon layer, and thus exhibits a high polishing rate, prevents, during a CMP process, the re-adsorption of carbon residue on a semiconductor substrate and the contamination of a polishing pad, and stabilizes an accelerator in the polishing composition so that the storage stability thereof is excellent. In addition, provided is a semiconductor device manufacturing method in which the semiconductor process polishing composition is applied.

Abstract: The present disclosure is a composition for a semiconductor process applied to a polishing process of a semiconductor wafer and, more specifically, to a semiconductor process involving a polishing process of a semiconductor wafer, wherein the composition includes abrasive particles, and the zeta potential of the abrasive particles is ?50 mV to ?10 mV at a pH of 6, and the zeta potential change rate represented by Equation 1 below is 6 mV to 30 mV: [Equation 1] Zeta potential change rate (mV/pH)=|(Z6?Z5)/(p6?p5)| where p6 denotes pH 6, p5 denotes pH 5, Z6 denotes a zeta potential at the pH 6, and Z5 denotes a zeta potential at the pH 5.

Abstract: Provided is a polishing composition for a semiconductor process comprising abrasive particles, the abrasive particles containing an amine-based polishing rate improver, and comprising the amine-based polishing rate improver. Provided is a polishing composition for a semiconductor process further comprising an amine-based surface modifier around the surface of the abrasive particles, wherein the sum of the content of an amine group contained in the amine-based polishing rate improver and the content of an amine group contained in the amine-based surface modifier is 0.0185% by weight or more based on the total composition weight. The polishing composition for a semiconductor process may implement the polishing rate and defect prevention performance within a target range in polishing the boron-doped polysilicon layer.

Abstract: The present disclosure relates to a polishing composition for a semiconductor process that may increase a polishing rate of a boron-doped polysilicon layer, improve polishing selectivity, prevent a defect of a wafer that may occur in a polishing process, and improving surface roughness of the wafer, and a method for polishing a substrate by using the same. In addition, the present disclosure relates to a method for manufacturing a polished substrate by using a polishing composition for a semiconductor process.

Abstract: The present disclosure relates to a polishing composition for a semiconductor process, which prevents polishing particles from being re-adsorbed on a wafer during a polishing process to prevent wafer defects, and improves polishing rate, selectivity, and dispersibility. In addition, when a semiconductor device is manufactured by applying the polishing composition for a semiconductor process, polarization is possible with an excellent selectivity even on a surface on which all of tungsten, a diffusion barrier layer, and an insulating layer exist.

Abstract: Provided is a composition for semiconductor processing including abrasive particles and at least one additive. The composition may exhibit excellent polishing performance by being applied to a process of polishing a semiconductor wafer, may minimize defects in a polishing target surface, may achieve flat polishing without a difference in flatness between a plurality of different layers when used to polish the externally exposed surfaces of the layers, and may be applied to polishing of the surface of a semiconductor wafer having a through silicon via (TSV). Also provided is a method of fabricating a semiconductor device using the composition.

Abstract: A semiconductor process polishing composition, and a polishing method of a substrate applied with a polishing composition are provided. The process provides a polishing composition improved in the polishing rate, selectivity and dispersibility, and provides a manufacturing method of a substrate that is polished by applying such a polishing composition for a semiconductor process.

Abstract: The present invention relates to a slurry composition for polishing a tungsten barrier layer. A slurry composition for polishing a tungsten barrier layer according to an embodiment of the present invention comprises abrasive grains and a sulfur-containing amino acid, and can improve edge over erosion (EOE).

Abstract: A polishing slurry composition is provided. The polishing slurry composition includes at least two types of abrasive particles among first abrasive particles, second abrasive particles, and third abrasive particles, and an oxidizer. A peak-to-valley roughness Rpv decreases when a contact area between the abrasive particles and a tungsten-containing film increases.

Abstract: A slurry composition for polishing tungsten is provided. The slurry composition for polishing tungsten may include a water-soluble polymer, abrasive particles and an etching adjuster.

Abstract: A polishing slurry composition is provided. The polishing slurry composition includes at least two types of abrasive particles among first abrasive particles, second abrasive particles, and third abrasive particles, and an oxidizer. A peak-to-valley roughness Rpv decreases when a contact area between the abrasive particles and a tungsten-containing film increases.

Abstract: A slurry composition for polishing tungsten is provided. The slurry composition for polishing tungsten may include a water-soluble polymer, abrasive particles and an etching adjuster.