Abstract: Embodiments are generally directed to a snap button fastener providing electrical connection. An embodiment of a fastener includes a first mechanical part, the first mechanical part including at least a stud portion, the first mechanical part including a first electrical connector; a second mechanical part, the second mechanical part including at least a socket portion with a spring element and the socket portion, the second mechanical part including a second electrical connector. The stud portion of the first mechanical part and the socket portion of second mechanical part, if separated, are to interlock upon the application of a first force towards each other, and, if interlocked, to separate upon the application of a second force away from each other.

Abstract: Generally, this disclosure provides systems, devices, methods and computer readable media for accident avoidance during mobile device usage. The mobile device may include a processor, a camera, one or more sensors, and accident avoidance circuitry. The accident avoidance circuitry may include user focus detection circuitry configured to detect that an application executing on the processor requires attention focus of a user of the mobile device; motion detection circuitry configured to determine motion of the mobile device based on input from the camera or from the one or more sensors; obstacle detection circuitry configured to detect obstacles in the path of the determined motion of the mobile device based on input from the camera; and warning generation circuitry configured to generate an alarm to the user based on the detected user attention focus, the determined motion and the detected obstacles.

Abstract: A semiconductor device includes a substrate having a top surface. A semiconductor circuit defines a circuit area on the top surface of the substrate. An interconnect is spaced apart from the circuit area and extends from the top surface into the substrate. The interconnect includes a sidewall formed of an electrically insulating material. An opening is provided in the sidewall.

Abstract: Embodiments of the present disclosure are directed towards techniques and configurations for hybrid carbon-metal interconnect structures in integrated circuit assemblies. In one embodiment, an apparatus includes a substrate, a metal interconnect layer disposed on the substrate and configured to serve as a growth initiation layer for a graphene layer and the graphene layer, wherein the graphene layer is formed directly on the metal interconnect layer, the metal interconnect layer and the graphene layer being configured to route electrical signals. Other embodiments may be described and/or claimed.

Abstract: Embodiments are generally directed to a snap button fastener providing electrical connection. An embodiment of a fastener includes a first mechanical part, the first mechanical part including at least a stud portion, the first mechanical part including a first electrical connector; a second mechanical part, the second mechanical part including at least a socket portion with a spring element and the socket portion, the second mechanical part including a second electrical connector. The stud portion of the first mechanical part and the socket portion of second mechanical part, if separated, are to interlock upon the application of a first force towards each other, and, if interlocked, to separate upon the application of a second force away from each other.

Abstract: Embodiments of a flexibly-wrapped integrated circuit die device and a method for mounting a flexibly-wrapped integrated circuit die to a substrate are disclosed. In some embodiments, the flexibly-wrapped integrated circuit die device includes a substrate and a flexible integrated circuit die coupled to the substrate in a substantially vertical orientation with reference to a surface of the substrate.

Abstract: Embodiments of the present description include stacked microelectronic dice embedded in a microelectronic substrate and methods of fabricating the same. In one embodiment, at least one first microelectronic die is attached to a second microelectronic die, wherein an underfill material is provided between the second microelectronic die and the at least one first microelectronic die. The microelectronic substrate is then formed by laminating the first microelectronic die and the second microelectronic die in a substrate material.

Abstract: Generally, this disclosure provides systems, devices, methods and computer readable media for accident avoidance during mobile device usage. The mobile device may include a processor, a camera, one or more sensors, and accident avoidance circuitry. The accident avoidance circuitry may include user focus detection circuitry configured to detect that an application executing on the processor requires attention focus of a user of the mobile device; motion detection circuitry configured to determine motion of the mobile device based on input from the camera or from the one or more sensors; obstacle detection circuitry configured to detect obstacles in the path of the determined motion of the mobile device based on input from the camera; and warning generation circuitry configured to generate an alarm to the user based on the detected user attention focus, the determined motion and the detected obstacles.

Abstract: Embodiments of a flexibly-wrapped integrated circuit die device and a method for mounting a flexibly-wrapped integrated circuit die to a substrate are disclosed. In some embodiments, the flexibly-wrapped integrated circuit die device includes a substrate and a flexible integrated circuit die coupled to the substrate in a substantially vertical orientation with reference to a surface of the substrate.

Abstract: Embodiments of wearable electronic devices, components thereof, and related systems and techniques are disclosed herein. For example, a wearable electronic device may include a wearable support structure having a first surface and a second surface; a first electrode located at the first surface, wherein, when the wearable electronic device is worn by a user on a portion of the user's body, the first electrode is arranged to contact the user's skin in the portion of the user's body; a second electrode located at the second surface, wherein, when the wearable electronic device is worn by a user on the portion of the user's body, the second electrode is arranged to not contact the user's skin in the portion of the user's body; and a resistance switch having first and second input terminals coupled to the first and second electrodes, respectively. Other embodiments may be disclosed and/or claimed.

Abstract: Some forms relate to wearable computing devices that include a “touch pad” like interface. In some forms, the example wearable computing devices may be integrated with (or attached to) textiles (i.e. clothing). In other forms, the example wearable computing devices may be attached directly to the skin of someone (i.e., similar to a bandage) that utilizes any of the example wearable computing devices. The example wearable computing devices include a flexible touch pad that may allow a user of the wearable computing device to more easily operate the wearable computing device. The example wearable computing devices described herein may include a variety of electronics. Some examples include a power supply and/or a communication device among other types of electronics.

Abstract: A through silicon via is described that has conductivity at high frequencies. In one example, the via includes a channel through at least a portion of a silicon die. A first conductive layer has a first electrical conductivity. A second conductive layer covers the outer surface of the first conductive layer and has a second electrical conductivity higher than the first electrical conductivity.

Abstract: Structures of a system on chip and methods of forming a system on chip are disclosed. In one embodiment, a method of fabricating the system on chip includes forming a through substrate opening from a back surface of a substrate, the through substrate opening disposed between a first and a second region, the first region comprising devices for RF circuitry and the second region comprising devices for other circuitry. The method further includes forming patterns for redistribution lines on a photo resist layer, the photo resist layer disposed under the back surface, and filling the through substrate opening and the patterns for redistribution lines with a conductive material.

Abstract: A semiconductor device includes: a chip having at least one electrically conductive contact at a first side of the chip; an extension layer extending laterally from one or more sides of the chip; a redistribution layer on a surface of the extension layer and the first side, and coupled to the contact; an interposer having at least one electrically conductive contact at a first surface of the interposer and coupled to the redistribution layer, and at least one electrically conductive contact at a second surface of the interposer opposite to the first surface; a molding material at least partially enclosing the chip and the redistribution layer, and in contact with the interposer. Another semiconductor device includes: an interposer; a redistribution layer over the interposer; a circuit having first and second circuit portions, wherein the redistribution layer includes the first circuit portion, and the interposer includes the second circuit portion.

Abstract: Embodiments are generally directed to a snap button fastener providing electrical connection. An embodiment of a fastener includes a first mechanical part, the first mechanical part including at least a stud portion, the first mechanical part including a first electrical connector; a second mechanical part, the second mechanical part including at least a socket portion with a spring element and the socket portion, the second mechanical part including a second electrical connector. The stud portion of the first mechanical part and the socket portion of second mechanical part, if separated, are to interlock upon the application of a first force towards each other, and, if interlocked, to separate upon the application of a second force away from each other.

Abstract: Embodiments of the present description include stacked microelectronic dice embedded in a microelectronic substrate and methods of fabricating the same. In one embodiment, at least one first microelectronic die is attached to a second microelectronic die, wherein an underfill material is provided between the second microelectronic die and the at least one first microelectronic die. The microelectronic substrate is then formed by laminating the first microelectronic die and the second microelectronic die in a substrate material.

Abstract: Embodiments of the present description include stacked microelectronic dice embedded in a microelectronic substrate and methods of fabricating the same. In one embodiment, at least one first microelectronic die is attached to a second microelectronic die, wherein an underfill material is provided between the second microelectronic die and the at least one first microelectronic die. The microelectronic substrate is then formed by laminating the first microelectronic die and the second microelectronic die in a substrate material.

Abstract: A semiconductor device includes a substrate having a top surface. A semiconductor circuit defines a circuit area on the top surface of the substrate. An interconnect is spaced apart from the circuit area and extends from the top surface into the substrate. The interconnect includes a sidewall formed of an electrically insulating material. An opening is provided in the sidewall.

Abstract: Embodiments of the present disclosure are directed towards techniques and configurations for hybrid carbon-metal interconnect structures in integrated circuit assemblies. In one embodiment, an apparatus includes a substrate, a metal interconnect layer disposed on the substrate and configured to serve as a growth initiation layer for a graphene layer and the graphene layer, wherein the graphene layer is formed directly on the metal interconnect layer, the metal interconnect layer and the graphene layer being configured to route electrical signals. Other embodiments may be described and/or claimed.

Abstract: A semiconductor device includes a substrate having a top surface. A semiconductor circuit defines a circuit area on the top surface of the substrate. An interconnect is spaced apart from the circuit area and extends from the top surface into the substrate. The interconnect includes a sidewall formed of an electrically insulating material. An opening is provided in the sidewall.