Abstract: A circuit and corresponding method for doubling the frequency of an input signal, even when the input signal is of low frequency or a square wave. The input signal is applied to a phase-shifting circuit that produces a pair of output signals that are theoretically 90° apart in phase, but may lack the desired form if the original input signal is of low frequency. The waveforms of the two output signals are enhanced in latching hysteresis buffers that produce more uniformly squared waves, with zero crossings corrected to be more exactly 90° apart and with desirably steep state transitions. The enhanced-waveform output signals are coupled to an exclusive OR (XOR) gate to produce a double-frequency output.

Abstract: Apparatus, and a related method, for converting digital signals directly to radio-frequency (RF) analog signals. The apparatus includes a single high-speed delta-sigma modulator and an integrated upsampler that increases the data rate of digital input samples by a selected factor, such as nine times. The delta-sigma modulator is configured to include a feedback multiplier coefficients that are selected to greatly facilitate operation of associated adders. At least one critical adder includes a carry-select adder modification that further speeds up the add operation and ensures that the apparatus operates at desirably high frequencies.

Abstract: A diversity receiver circuit system (10) including a primary channel (20) and a diversity channel (22), where analog input signals are converted to differential signals in both channels (20, 22). The receiver circuit system (10) includes a multiplexer (14) and a variable gain amplifier (12) formed on a single RF integrated circuit chip (16), where the multiplexer (14) is positioned before the amplifier (12). The differential signals in the primary channel (20) and the diversity channel (22) are applied to an amplified path (72, 78) and a non-amplified path (76, 82) in the multiplexer (14). A control signal selects one of the amplified primary channel signal, the non-amplified primary channel signal, the amplified diversity channel signal or the non-amplified diversity channel signal.

Abstract: A highly compact inductor formed on opposite faces of a dielectric substrate. Sets of parallel spaced conductive traces formed on the opposite faces of the substrate are interconnected by metallized vias through the substrate, in such a way as to form a continuous spiral conductive path. The inductor is preferably formed as two closely adjacent segments, each with conductive traces on each face of the substrate and each having metallized vias interconnecting the conductive traces. The segments are electrically connected in series and produce a magnetic field that extends through each segment in opposite directions and is closely coupled from one segment to the other. The inductor is, therefore, electromagnetically similar to a wire-wound toroidal inductor, providing high inductance and contourable Q values, but is highly compact, especially in the z-axis direction normal to the substrate.

Abstract: A digital-to-analog converter having a differential signal path, and a current parking circuit that is independent of the signal path, thereby avoiding a source of imbalance that caused output anomalies in conventional digital-to-analog circuitry. In one embodiment of the invention, a pair of diodes in the current parking circuit are connected through their own independent load resistors to a voltage source. In another embodiment, a single diode is used instead of the pair of diodes, and in a third embodiment the current parking circuit comprises a single load resistor connected to the voltage source, and no diodes at all.

Abstract: A low noise amplifier (LNA) has a selectable bypass signal path integrated into the same integrated circuit (IC) as the amplifier components. In a normal mode of operation, an integrated mode switch allows an appropriate biasing signal to be applied LNA transistors, which function to amplify an input signal and produce an amplified output signal. In an attenuation mode, which is activated to handle large input signals, the LNA transistors are switched off and the input signal is attenuated by a voltage divider, which provides an attenuated output on a signal path that bypasses the LNA amplifier. An attenuation switching signal not only operates the mode switch in the LNA, but also selects between the normal and bypass outputs of the LNA, for further amplification downstream of the LNA.

Abstract: A low noise amplifier (LNA) has a selectable bypass signal path integrated into the same integrated circuit (IC) as the amplifier components. In a normal mode of operation, an integrated mode switch allows an appropriate biasing signal to be applied LNA transistors, which function to amplify an input signal and produce an amplified output signal. In an attenuation mode, which is activated to handle large input signals, the LNA transistors are switched off and the input signal is attenuated by a voltage divider, which provides an attenuated output on a signal path that bypasses the LNA amplifier. An attenuation switching signal not only operates the mode switch in the LNA, but also selects between the normal and bypass outputs of the LNA, for further amplification downstream of the LNA.

Abstract: A switched gain circuit (350) that employs a plurality of conduction paths (378-384) that provide different levels of signal gain or attenuation to an analog input signal. Each conduction path (378-384) includes a plurality of switching devices (388-402 and 410-424), such as heterojunction bipolar transistors. Further, each conduction path includes a gain device such as a degenerative resistor, that provides gain or attenuation to the analog input signals. A separate control signal is applied to a switching device (410-424) in each conduction path (378-384) to select a particular conduction path to be coupled to the output. The analog input signal can be a differential analog input signal where a first part of the signal is coupled to the base terminal of a bipolar transistor (410-424) in each conduction path (378-384), and a second part of the analog signal is coupled to the base terminal of another bipolar transistor (410-424) in each conduction path (378-384).

Abstract: A combined multiplexer and switched gain circuit (250) that selectively multiplexes differential analog signals from a primary channel (20) and a diversity channel (22) in a diversity receiver system (10) to a single output. The circuit (250) is based on a current mode logic design where a plurality of separate conduction paths (278-284) are provided between a voltage line (266) and a current source (268). An output line (264) of the circuit (250) is coupled to each conduction path (278-284) so that the differential analog signals from the primary channel (20) and the diversity channel (22) can be selectively outputted to the circuit (250). Each conduction path (278-284) includes a gain device, such as degenerative resistor, that provides signal gain or no signal gain for that conduction path (278-284). Control signals are selectively applied to switching devices (310-324) and each conduction path (278-284) so that the conduction path (278-284) can be independently selected to provide the multiplexing.

Abstract: A differential PIN diode attenuator (450) that selectively attenuates a differential analog input signal. The two parts of the differential signal are applied to separate input lines (452, 454) and are 180° out of phase with each other. One input line (452) is coupled to a first attenuation path (456) including a resistor and a first non-attenuation path (458) including a PIN diode (462). The other input line (454) is coupled to a second attenuation path (466) including a resistor and a second non-attenuation path (468) including a PIN diode (472). The diodes (462, 472) are biased by a DC bias signal so that the differential analog signal can bypass the attenuation paths (456, 466). The DC bias signal is applied halfway between the input lines (452, 454) where the two parts of the differential signal cancel. A shunt diode (490, 492,) and parallel shunt resistors are provided in combination with the attenuation resistor to allow it to have a relatively small value.

Abstract: A switched gain circuit (350) that employs a plurality of conduction paths (378-384) that provide different levels of signal gain or attenuation to an analog input signal. Each conduction path (378-384) includes a plurality of switching devices (388-402 and 410-424), such as heterojunction bipolar transistors. Further, each conduction path includes a gain device such as a degenerative resistor, that provides gain or attenuation to the analog input signals. A separate control signal is applied to a switching device (410-424) in each conduction path (378-384) to select a particular conduction path to be coupled to the output. The analog input signal can be a differential analog input signal where a first part of the signal is coupled to the base terminal of a bipolar transistor (410-424) in each conduction path (378-384), and a second part of the analog signal is coupled to the base terminal of another bipolar transistor (410-424) in each conduction path (378-384).

Abstract: A differential PIN diode attenuator (450) that selectively attenuates a differential analog input signal. The two parts of the differential signal are applied to separate input lines (452, 454) and are 180° out of phase with each other. One input line (452) is coupled to a first attenuation path (456) including a resistor and a first non-attenuation path (458) including a PIN diode (462). The other input line (454) is coupled to a second attenuation path (466) including a resistor and a second non-attenuation path (468) including a PIN diode (472). The diodes (462, 472) are biased by a DC bias signal so that the differential analog signal can bypass the attenuation paths (456, 466). The DC bias signal is applied halfway between the input lines (452, 454) where the two parts of the differential signal cancel. A shunt diode (490, 492,) and parallel shunt resistors are provided in combination with the attenuation resistor to allow it to have a relatively small value.

Abstract: A diversity receiver circuit system (10) including a primary channel (20) and a diversity channel (22), where analog input signals are converted to differential signals in both channels (20, 22). The receiver circuit system (10) includes a multiplexer (14) and a variable gain amplifier (12) formed on a single RF integrated circuit chip (16), where the multiplexer (14) is positioned before the amplifier (12). The differential signals in the primary channel (20) and the diversity channel (22) are applied to an amplified path (72, 78) and a non-amplified path (76, 82) in the multiplexer (14). A control signal selects one of the amplified primary channel signal, the non-amplified primary channel signal, the amplified diversity channel signal or the non-amplified diversity channel signal.

Abstract: A combined multiplexer and switched gain circuit (250) that selectively multiplexes differential analog signals from a primary channel (20) and a diversity channel (22) in a diversity receiver system (10) to a single output. The circuit (250) is based on a current mode logic design where a plurality of separate conduction paths (278-284) are provided between a voltage line (266) and a current source (268). An output line (264) of the circuit (250) is coupled to each conduction path (278-284) so that the differential analog signals from the primary channel (20) and the diversity channel (22) can be selectively outputted to the circuit (250). Each conduction path (278-284) includes a gain device, such as degenerative resistor, that provides signal gain or no signal gain for that conduction path (278-284). Control signals are selectively applied to switching devices (310-324) and each conduction path (278-284) so that the conduction path (278-284) can be independently selected to provide the multiplexing.

Abstract: A stand-alone circuit board (3), a packaged surface mount PIN diode (1) and a metal ribbon (9) are mounted together in a new tented diode configuration. The flat end surface of the diode end terminal (4) is attached to a metal trace (5) on the circuit board, positioning the diode in an upstanding position, overlying the metal trace and leaving the other diode end terminal (2) in an elevated position over the circuit board. The metal ribbon wraps over the diode symmetrically extending along opposed sides of the diode to complete an electrical connect on the circuit board. In performance, the configuration emulates that prior configuration employing a thick metal plate backed circuit board. An improved RF switch incorporates the foregoing tented diode configuration.