Patents by Inventor Haruhiko Toyama

Haruhiko Toyama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10313374
    Abstract: According to one embodiment, an electronic apparatus includes a memory and a hardware processor. The hardware processor is configured to store a log of a received packet in the memory, set a transmission delay time for the log stored in the memory, and transmit the log in accordance with the transmission delay time of the log.
    Type: Grant
    Filed: December 22, 2015
    Date of Patent: June 4, 2019
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Haruhiko Toyama
  • Patent number: 10281970
    Abstract: According to an embodiment, a control device includes a calculator and a setting unit. The calculator is configured to calculate a system processing time indicating a time required for processing executed after a system, the system including a plurality of elements, power to each element being individually controlled, resumes from a sleep state in which the number of elements supplied with power is limited to a predetermined number and an operation of the system is stopped. The setting unit is configured to set a mode indicating an operation state of the system according to the system processing time calculated by the calculator when a resume factor indicating a factor for resuming the system from the sleep state occurs.
    Type: Grant
    Filed: November 2, 2015
    Date of Patent: May 7, 2019
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventors: Hiroyoshi Haruki, Koichi Fujisaki, Junichi Segawa, Satoshi Shirai, Yusuke Shirota, Akihiro Shibata, Masaya Tarui, Tetsuro Kimura, Tatsunori Kanai, Haruhiko Toyama
  • Patent number: 10203740
    Abstract: According to an embodiment, an information processing device includes a memory device, one or more peripheral devices, a processor, and a state controller. The processor is able to change between a first state, in which a command is executed, and a second state, in which an interrupt is awaited. When the processor enters the second state and if an operation for data transfer is being performed between at least one of the peripheral devices and the memory device, the state controller switches the information processing device to a third state in which power consumption is lower as compared to the first state. If the operation for data transfer is not being performed between any of the peripheral devices and the memory device, the state controller switches the information processing device to a fourth state in which power consumption is lower as compared to the third state.
    Type: Grant
    Filed: August 27, 2014
    Date of Patent: February 12, 2019
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventors: Junichi Segawa, Tatsunori Kanai, Tetsuro Kimura, Koichi Fujisaki, Masaya Tarui, Satoshi Shirai, Hiroyoshi Haruki, Yusuke Shirota, Akihiro Shibata, Shiyo Yoshimura, Haruhiko Toyama
  • Patent number: 9904350
    Abstract: A recognition device includes a storage unit, an acquiring unit, a first calculator, a second calculator, a determining unit, and an output unit. The storage unit stores multiple training patterns each belonging to any one of multiple categories. The acquiring unit acquires a recognition target pattern to be recognized. The first calculator calculates, for each of the categories, a distance histogram representing distribution of the number of training patterns belonging to the category with respect to distances between the recognition target pattern and the training patterns belonging to the category. The second calculator analyzes the distance histogram of each of the categories to calculate confidence of the category. The determining unit determines a category of the recognition target pattern from the multiple categories by using the confidences. The output unit outputs the category of the recognition target pattern.
    Type: Grant
    Filed: December 10, 2013
    Date of Patent: February 27, 2018
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventors: Hiroyoshi Haruki, Masaya Tarui, Koichi Fujisaki, Tetsuro Kimura, Tatsunori Kanai, Junichi Segawa, Satoshi Shirai, Yusuke Shirota, Akihiro Shibata, Shiyo Yoshimura, Haruhiko Toyama
  • Publication number: 20170178599
    Abstract: A data processing device according to embodiments comprises a non-volatile memory, and executing a process to data stored in the memory while switching a power to be supplied to the memory from a first power for executing the process to a second power being lower than the first power. When a time required for the process is shorter than a threshold, the device executes the process with the power supplied to the memory being the first power, and after the process is finished, the device switches the power supplied to the memory from the first power to the second power. When the time required for the process is equal or longer than the threshold, the device switches the power supplied to the memory from the first power to the second poser, returns the power supplied to the memory from the second power to the first power, and executes the process with the power supplied to the memory being the first power.
    Type: Application
    Filed: March 7, 2017
    Publication date: June 22, 2017
    Inventors: Yusuke Shirota, Tatsunori Kanai, Tetsuro Kimura, Koichi Fujisaki, Akihiro Shibata, Haruhiko Toyama, Junichi Segawa, Masaya Tarui, Satoshi Shirai, Hiroyoshi Haruki, Shiyo Yoshimura
  • Patent number: 9626940
    Abstract: A data processing device according to embodiments comprises a data converting unit, a selecting unit, a managing unit, a updating unit, and a controller. The data converting unit is configured to convert update-data for updating at least a part of an electronic paper into processed update-data to be displayed. The selecting unit is configured to select an update-control-information identifier to be used for updating the electronic paper with the processed update-data. The managing unit is configured to store the processed update-data and a selected update-control-information identifier on a first memory. The updating unit is configured to instruct a drawing step of the electronic paper using the processed update-data and the update-control-information identifier stored on the first memory.
    Type: Grant
    Filed: February 26, 2014
    Date of Patent: April 18, 2017
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yusuke Shirota, Tatsunori Kanai, Tetsuro Kimura, Koichi Fujisaki, Akihiro Shibata, Haruhiko Toyama, Junichi Segawa, Masaya Tarui, Satoshi Shirai, Hiroyoshi Haruki, Shiyo Yoshimura
  • Patent number: 9625970
    Abstract: According to an embodiment, an information processing apparatus that includes a processor, has a first control unit, a power storage unit, and a second control unit. The first control unit is configured to control execution of a process by the processor. The power storage unit is configured to store therein power. The second control unit is configured to control reduction of power consumption of the information processing apparatus in a case where there is a process waiting to be executed and an amount of stored power of the power storage unit is equal to or less than a first threshold.
    Type: Grant
    Filed: December 30, 2013
    Date of Patent: April 18, 2017
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Shiyo Yoshimura, Junichi Segawa, Tatsunori Kanai, Tetsuro Kimura, Yusuke Shirota, Masaya Tarui, Hiroyoshi Haruki, Satoshi Shirai, Koichi Fujisaki, Akihiro Shibata, Haruhiko Toyama
  • Patent number: 9619001
    Abstract: According to an embodiment, an information processing apparatus includes: a first control unit to control a first device; and a second control unit to control a second device. The first control unit includes a first request processing unit, a notification unit, and a first execution unit. The second request processing unit receives a second request including an instruction to start a process of the second device. The notification unit notifies the second control unit that the first control unit receives a first request. The second execution unit executes a second request received by the second request processing unit when the first device is in the active state, and executes the second request stored in the storage unit when the notification is received by the notification receiving unit.
    Type: Grant
    Filed: February 26, 2014
    Date of Patent: April 11, 2017
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Junichi Segawa, Tatsunori Kanai, Tetsuro Kimura, Yusuke Shirota, Shiyo Yoshimura, Masaya Tarui, Hiroyoshi Haruki, Satoshi Shirai, Koichi Fujisaki, Akihiro Shibata, Haruhiko Toyama
  • Publication number: 20160320998
    Abstract: According to an embodiment, a power control device includes a storage unit, a monitor, a determining unit, and a controller. The storage device stores a look-up table, which includes relationship between needed power consumptions and start-up conditions of an electronic device including a plurality of modules. The start-up condition of the electronic device is determined from the needed power consumption in the look-up table and specifies a power on/off status of the modules in the electronic device. The monitor monitors a voltage or available power supplied by a power source when the electronic device is activated. The determining unit determines a start-up condition corresponding to needed power consumption, which corresponds to the voltage or available power monitored by the monitor, with reference to the table. The controller sets a start-up condition of the electronic device to start up the electronic device in the start-up condition determined by the determining unit.
    Type: Application
    Filed: July 14, 2016
    Publication date: November 3, 2016
    Inventors: Koichi Fujisaki, Tetsuro Kimura, Tatsunori Kanai, Haruhiko Toyama, Junichi Segawa, Satoshi Shirai, Masaya Tarui, Hiroyoshi Haruki, Yusuke Shirota, Akihiro Shibata
  • Patent number: 9430017
    Abstract: According to an embodiment, an information processing apparatus is powered by a power source including a power generation unit and a power storage device that stores power generated by the power generation unit. The information processing apparatus includes a first obtaining, a second obtaining unit, and a first control unit. The first obtaining unit is configured to obtain first information indicating a value of power generated by the power generation unit. The second obtaining unit is configured to obtain second information indicating an value of stored energy in the power storage device. The first control unit is configured to start a process that is set in advance when the value of power indicated by the first information is greater than zero and the value of stored energy indicated by the second information is equal to or greater than a first threshold value.
    Type: Grant
    Filed: September 19, 2013
    Date of Patent: August 30, 2016
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Tetsuro Kimura, Akihiro Shibata, Tatsunori Kanai, Haruhiko Toyama, Koichi Fujisaki, Junichi Segawa, Hiroyoshi Haruki, Masaya Tarui, Satoshi Shirai, Yusuke Shirota
  • Patent number: 9423852
    Abstract: According to an embodiment, a power control device includes a storage unit, a monitor, a determining unit, and a controller. The storage device stores a look-up table, which includes relationship between needed power consumptions and start-up conditions of an electronic device including a plurality of modules. The start-up condition of the electronic device is determined from the needed power consumption in the look-up table and specifies a power on/off status of the modules in the electronic device. The monitor monitors a voltage or available power supplied by a power source when the electronic device is activated. The determining unit determines a start-up condition corresponding to needed power consumption, which corresponds to the voltage or available power monitored by the monitor, with reference to the table. The controller sets a start-up condition of the electronic device to start up the electronic device in the start-up condition determined by the determining unit.
    Type: Grant
    Filed: January 16, 2013
    Date of Patent: August 23, 2016
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Koichi Fujisaki, Tetsuro Kimura, Tatsunori Kanai, Haruhiko Toyama, Junichi Segawa, Satoshi Shirai, Masaya Tarui, Hiroyoshi Haruki, Yusuke Shirota, Akihiro Shibata
  • Patent number: 9405350
    Abstract: According to an embodiment, a memory control device controls a memory from/to which data are read/written by a processor. The memory control device includes a clock switcher and a control signal switcher. The clock receives as input a first clock and a second clock at a higher frequency than the first clock, supplies the first clock to the memory until the second clock becomes stable, and supplies the second clock after the second clock has become stable. The a control signal switcher starts supplying, to the memory, a first control signal for initializing the memory to a state allowing reading/writing of data by the processor while the first clock is being supplied to the memory, and supplies, to the memory, a second control signal according to the reading/writing of data by the processor, after the second clock is supplied to the memory and the memory is initialized.
    Type: Grant
    Filed: March 6, 2013
    Date of Patent: August 2, 2016
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Tatsunori Kanai, Tetsuro Kimura, Koichi Fujisaki, Junichi Segawa, Akihiro Shibata, Masaya Tarui, Satoshi Shirai, Yusuke Shirota, Hiroyoshi Haruki, Haruhiko Toyama
  • Patent number: 9400753
    Abstract: According to an embodiment, a control system includes a detector, an estimating unit, a determining unit, and a controller. The detector detects an idle state. The estimating unit estimates an idle period. When the idle state is detected, the determining unit determines whether a first power consumption when writeback of data which needs to be written back to a main storage device is performed and supply of power to a cache memory is stopped, is larger than a second power consumption when writeback of the data is not performed and supply of power is continued for the idle period. The controller stops the supply of power to the cache memory when the first power consumption is determined to be smaller than the second power consumption and continues the supply of power when the first power consumption is determined to be larger than the second power consumption.
    Type: Grant
    Filed: April 13, 2015
    Date of Patent: July 26, 2016
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Masaya Tarui, Koichi Fujisaki, Hiroyoshi Haruki, Tatsunori Kanai, Haruhiko Toyama, Tetsuro Kimura, Junichi Segawa, Yusuke Shirota, Satoshi Shirai, Akihiro Shibata
  • Publication number: 20160112449
    Abstract: According to one embodiment, an electronic apparatus includes a memory and a hardware processor. The hardware processor is configured to store a log of a received packet in the memory, set a transmission delay time for the log stored in the memory, and transmit the log in accordance with the transmission delay time of the log.
    Type: Application
    Filed: December 22, 2015
    Publication date: April 21, 2016
    Applicant: Kabushiki Kaisha Toshiba
    Inventor: Haruhiko Toyama
  • Patent number: 9304818
    Abstract: According to an embodiment, a control apparatus for controlling a target device includes an estimation unit and an issuing unit. The estimation unit is configured to estimate a second amount of energy required for the entire system including the target device and the control apparatus until the target device completes an execution of its function that is requested in accordance with an execution request for the target device. The issuing unit is configured to issue a control command for causing the target device to execute its function in accordance with the execution request, when the first amount of energy at a time point of receiving the execution request is greater than the second amount of energy.
    Type: Grant
    Filed: March 22, 2013
    Date of Patent: April 5, 2016
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tetsuro Kimura, Akihiro Shibata, Tatsunori Kanai, Haruhiko Toyama, Koichi Fujisaki, Junichi Segawa, Hiroyoshi Haruki, Masaya Tarui, Satoshi Shirai, Yusuke Shirota
  • Patent number: 9304578
    Abstract: A control device according to embodiments comprises a data-copying unit, a data-processing instructing unit, and a power-control unit. The data-copying unit copies data in a first memory to a second memory of which power consumption is less than power consumption of the first memory. The data is to be processed at a first data processing unit. The data-processing instructing unit instructs the first data processing unit to process the data copied to the second memory. The power-control unit switches power for the first memory from a first power to a second power while the first data processing unit is processing the data copied to the second memory. The first power is power supplied to the first memory at a time when the data is copied from the first memory to the second memory. The second power is lower than the first power.
    Type: Grant
    Filed: September 5, 2013
    Date of Patent: April 5, 2016
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yusuke Shirota, Tatsunori Kanai, Tetsuro Kimura, Haruhiko Toyama, Koichi Fujisaki, Junichi Segawa, Masaya Tarui, Satoshi Shirai, Hiroyoshi Haruki, Akihiro Shibata
  • Publication number: 20160070333
    Abstract: According to an embodiment, a control device includes a calculator and a setting unit. The calculator is configured to calculate a system processing time indicating a time required for processing executed after a system, the system including a plurality of elements, power to each element being individually controlled, resumes from a sleep state in which the number of elements supplied with power is limited to a predetermined number and an operation of the system is stopped. The setting unit is configured to set a mode indicating an operation state of the system according to the system processing time calculated by the calculator when a resume factor indicating a factor for resuming the system from the sleep state occurs.
    Type: Application
    Filed: November 2, 2015
    Publication date: March 10, 2016
    Inventors: Hiroyoshi Haruki, Koichi Fujisaki, Junichi Segawa, Satoshi Shirai, Yusuke Shirota, Akihiro Shibata, Masaya Tarui, Tetsuro Kimura, Tatsunori Kanai, Haruhiko Toyama
  • Patent number: 9207743
    Abstract: According to an embodiment, a control device includes a calculator and a setting unit. The calculator is configured to calculate a system processing time indicating a time required for processing executed after a system, the system including a plurality of elements, power to each element being individually controlled, resumes from a sleep state in which the number of elements supplied with power is limited to a predetermined number and an operation of the system is stopped. The setting unit is configured to set a mode indicating an operation state of the system according to the system processing time calculated by the calculator when a resume factor indicating a factor for resuming the system from the sleep state occurs.
    Type: Grant
    Filed: December 21, 2012
    Date of Patent: December 8, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hiroyoshi Haruki, Koichi Fujisaki, Junichi Segawa, Satoshi Shirai, Yusuke Shirota, Akihiro Shibata, Masaya Tarui, Tetsuro Kimura, Tatsunori Kanai, Haruhiko Toyama
  • Patent number: 9110667
    Abstract: According to an embodiment, a control system includes a processing device; a main storage device to store the data; a cache memory to store part of the data stored; a prefetch unit to predict data highly likely to be accessed and execute prefetch, reading out data in advance onto the cache memory; and a power supply unit. The system further includes: a detecting unit to detect whether the processing device is in an idle state; a determining unit that determines whether to stop the supply of power to the cache memory in accordance with the state of the prefetch when determined as idle state; and a power supply control unit that controls the power supply unit so as to stop the supply of power, or controls the power supply unit so as to continue the supply of power.
    Type: Grant
    Filed: July 11, 2012
    Date of Patent: August 18, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yusuke Shirota, Tetsuro Kimura, Tatsunori Kanai, Haruhiko Toyama, Koichi Fujisaki, Junichi Segawa, Masaya Tarui, Satoshi Shirai, Hiroyoshi Haruki, Akihiro Shibata
  • Publication number: 20150212572
    Abstract: According to an embodiment, a control system includes a detector, an estimating unit, a determining unit, and a controller. The detector detects an idle state. The estimating unit estimates an idle period. When the idle state is detected, the determining unit determines whether a first power consumption when writeback of data which needs to be written back to a main storage device is performed and supply of power to a cache memory is stopped, is larger than a second power consumption when writeback of the data is not performed and supply of power is continued for the idle period. The controller stops the supply of power to the cache memory when the first power consumption is determined to be smaller than the second power consumption and continues the supply of power when the first power consumption is determined to be larger than the second power consumption.
    Type: Application
    Filed: April 13, 2015
    Publication date: July 30, 2015
    Inventors: Masaya Tarui, Koichi Fujisaki, Hiroyoshi Haruki, Tatsunori Kanai, Haruhiko Toyama, Tetsuro Kimura, Junichi Segawa, Yusuke Shirota, Satoshi Shirai, Akihiro Shibata