Patents by Inventor Haruhito Shimakura

Haruhito Shimakura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5254507
    Abstract: A semi-insulating InP single crystal, semiconductor device with a substrate of crystal and processes of producing the same are disclosed. Crystal is derived from an undoped InP single crystal intermediate. The intermediate has a concentration of all native Fe, Co and Cr of 0.05 ppmw. The crystal has a resistivity of 1.times.10.sup.6 .OMEGA..multidot.cm or more and a mobility of above 3,000 cm.sup.2 /V.multidot.s both at 300K. A process of producing the crystal includes a step of heat-treating the intermediate under 6 kg/cm.sup.2 of phosphorus vapor pressure. The produced semiconductor device is a MIS device operating in essentially the same high-speed manner as a HEMT.
    Type: Grant
    Filed: September 11, 1992
    Date of Patent: October 19, 1993
    Assignee: Nippon Mining Co., Ltd.
    Inventors: Haruhito Shimakura, Osamu Oda, Keiji Kainosho
  • Patent number: 5219632
    Abstract: According to the present invention, an ingot of the compound semiconductor single crystal grown by the LEC method or the HB method, or a block/blocks or wafers cut from the ingot is subjected to a high temperature annealing at any temperature in the range not less than 1100.degree. C. and not more than the melting point, and then the ingot is cooled at the cooling rate of 15.degree..about.30.degree. C./min. This method ensures that the egg-shape etch pit density revealed in the single crystal by AB etchant is 5.times.10.sup.4 cm.sup.-2 or less, preferably 5.times.10.sup.3 cm.sup.-2 or less. As a result, the device employing the single crystal as its substrate can be possessed of homogeneous property.
    Type: Grant
    Filed: October 20, 1989
    Date of Patent: June 15, 1993
    Inventors: Haruhito Shimakura, Gaku Kano, Hiromasa Yamamoto, Osamu Oda
  • Patent number: 5214003
    Abstract: An inventive process for producing a semiconductor device has the steps of: putting a compound semiconductor substrate, an element of the substrate elements having a higher vapor pressure in a quartz ampoule, evacuating the ampoule, introducing oxygen gas into the ampoule and then sealing the ampoule; heating the ampoule to produce an oxide layer on the surface of the compound semiconductor substrate; and forming an electrode metal layer on the oxide layer to produce a MOS diode with a low interface trap density or a Schottky diode with a high barrier height and small ideal factor. Thus, the process produces a Schottky diode of a good forward current/voltage characteristic, low reverse current and superior rectification performance and a MESFET of a low dispersion at threshold voltage.
    Type: Grant
    Filed: January 31, 1991
    Date of Patent: May 25, 1993
    Assignee: Nippon Mining Co., Ltd.
    Inventors: Haruhito Shimakura, Osamu Oda, Keiji Kainosho
  • Patent number: 5173127
    Abstract: A semi-insulating InP single crystal, semiconductor device with a substrate of crystal and processes of producing the same are disclosed. The crystal is derived from an undoped InP single crystal intermediate. The intermediate has a concentration of all native Fe, Co and Cr of 0.05 ppmw or less. The crystal has a resistivity of 1.times.10.sup.6 .OMEGA..multidot.cm or more and a mobility of above 3,000 cm.sup.2 /V.multidot.s both at 300 K. A process of producing the crystal includes a step of heat-treating the intermediate under 6 kg/cm.sup.2 of phosphorus vapor pressure. The produced semiconductor device is a MIS device operating in essentially the same high-speed manner as a HEMT.
    Type: Grant
    Filed: February 28, 1991
    Date of Patent: December 22, 1992
    Assignee: Nippon Mining Co., Ltd.
    Inventors: Haruhito Shimakura, Osamu Oda, Keiji Kainosho
  • Patent number: 5137847
    Abstract: A method of producing a GaAs single crystal substrate comprises the steps of conducting a first-stage annealing by vacuum-sealing a GaAs single crystal wafer and arsenic in a heat-resistant vessel and heating the wafer to a temperature of 1050.degree. to 1150.degree. C. while exposing it to arsenic vapor pressure, cooling the wafer to room temperature at a cooling rate of 1.degree.-25.degree. C./min., removing the wafer from the vessel, etching the wafer and placing it in another vessel, conducting a second-stage annealing by heating the wafer to a temperature of 910.degree. to 1050.degree. C. in a non-oxidizing atmosphere, cooling the wafer to room temperature at a cooling rate of 1.degree.-25.degree. C./min., removing it from the vessel, etching the wafer, conducting a third-stage annealing by vacuum-sealing the wafer and arsenic in the heat-resistant vessel and heating the wafer to a temperature of 520.degree.-730.degree. C. while exposing it to arsenic vapor, and cooling the wafer at least down to 400.
    Type: Grant
    Filed: December 12, 1991
    Date of Patent: August 11, 1992
    Assignee: Nippon Mining Co., Ltd.
    Inventors: Haruhito Shimakura, Manabu Kanou
  • Patent number: 4929564
    Abstract: The present invention relates to a method for producing InP single crystals containing impurities such as Fe, Co, Ti, Cr or the like by cutting the single crystals into wafers or blocks and heat-treating the cut wafers or blocks at temperatures ranging from 400.degree. C. to 690.degree. C. Further, the invention is related to a method for producing compound semiconductor devices employing Fe-doped InP single crystals as the substrate of the device. In this method, the InP single crystals are cut into wafers and the cut wafers are heat-treated at temperatures ranging from 400.degree. C. to 690.degree. C. Further, the wafers are implanted with ions and heat-treated at 690.degree. C. or lower to activate the implanted ions. These methods ensure to produce the single crystals and the compound semiconductor devices which have superior electrical properties.
    Type: Grant
    Filed: October 16, 1989
    Date of Patent: May 29, 1990
    Assignee: Nippon Mining Co., Ltd.
    Inventors: Keiji Kainosho, Haruhito Shimakura, Osamu Oda