Abstract: An information managing apparatus comprising memories for storing a single or plural application kits including no decision process and no data storage process. The application kits are defined only by an execution element routine. A software kit interface is provided for constructing the application kits independently of hardware and operating system. The software kit interface includes a library group for storing and processing a flow of the constructed application kits.

Abstract: In order to simplify production line layout and revision, a plurality of unmanned self-propelled vehicles are used. Some vehicles carry a work piece from station to station while auxiliary vehicles which remain at each station carry components and assembly robots. Transport vehicle are used to move new components from storage sites to the work place. To facilitate large scale operations a camera can be used to observe the vehicles and compare the movement pattern with a predetermined desired one in order to ascertain appropriate movement.

Abstract: Novel method and system for controlling input/output in a process control wherein state signals of object processes to be controlled are applied to a CPU via a process input/output unit and operated in the CPU in accordance with a logic programmed and stored in advance, and results of the operation are delivered out to the object processes to control the same. A buffer memory is interposed between the CPU and the process input/output unit. While reception and delivery of data are performed between the CPU or processor unit and the buffer memory, fetching of the state signals of the object processes or delivery of the process controlling signals is performed between the buffer memory and the object processes, thereby attaining a high rate processing as viewed from the overall processing of the system.

Abstract: A programmable sequence controller is provided with a display signal processor for preparing and correcting a sequence program in combination with a CRT (or cathode ray tube) display device. The signal processor simply effects signal processing of branch points and composition points in case where a so-called "ladder diagram" constituting the sequence diagram with relay symbols is prepared and displayed. Branch information is stored in an FIFO (or first in first out) register. The branch information is sequentially received and stored, and the information thus stored is read out in the order of storage, thus preparing the ladder diagram. There are provided a register for instructing the FI operation and a register for instructing the FO operation. The sequence display controller is applicable to the cases where a new ladder diagram is to be prepared, the diagram once prepared is corrected, and the operation is checked.

Abstract: A sequence control system suitable for checking the operation of an information processor includes a process I/O unit for receiving input data from process inputs and providing output data to process outputs; a sequence processing unit for calculating data at the process outputs by performing sequence operations according to the sequence programs stored in a sequence program memory on the basis of the data at the process inputs; a buffer memory provided between the process I/O unit and the sequence processing unit for storing both the process input data from the process I/O unit and the output data from the sequence processing unit; a control arrangement for setting the input data to the buffer memory and for allowing access to a selected sequence program according to manually set input information; a display for displaying the selected sequence program accessed through the control arrangement; and a switch for interrupting the transfer of I/O data between the process I/O unit and the buffer memory.

Abstract: An operation state display apparatus includes a counter for receiving input signals which respectively represent the individual operation states of a controlled object and for counting the duration time of at least one of the ON and OFF state of the input signal. A memory device is provided for memorizing the period of time lapse from an operation initiation reference time when the input signal goes from the OFF state to the ON state or vice versa. A display device is provided for displaying in the form of a time chart the operation state of the controlled object according to the data of the counter and of the memory device. The reference operation state of the controlled object can also be displayed on the display device.

Abstract: In a programmable logic controller in which the control sequence for a controlled-objective such as a machine tool is stored in a memory unit, and the controlled-objective is automatically operated in a predetermined sequence according to the control sequence stored in the memory unit; a display system is provided in which a sequence block obtained from the control sequence stored in the memory unit is displayed in the form of a sequence diagram, particularly, a sequence diagram which includes symbols of control elements such as relays. A necessary sequence block is automatically obtained from the control sequence and is displayed. This display system is capable of displaying the states of the control elements, such as the on-off states of relay contacts.

Abstract: A sequence control monitoring device is disclosed which receives from controlled-objects operated under a sequence control system signals independently representing the operating states of the individual controlled-objects. The monitoring device counts the time duration for which each input signal remains in its on or off state, compares the counted value with a preset value, and thus judges whether the operating state of the controlled-object is correct.

Abstract: A sequence controller of the digital logical circuit type, comprising a sequence program part and a processing circuit, wherein the desired sequence instruction is read from the sequence program part, and the sequence is processed and controlled by the processing circuit. A certain definite level is set at a branch point in an equivalent sequential circuit according to the path along which a signal of the sequential circuit is transmitted. This level and the on-off state of the branch point are stored in a memory. The given data are processed and controlled through the sequence program part and the memory.