Patents by Inventor Hayashi Kajitani

Hayashi Kajitani has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method of arranging logic circuit devices on logic circuit board
    Patent number: 4636966
    Abstract: In the fabrication of an electronic circuit such as an integrated circuit, a method of determining the arrangement of logic circuit devices on a circuit board on the basis of a logic data defining the logic circuit devices and the interconnections among them. The logic circuit devices are classified in groups in accordance with a degree that each signal line connected with the logic circuit devices requires the expedition of signal propagation therethrough. First, the logic circuit devices belonging to the group pertinent to the highest degree are arranged, and next those belonging to the group pertinent to the second highest degree are arranged. Such a processing is carried out for all the groups.
    Type: Grant
    Filed: February 8, 1984
    Date of Patent: January 13, 1987
    Assignee: Hitachi, Ltd.
    Inventors: Norio Yamada, Hayashi Kajitani, Kyoji Chiba, Mitsugu Edagawa