Abstract: An apparatus for multiplying and accumulating numeric quantities, including a multiplier for receiving the numeric quantities, with the multiplier having a sum output and a carry output. A first shift register has an input coupled to the sum output of the multiplier, and a second shift register has an input coupled to the carry output of the multiplier. An adder and third shift register are used to complete processing of the apparatus' arithmetic operations.

Abstract: A programmable motion estimator includes one dual ported memory for storing an image block, the prediction error, and a temporary block used in interpolation, and a pixel-group random access dual ported memory for storing a search window. The two ports of the two memories are selectively applied to an arithmetic logic unit, or ALU, through a multiplexer. One output of the ALU provides an absolute difference, which is furnished to a tree adder. Another output of the ALU provides an average value or a difference value, as selected, which is routed to the inputs of the image memory and the search memory. In motion vector searching, the ALU performs pixel absolute difference arithmetic using the pixel groups from the image memory and from the search memory, and determines a sum of absolute differences in the tree adder. In half pixel interpolation, the ALU performs pixel averaging arithmetic using pixel groups from the search memory, and writes back to the search memory.

Abstract: A vision processor includes a control section, a motion estimation section, and a discrete cosine transform (“DCT”) section. The motion estimation section includes two memories, an image memory with two read ports and a write port, and a search memory with two read ports and a write port. The DCT section includes a DCT memory configurable as a two read, two write port memory and as a four read, four write port memory. The ports of these memories are selectively applied to various elements in the motion estimation path and the DCT path. In motion vector searching, the ALU performs averaging and difference operations on pixels in the frame and search memories. Data from the search memory is shifted for certain operations, before arithmetic operations in the ALU are performed.

Abstract: According to one embodiment, a cost-effective videophone communicates over a POTS line, and generates video data in a format for a selected display type. The device includes a video source to capture images and to generate video data representing the images; a telephone line interface circuit, including a signal transmission circuit and a signal receiver circuit; to transmit and receive video data over the telephone line; a memory circuit for storing a main program including video data processing consistent with at least one video-coding recommendation and for processing pixels for a certain display type; a programmable processor circuit for executing the code for processing pixels for a certain display type and, in response, causing image data to be output for display. The programmable processor circuit has a DSP section for compressing and decompressing video, and a RISC-type processor section for general control.

Abstract: A programmable motion estimator includes one dual ported memory for storing an image block, the prediction error, and a temporary block used in interpolation, and a pixel-group random access dual ported memory for storing a search window. The two ports of the two memories are selectively applied to an arithmetic logic unit, or ALU, through a multiplexer. One output of the ALU provides an absolute difference, which is furnished to a tree adder. Another output of the ALU provides an average value or a difference value, as selected, which is routed to the inputs of the image memory and the search memory. In motion vector searching, the ALU performs pixel absolute difference arithmetic using the pixel groups from the image memory and from the search memory, and determines a sum of absolute differences in the tree adder. In half pixel interpolation, the ALU performs pixel averaging arithmetic using pixel groups from the search memory, and writes back to the search memory.

Abstract: A programmable motion estimator includes one dual ported memory for storing an image block, the prediction error, and a temporary block used in interpolation, and a pixel-group random access dual ported memory for storing a search window. The two ports of the two memories are selectively applied to an arithmetic logic unit, or ALU, through a multiplexer. One output of the ALU provides an absolute difference, which is furnished to a tree adder. Another output of the ALU provides an average value or a difference value, as selected, which is routed to the inputs of the image memory and the search memory. Among other tasks, the programmable motion estimator performs motion vector searching, half pixel interpolation, quarter pixel interpolation and error prediction determination.

Abstract: A vision processor includes a control section, a motion estimation section, and a discrete cosine transform ("DCT") section. The motion estimation section includes two memories, an image memory with two read ports and a write port, and a search memory with two read ports and a write port. The DCT section includes a DCT memory configurable as a two read, two write port memory and as a four read, four write port memory. The ports of these memories are selectively applied to various elements in the motion estimation path and the DCT path. In motion vector searching, the ALU performs averaging and difference operations on pixels in the frame and search memories. Data from the search memory is shifted for certain operations, before arithmetic operations in the ALU are performed.

Abstract: A programmable motion estimator includes one dual ported memory for storing an image block, the prediction error, and a temporary block used in interpolation, and a pixel-group random access dual ported memory for storing a search window. The two ports of the two memories are selectively applied to an arithmetic logic unit, or ALU, through a multiplexer. One output of the ALU provides an absolute difference, which is furnished to a tree adder. Another output of the ALU provides an average value or a difference value, as selected, which is routed to the inputs of the image memory and the search memory. In motion vector searching, the ALU performs pixel absolute difference arithmetic using the pixel groups from the image memory and from the search memory, and determines a sum of absolute differences in the tree adder. In half pixel interpolation, the ALU performs pixel averaging arithmetic using pixel groups from the search memory, and writes back to the search memory.

Abstract: A vision processor includes a control section, a motion estimation section, and a discrete cosine transform ("DCT") section. The motion estimation section includes two memories, an image memory with two read ports and a write port, and a search memory with two read ports and a write port. The DCT section includes a DCT memory configurable as a two read, two write port memory and as a four read, four write port memory. The ports of these memories are selectively applied to various elements in the motion estimation path and the DCT path. In motion vector searching, the ALU performs averaging and difference operations on pixels in the frame and search memories. Data from the search memory is shifted for certain operations, before arithmetic operations in the ALU are performed.