Abstract: An electrostatic chuck includes a cooling plate having a cooling flow path, an insulating plate disposed on the cooling plate, an upper plate disposed on the insulating plate and fixed to the cooling plate, and a fastening member coupling the cooling plate to the upper plate. The fastening member passes through the cooling plate and is coupled to a fastening portion provided on a lower surface of the upper plate. Movement of the fastening member is constrained only in a first direction intersecting an upper surface of the upper plate.

Abstract: Disclosed is a method of operating a storage device which includes a storage controller and a non-volatile memory device. The method includes providing a first request indicating a word line sequential read operation of a target memory block of the non-volatile memory device, providing first word line read data corresponding to memory cells of a first word line of the target memory block based on the first request, providing second word line read data corresponding to memory cells of a second word line of the target memory block based on the first request, the second word line being adjacent to the first word line, calculating a first word line gap value based on the first word line read data and the second word line read data, and performing a first reliability operation of the target memory block based on the first word line gap value.

Abstract: A method of operating a non-volatile memory device, which is configured to communicate with a storage controller includes: receiving a first request indicating a read reclaim determination and including environment information from the storage controller, performing a first on-chip read operation for generating first distribution information based on the first request, determining whether a read reclaim is required based on the first distribution information, and providing the storage controller with a determination result having a first bit value in response to determining that the read reclaim is required.

Abstract: In a method of writing data in a nonvolatile memory device, a write command, a write address and write data to be programmed are received. Offset information representing a verification level is received. The offset information is provided when the write data corresponds to a distribution deterioration pattern by checking an input/output (I/O) pattern of the write data. When the offset information is received, the write data is programmed based on the offset information such that at least one state among a plurality of states included in a distribution of threshold voltages of memory cells in which the write data is stored is changed.

Abstract: Provided are a storage system including a host and a storage device, and an operation method of the storage system. The storage device includes a memory controller and a memory device, where an operation method of the memory controller includes receiving from the host a first mode change request for a folder, which is a unit for managing at least one file, and a logical address of the at least one file, and in response to the first mode change request, rewriting to the memory device first data corresponding to the logical address in a second operating mode, and invalidating first data which is existing data already written to correspond to the logical address and the first data in a first operating mode, wherein the first mode change request sets a data operation speed to a high-speed mode for the at least one file included in the folder.

Abstract: Disclosed is a method of operating a storage controller which communicates with a non-volatile memory device. The method includes outputting a first command including a request for on-chip valley search (OVS) count data of a memory region of the non-volatile memory device to the non-volatile memory device, wherein the OVS count data include a first count value of a first read voltage and a second count value of a second read voltage, receiving the OVS count data from the non-volatile memory device, determining a first error count value for the first read voltage and a second error count value for the second read voltage, based on the OVS count data, and determining a subsequent operation, based on the first and second error count values.

Abstract: A nonvolatile memory device including: a memory cell array, the memory cell array including a plurality of cell strings, at least one of the cell strings including a plurality of memory cells stacked in a direction perpendicular to a surface of a substrate, at least one of the memory cells is a multi-level cell storing at least three bits; and a control logic circuit configured to control a page buffer to read a fast read page of the memory cells with one read voltage and at least two normal read pages of the memory cells with the same number of read voltages.

Abstract: Disclosed is a method of operating a storage controller which communicates with a non-volatile memory device. The method includes outputting a first command including a request for on-chip valley search (OVS) count data of a memory region of the non-volatile memory device to the non-volatile memory device, wherein the OVS count data include a first count value of a first read voltage and a second count value of a second read voltage, receiving the OVS count data from the non-volatile memory device, determining a first error count value for the first read voltage and a second error count value for the second read voltage, based on the OVS count data, and determining a subsequent operation, based on the first and second error count values.

Abstract: Provided are a storage system including a host and a storage device, and an operation method of the storage system. The storage device includes a memory controller and a memory device, where an operation method of the memory controller includes receiving from the host a first mode change request for a folder, which is a unit for managing at least one file, and a logical address of the at least one file, and in response to the first mode change request, rewriting to the memory device first data corresponding to the logical address in a second operating mode, and invalidating first data which is existing data already written to correspond to the logical address and the first data in a first operating mode, wherein the first mode change request sets a data operation speed to a high-speed mode for the at least one file included in the folder.

Abstract: An operation method of a storage controller which includes a nonvolatile memory device, the method including: collecting a first parameter indicating a degradation factor of a first memory area of the nonvolatile memory device and a second parameter indicating a degree of degradation occurring at the first memory area, in an initial driving period; selecting a first function model of a plurality of function models based on the first parameter and the second parameter and predicting a first error tendency of the first memory area based on the first function model; determining a first reliability interval based on the first error tendency; and performing a first reliability operation on the first memory area of the nonvolatile memory device based on the first reliability interval.

Abstract: A memory device may determine cell count information from a threshold voltage distribution of memory cells and may determine a detection case based on cell count information when correction of an error in read data, received from the memory device performing a read operation, fails. The memory controller may control the memory device to perform a read operation using a development time determined in consideration of an offset voltage of a read voltage corresponding to the detection case. When correction of the error in the read data fails again, the memory controller may control the memory device to perform a read operation using a corrected read voltage generated using a dynamic offset voltage obtained by inputting the cell count information to a machine learning model.

Abstract: A memory device may determine cell count information from a threshold voltage distribution of memory cells and may determine a detection case based on cell count information when correction of an error in read data, received from the memory device performing a read operation, fails. The memory controller may control the memory device to perform a read operation using a development time determined in consideration of an offset voltage of a read voltage corresponding to the detection case. When correction of the error in the read data fails again, the memory controller may control the memory device to perform a read operation using a corrected read voltage generated using a dynamic offset voltage obtained by inputting the cell count information to a machine learning model.

Abstract: In a method of writing data in a nonvolatile memory device, a write command, a write address and write data to be programmed are received. Offset information representing a verification level is received. The offset information is provided when the write data corresponds to a distribution deterioration pattern by checking an input/output (I/O) pattern of the write data. When the offset information is received, the write data is programmed based on the offset information such that at least one state among a plurality of states included in a distribution of threshold voltages of memory cells in which the write data is stored is changed.

Abstract: Disclosed is an operation method of a controller which is configured to control a nonvolatile memory device. The method includes receiving cell counting data associated with selected memory cells included in the nonvolatile memory device from the nonvolatile memory device, adjusting operation parameters of the nonvolatile memory device based on the cell counting data, performing a valley search operation for the selected memory cells based on the adjusted operation parameters, and performing a read operation for the selected memory cells based on a result of the valley search operation.

Abstract: A storage device and an operating method thereof are provided. The storage device includes a non-volatile memory and a memory controller. The non-volatile memory includes memory blocks each including a word lines. The memory controller determines a word line strength of each of the word lines, adjusts a state count of each of the word lines based on the word line strengths, and adjust a program parameter of each of the word lines to decrease a program time variation between the word lines.

Abstract: A nonvolatile memory device including: a memory cell array, the memory cell array including a plurality of cell strings, at least one of the cell strings including a plurality of memory cells stacked in a direction perpendicular to a surface of a substrate, at least one of the memory cells is a multi-level cell storing at least three bits; and a control logic circuit configured to control a page buffer to read a fast read page of the memory cells with one read voltage and at least two normal read pages of the memory cells with the same number of read voltages.

Abstract: A nonvolatile memory device including: a memory cell array, the memory cell array including a plurality of cell strings, at least one of the cell strings including a plurality of memory cells stacked in a direction perpendicular to a surface of a substrate, at least one of the memory cells is a multi-level cell storing at least three bits; and a control logic circuit configured to control a page buffer to read a fast read page of the memory cells with one read voltage and at least two normal read pages of the memory cells with the same number of read voltages.

Abstract: A storage device and an operating method thereof are provided. The storage device includes a non-volatile memory and a memory controller. The non-volatile memory includes memory blocks each including a word lines. The memory controller determines a word line strength of each of the word lines, adjusts a state count of each of the word lines based on the word line strengths, and adjust a program parameter of each of the word lines to decrease a program time variation between the word lines.

Abstract: A storage device includes a nonvolatile memory device including a memory block and a memory controller. The memory block includes a first memory region connected with a first word line and a second memory region connected with a second word line. The memory controller sets a read block voltage based on a first read voltage of the first memory region. The memory controller determines a second read voltage of the second memory region based on variation information and the read block voltage.

Abstract: An operation method of a storage controller which includes a nonvolatile memory device, the method including: collecting a first parameter indicating a degradation factor of a first memory area of the nonvolatile memory device and a second parameter indicating a degree of degradation occurring at the first memory area, in an initial driving period; selecting a first function model of a plurality of function models based on the first parameter and the second parameter and predicting a first error tendency of the first memory area based on the first function model; determining a first reliability interval based on the first error tendency; and performing a first reliability operation on the first memory area of the nonvolatile memory device based on the first reliability interval.