Patents by Inventor Hehe HU

Hehe HU has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220344517
    Abstract: A thin film transistor includes a gate electrode, an active layer, a gate insulating layer located between the gate electrode and the active layer, and a source electrode and a drain electrode electrically connected to the active layer. The active layer includes a channel layer and at least one channel protection layer; a material of each of the channel layer and the at least one channel protection layer is a metal oxide semiconductor material. The at least one channel protection layer is a crystallizing layer, and metal elements of the at least one channel protection layer include non-rare earth metal elements including In, Ga, Zn and Sn.
    Type: Application
    Filed: April 30, 2021
    Publication date: October 27, 2022
    Applicant: BOE Technology Group Co., Ltd.
    Inventors: Jie Huang, Zhengliang Li, Ce Ning, Hehe Hu, Nianqi Yao, Kun Zhao, Fengjuan Liu, Tianmin Zhou, Liping Lei
  • Publication number: 20220344480
    Abstract: The present disclosure provides a thin film transistor, a GOA circuit and an array substrate, the thin film transistor including a source electrode, including a source electrode wiring and a plurality of source electrode branches; a drain electrode, including a drain electrode wiring and a plurality of drain electrode branches; a gate; a semiconductor layer including a plurality of semiconductor branches; a plurality of source electrode branches. The plurality of drain electrode branches are in contact with the plurality of semiconductor branches and are divided into a plurality of cells; the source electrode wiring and the drain electrode wiring are arranged in a parallel and spaced apart, and the number m of one of the source electrode wiring and the drain electrode wiring is an integer greater than or equal to 2, and the number n of the other is an integer greater than or equal to 1.
    Type: Application
    Filed: May 19, 2021
    Publication date: October 27, 2022
    Applicant: BOE Technology Group Co., Ltd.
    Inventors: Lizhong Wang, Ce Ning, Hehe Hu, Tianmin Zhou, Jipeng Song
  • Publication number: 20220278162
    Abstract: An array substrate includes a substrate, the array substrate includes a display region and a detection region. And the detection region includes a thin film transistor located on the substrate and a photodiode located on one side of the thin film transistor away from the substrate, and the array substrate further includes a first inorganic protective layer, an organic protective layer and a second inorganic protective layer located between the thin film transistor and the photodiode. And the first inorganic protective layer, the organic protective layer and the second inorganic protective layer are stacked in sequence in a direction away from the substrate, and an orthographic projection of the photodiode on the substrate is within the range of the orthographic projection of the organic protective layer on the substrate.
    Type: Application
    Filed: August 24, 2021
    Publication date: September 1, 2022
    Inventors: Jiayu HE, Ce NING, Zhengliang LI, Hehe HU, Jie HUANG, Nianqi YAO, Kun ZHAO
  • Publication number: 20220223745
    Abstract: A thin film transistor, a manufacturing method thereof, a display substrate, and a display device are provided. The thin film transistor includes: a substrate, an active layer, a gate, a source and a drain. The active layer is arranged on the substrate and formed as a grid, including silicon nanowires extending along a first direction, the active layer includes source and drain regions oppositely arranged along the first direction, and a channel region located therebetween. The gate is arranged on the substrate, and an orthographic projection of the gate onto the substrate overlaps with orthographic projections for silicon nanowires in the channel region onto the substrate. The source and drain are arranged on the substrate, the source contacts silicon nanowires in the source region, and the drain contacts silicon nanowires in the drain region.
    Type: Application
    Filed: May 18, 2021
    Publication date: July 14, 2022
    Inventors: Jiayu HE, Ce NING, Zhengliang LI, Hehe HU, Jie HUANG, Nianqi YAO, Zhi WANG, Feng GUAN
  • Patent number: 11372451
    Abstract: A display substrate, a display device, and a method of forming a display substrate are provided. The display substrate includes: a flexible base substrate and a plurality of pixel islands arranged on the flexible base substrate, where the plurality of pixel islands are arranged in an array, two adjacent pixel islands are connected through an island bridge, display units are arranged on the pixel islands, the display units on the pixel islands are electrically connected through an inter-island connection line arranged on the island bridge, a region outside the pixel islands and the island bridge is a hollow area, and axes of four island bridges around the hollow area are arranged as a parallelogram.
    Type: Grant
    Filed: June 12, 2020
    Date of Patent: June 28, 2022
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Jiayu He, Xue Liu, Hehe Hu, Zhengliang Li
  • Publication number: 20220186359
    Abstract: A fixture, a tray and a sputtering system. The fixture is internally provided with a support structure and a clamping structure connected with each other, wherein the clamping structure is configured to clamp a to-be-sputtered substrate; an orthographic projection of the clamping structure on a plane where the support structure is located and the support structure share an superimposed area and are separate in non-superimposed areas; wherein the support structure located in the non-superimposed area and/or the clamping structure located in the non-superimposed area has a first hollowed structure. The fixture is internally provided with the first hollowed structure, such that a part of an area of the to-be-sputtered substrate covered by the fixture may be exposed via the first hollowed structure when the fixture holds the to-be-sputtered substrate, so as to reduce the area of the to-be-sputtered substrate covered by the fixture.
    Type: Application
    Filed: September 24, 2021
    Publication date: June 16, 2022
    Inventors: Nianqi YAO, Ce NING, Zhengliang LI, Hehe HU, Dapeng XUE, Lizhong WANG, Shuilang DONG, Jie HUANG, Jiayu HE, Lubin SHI, Yancai LI
  • Patent number: 11360357
    Abstract: A display substrate and a manufacturing method thereof and a display device are disclosed. The manufacturing method of the display substrate includes: forming a first display electrode; and forming a thin film transistor, which includes forming a semiconductor layer; The first display electrode and the semiconductor layer are in one same layer, and a step of forming the first display electrode is performed before performing a step of forming the semiconductor layer.
    Type: Grant
    Filed: January 3, 2019
    Date of Patent: June 14, 2022
    Assignees: BEIJING BOE DISPLAY TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Wenjun Xiao, Shijun Wang, Hehe Hu, Haoliang Zheng, Xi Chen, Xiaochuan Chen, Guangcai Yuan
  • Publication number: 20220131009
    Abstract: An oxide thin film transistor includes: a gate electrode, a metal oxide active layer and a source-drain metal layer, which are on a base substrate. The metal oxide active layer includes a first metal oxide layer and a second metal oxide layer stacked on the first metal oxide layer in a direction away from the base substrate; the first metal oxide layer is a carrier transport layer; the second metal oxide layer is a carrier isolation layer; an electron transfer rate of the carrier transport layer is greater than an electron transfer rate of the carrier isolation layer. The first metal oxide layer includes a primary surface facing toward the base substrate and a primary surface away from the base substrate; the first metal oxide layer further includes a lateral surface around the primary surfaces; the second metal oxide layer covers the lateral surface of the first metal oxide layer.
    Type: Application
    Filed: June 23, 2021
    Publication date: April 28, 2022
    Inventors: Lizhong WANG, Tianmin ZHOU, Hehe HU, Xiaochun XU, Nianqi YAO, Dapeng XUE, Shuilang DONG
  • Patent number: 11289513
    Abstract: A thin film transistor and a method for fabricating the same, an array substrate and a display device are provided. The thin film transistor includes an active layer and a protective layer being provided on and in direct contact with the active layer, the protective layer is provided corresponding to a channel region of the thin film transistor; the protective layer is made of an oxygen-enriched metallic oxide insulation material which will not introduce any new element into the active layer. In the thin film transistor and the method for fabricating the same, the array substrate and the display device provided by the present disclosure, the active layer can be protected from being damaged by the etchant for forming the source/drain, and no new element will be introduced into the active layer; thus the characteristics and the stability of the thin film transistor is improved.
    Type: Grant
    Filed: January 19, 2018
    Date of Patent: March 29, 2022
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Ke Wang, Hehe Hu, Xinhong Lu
  • Patent number: 11257954
    Abstract: Provided are a thin film transistor including: a base cushion layer having a recessed portion, base insulating layer, source-drain layer and active layer. The base insulating layer is located on a side of the base cushion layer where the recessed portion is located, and has a first and second partition walls that are spaced apart, and an orthographic projection region of a gap region between the first and second partition walls onto the base cushion layer is located at a region where the recessed portion is located; and both orthographic projection regions of the first and second partition walls onto the base cushion layer partially overlap with the recessed portion region; and both the source-drain layer and the active layer are located on the side of the base insulating layer away from the base cushion layer.
    Type: Grant
    Filed: November 19, 2019
    Date of Patent: February 22, 2022
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Xiaochen Ma, Guangcai Yuan, Ce Ning, Xin Gu, Hehe Hu
  • Patent number: 11245008
    Abstract: The present application provides a TFT, a manufacturing method thereof, and a sensor. The TFT includes a substrate, and a source, a drain and an active layer on the substrate. The active layer includes a microchannel, and the thin film transistor is configured to detect a sample in the microchannel. When a sample to be detected enters the microchannel, the electron distribution in the active layer would be affected, which causes fluctuations in the TFT characteristics. By detecting such fluctuations, detecting the composition and property of the liquid to be detected may be achieved. Moreover, by virtue of the microchannel, the sample may be precisely controlled. The impact of the external environment may be reduced and the detection accuracy can be enhanced. Continuous monitoring instead of one-time detection of the sample may be achieved and the sample detection efficiency may be improved.
    Type: Grant
    Filed: July 24, 2019
    Date of Patent: February 8, 2022
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Xiaochen Ma, Guangcai Yuan, Ce Ning, Hehe Hu, Xin Gu
  • Patent number: 11219894
    Abstract: A microfluidic channel structure and a fabrication method thereof, a microfluidic detecting device and a detecting method thereof are disclosed. The microfluidic channel structure includes a support portion; a foundation portion, provided on the support portion and including a first foundation and a second foundation spaced apart from each other; and a channel defining portion, provided on a side of the foundation portion that is away from the support portion and including a first channel layer and a second channel layer, the first channel layer covering the first foundation and the second channel layer covering the second foundation have a gap therebetween to define a microfluidic channel; and the first channel layer and the second channel layer are made of a same material.
    Type: Grant
    Filed: September 24, 2019
    Date of Patent: January 11, 2022
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Xiaochen Ma, Guangcai Yuan, Ce Ning, Xin Gu, Hehe Hu
  • Publication number: 20210359063
    Abstract: An array substrate includes a base substrate; a first thin film transistor on the base substrate and including a first active layer, a first gate electrode, a first source electrode and a first drain electrode; a second thin film transistor on the base substrate and including a second active layer, a second gate electrode, a second source electrode and a second drain electrode; a first gate insulating layer between the first active layer and the first gate electrode; and a second gate insulating layer between the second active layer and the second gate electrode, the second gate insulating layer being different from the first gate insulating layer. The first source electrode, the first drain electrode, and the second gate electrode are in a same layer. The first source electrode and the first drain electrode are on a side of the second gate insulating layer distal to the base substrate.
    Type: Application
    Filed: September 11, 2018
    Publication date: November 18, 2021
    Applicant: BOE Technology Group Co., Ltd.
    Inventors: Xinhong Lu, Ke Wang, Hehe Hu, Ce Ning, Wei Yang
  • Publication number: 20210331168
    Abstract: A biosensor apparatus is provided. The biosensor apparatus includes a base substrate; a first fluid channel layer on the base substrate and having a first fluid channel passing therethrough; a foundation layer on a side of the first fluid channel layer away from the base substrate, a foundation layer throughhole extending through the foundation layer to connect to the first fluid channel; and a micropore layer on a side of the foundation layer away from the base substrate, a micropore extending through the micropore layer to connect to the first fluid channel through the foundation layer throughhole. The micropore layer extends into the foundation layer throughhole and at least partially covers an inner wall of the foundation layer throughhole.
    Type: Application
    Filed: May 6, 2019
    Publication date: October 28, 2021
    Applicant: BOE Technology Group Co., Ltd.
    Inventors: Xiaochen Ma, Guangcai Yuan, Ce Ning, Xin Gu, Hehe Hu
  • Patent number: 11133363
    Abstract: The present discloses an array substrate and a manufacturing method thereof, and a display device. The array substrate includes a first transistor and a second transistor. The first transistor includes a first active layer, a first gate, a first source and a first drain. The second transistor includes a second active layer, a second gate, a second source and a second drain. An orthographic projection of the second source on the base substrate and an orthographic projection of the second drain on the base substrate at least partially overlap. One of the second source and the second drain is in the same layer as and made from the same material as the first gate. The first source and the first drain are in the same layer as and made from the same material as the other of the second source and the second drain.
    Type: Grant
    Filed: August 30, 2019
    Date of Patent: September 28, 2021
    Assignee: BOE Technology Group Co., Ltd.
    Inventors: Ke Wang, Xinhong Lu, Hehe Hu, Wei Yang, Ce Ning
  • Patent number: 11092866
    Abstract: The present disclosure provides a display panel and a manufacturing method thereof, a driving method and a display device. The display panel includes: a base substrate and a thin film transistor on a surface of the base substrate. The thin film transistor includes: a gate, and a source and a drain arranged along a first direction, and a first passivation layer covering the gate, the source and the drain. a space region in which liquid crystal molecules are filled is formed in the first passivation layer. The space region is between the source and the drain. The source and the drain are configured to control rotation of the liquid crystal molecules.
    Type: Grant
    Filed: July 18, 2019
    Date of Patent: August 17, 2021
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Hehe Hu, Xiaochen Ma, Guangcai Yuan, Ce Ning, Xin Gu
  • Publication number: 20210226064
    Abstract: Provided are a thin film transistor including: a base cushion layer having a recessed portion, base insulating layer, source-drain layer and active layer. The base insulating layer is located on a side of the base cushion layer where the recessed portion is located, and has a first and second partition walls that are spaced apart, and an orthographic projection region of a gap region between the first and second partition walls onto the base cushion layer is located at a region where the recessed portion is located; and both orthographic projection regions of the first and second partition walls onto the base cushion layer partially overlap with the recessed portion region; and both the source-drain layer and the active layer are located on the side of the base insulating layer away from the base cushion layer.
    Type: Application
    Filed: November 19, 2019
    Publication date: July 22, 2021
    Inventors: Xiaochen Ma, Guangcai Yuan, Ce Ning, Xin Gu, Hehe Hu
  • Publication number: 20210220824
    Abstract: The present disclosure relates to a micro-channel device. The micro-channel device may include a micro-channel structure and a semiconductor junction. The micro-channel structure may include a base layer, a plurality of rails distributed on the base layer at intervals, and a cover layer comprising a plurality of columns. The cover layer and the base layer are configured to form a plurality of micro-channels. The semiconductor junction may include a P-type semiconductor layer, an intrinsic semiconductor layer and a N-type semiconductor layer stacked in a first direction.
    Type: Application
    Filed: April 16, 2019
    Publication date: July 22, 2021
    Applicant: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Ce Ning, Xiaochen Ma, Hehe Hu, Guangcai Yuan, Xin Gu
  • Publication number: 20210217784
    Abstract: An array substrate, a method for manufacturing an array substrate, and a display panel are provided. The array substrate includes: a base substrate; a thin film transistor on the base substrate; and a PIN diode on a side of the thin film transistor away from the base substrate, in a direction running away the base substrate from the thin film transistor, the PIN diode including a first electrical conduction type semiconductor layer and an intrinsic semiconductor layer and a second electrical conduction type semiconductor layer stacked in sequence, wherein a material from which the first electrical conduction type semiconductor layer is made includes one or more of following materials: metal oxide, metal sulfide, metal selenide, metal nitride, metal phosphide, or metal arsenide.
    Type: Application
    Filed: November 21, 2019
    Publication date: July 15, 2021
    Applicant: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Zhengliang Li, Jiayu He, Hehe Hu, Wenlin Zhang, Song Liu, Xiaochen Ma, Nianqi Yao, Jie Huang
  • Publication number: 20210210516
    Abstract: A thin film transistor and a method for fabricating the same, an array substrate and a display device are provided. The thin film transistor includes an active layer and a protective layer being provided on and in direct contact with the active layer, the protective layer is provided corresponding to a channel region of the thin film transistor; the protective layer is made of an oxygen-enriched metallic oxide insulation material which will not introduce any new element into the active layer. In the thin film transistor and the method for fabricating the same, the array substrate and the display device provided by the present disclosure, the active layer can be protected from being damaged by the etchant for forming the source/drain, and no new element will be introduced into the active layer; thus the characteristics and the stability of the thin film transistor is improved.
    Type: Application
    Filed: January 19, 2018
    Publication date: July 8, 2021
    Inventors: Ke WANG, Hehe HU, Xinhong LU