Patents by Inventor Heinz Schmid

Heinz Schmid has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10840093
    Abstract: A method for fabricating a semiconductor substrate comprises providing a crystalline base substrate, forming an insulating layer on the crystalline base substrate and forming a trench in the insulating layer. This exposes a seed surface of the base substrate. The trench has sidewalls and a bottom. The bottom corresponds to the seed surface of the base substrate. The method further comprises growing, at a first growth step, an elongated seed structure in the trench from the seed surface of the substrate and forming a cavity structure above the insulating layer. The cavity structure covers the elongated seed structure and extends laterally to the elongated seed structure. The method comprises a further step of growing, at a second growth step, the semiconductor substrate in the cavity structure from the elongated seed structure. The invention is notably also directed to corresponding semiconductor structures and corresponding semiconductor substrates.
    Type: Grant
    Filed: September 11, 2018
    Date of Patent: November 17, 2020
    Assignee: International Business Machines Corporation
    Inventors: Yannick Baumgartner, Lukas Czornomaz, Heinz Schmid, Philipp Staudinger
  • Publication number: 20200280238
    Abstract: An electric motor and inverter assembly (100) used in an electric vehicle or a hybrid electric vehicle to drive the vehicle's wheels to rotate is disclosed. The electric motor and inverter assembly comprises: an electric motor (300), which includes a housing including a main shell (310), an end cover (320) and a connecting cover (330), wherein a cooling passage is formed in a wall of the housing such that coolant is able to flow in the cooling passage, and an end cover (320) and a connecting cover (330) are respectively connected to opposite ends of the main shell; and an inverter, which includes a housing (210) in which a power element and/or an electrical device is received, wherein the housing of the inverter contacts the connecting cover such that an interface is defined between the connecting cover and the housing of the inverter, and the coolant flowing through the cooling passage is able to contact the interface.
    Type: Application
    Filed: September 18, 2017
    Publication date: September 3, 2020
    Inventors: Tao Zhu, Yanlin Li, Xinhua Liu, Takashi Shigematsu, Heinz-Bernd Haiser, Peter Ropertz, Ralf Schmid, Shi Deng
  • Patent number: 10727051
    Abstract: Methods are provided for fabricating semiconductor nanowires on a substrate. A nanowire template is formed on the substrate. The nanowire template defines an elongate tunnel which extends, laterally over the substrate, between an opening in the template and a seed surface. The seed surface is exposed to the tunnel and of an area up to about 2×104 nm2. The semiconductor nanowire is selectively grown, via said opening, in the template from the seed surface. The area of the seed surface is preferably such that growth of the nanowire proceeds from a single nucleation point on the seed surface. There is also provided a method for fabricating a plurality of semiconductor nanowires on a substrate and a semiconductor nanowire and substrate structure.
    Type: Grant
    Filed: December 6, 2018
    Date of Patent: July 28, 2020
    Assignee: ELPIS TECHNOLOGIES INC.
    Inventors: Mattias Bengt Borg, Kirsten Emilie Moselund, Heike E. Riel, Heinz Schmid
  • Patent number: 10679942
    Abstract: An electrical junction comprising a first pair of leads and a second pair of leads. The first pair of leads and the second pair of leads comprise a Weyl semimetal. The junction comprises an electrical crossing arranged between the leads of the first pair and the leads of the second pair and is configured to provide an electrical connection between the leads of the first pair and the leads of the second pair. A related electrical device and a related neural network may be also presented.
    Type: Grant
    Filed: March 15, 2018
    Date of Patent: June 9, 2020
    Assignee: International Business Machines Corporation
    Inventors: Heinz Schmid, Bernd Gotsmann
  • Patent number: 10671907
    Abstract: An electrical junction comprising a first pair of leads and a second pair of leads. The first pair of leads and the second pair of leads comprise a Weyl semimetal. The junction comprises an electrical crossing arranged between the leads of the first pair and the leads of the second pair and is configured to provide an electrical connection between the leads of the first pair and the leads of the second pair. A related electrical device and a related neural network may be also presented.
    Type: Grant
    Filed: September 30, 2019
    Date of Patent: June 2, 2020
    Assignee: International Business Machines Corporation
    Inventors: Heinz Schmid, Bernd Gotsmann
  • Publication number: 20200083042
    Abstract: A method for fabricating a semiconductor substrate comprises providing a crystalline base substrate, forming an insulating layer on the crystalline base substrate and forming a trench in the insulating layer. This exposes a seed surface of the base substrate. The trench has sidewalls and a bottom. The bottom corresponds to the seed surface of the base substrate. The method further comprises growing, at a first growth step, an elongated seed structure in the trench from the seed surface of the substrate and forming a cavity structure above the insulating layer. The cavity structure covers the elongated seed structure and extends laterally to the elongated seed structure. The method comprises a further step of growing, at a second growth step, the semiconductor substrate in the cavity structure from the elongated seed structure. The invention is notably also directed to corresponding semiconductor structures and corresponding semiconductor substrates.
    Type: Application
    Filed: September 11, 2018
    Publication date: March 12, 2020
    Inventors: Yannick Baumgartner, Lukas Czornomaz, Heinz Schmid, Philipp Staudinger
  • Publication number: 20200083667
    Abstract: A plasmonic quantum well laser may be provided. The plasmonic quantum well laser includes a plasmonic waveguide and a p-n junction structure extends orthogonally to a direction of plasmon propagation along the plasmonic waveguide. Thereby, the p-n junction is positioned atop a dielectric material having a lower refractive index than material building the p-n junction, and the quantum well laser is electrically actuated. A method for building the plasmonic quantum well laser is also provided.
    Type: Application
    Filed: November 14, 2019
    Publication date: March 12, 2020
    Inventors: Heinz Schmid, Benedikt F. Mayer, Stephan Wirths, Kirsten Emilie Moselund
  • Patent number: 10566764
    Abstract: A plasmonic quantum well laser may be provided. The plasmonic quantum well laser includes a plasmonic waveguide and a p-n junction structure extends orthogonally to a direction of plasmon propagation along the plasmonic waveguide. Thereby, the p-n junction is positioned atop a dielectric material having a lower refractive index than material building the p-n junction, and the quantum well laser is electrically actuated. A method for building the plasmonic quantum well laser is also provided.
    Type: Grant
    Filed: June 18, 2018
    Date of Patent: February 18, 2020
    Assignee: International Business Machines Corporation
    Inventors: Heinz Schmid, Benedikt F. Mayer, Stephan Wirths, Kirsten Emilie Moselund
  • Patent number: 10559657
    Abstract: Methods are provided for fabricating a semiconductor junction. A first semiconductor structure is selectively grown in a nanotube, which extends laterally over a substrate, from a seed extending within the nanotube. The seed is removed to expose the first semiconductor structure and create a cavity in the nanotube. A second semiconductor structure is selectively grown in the cavity from the first semiconductor structure, thereby forming a semiconductor junction between the first and second structures.
    Type: Grant
    Filed: May 3, 2018
    Date of Patent: February 11, 2020
    Assignee: International Business Machines Corporation
    Inventors: Mattias Borg, Kirsten Moselund, Heinz Schmid, Heike Riel
  • Publication number: 20200035609
    Abstract: An electrical junction comprising a first pair of leads and a second pair of leads. The first pair of leads and the second pair of leads comprise a Weyl semimetal. The junction comprises an electrical crossing arranged between the leads of the first pair and the leads of the second pair and is configured to provide an electrical connection between the leads of the first pair and the leads of the second pair. A related electrical device and a related neural network may be also presented.
    Type: Application
    Filed: September 30, 2019
    Publication date: January 30, 2020
    Inventors: Heinz Schmid, Bernd Gotsmann
  • Patent number: 10529771
    Abstract: A method of fabrication of an array of optoelectronic structures includes first providing a crystalline substrate having cells corresponding to individual optoelectronic structures to be obtained. Each of the cells includes an opening to the substrate. Then, several first layer portions of a first compound semiconductor material are grown in each the opening to at least partly fill a respective one of the cells and form an essentially planar film portion therein. Next, several second layer portions of a second compound semiconductor material are grown over the first layer portions that coalesce to form a coalescent film extending over the first layer portions. Finally, excess portions of materials are removed, to obtain the array of optoelectronic structures. Each optoelectronic structure comprises a stack protruding from the substrate of: a residual portion of one of the second layer portions; and a residual portion of one of the first layer portions.
    Type: Grant
    Filed: February 27, 2018
    Date of Patent: January 7, 2020
    Assignee: International Business Machines Corporation
    Inventors: Mattias B. Borg, Lukas Czornomaz, Veeresh V. Deshpande, Vladimir Djara, Heike E. Riel, Heinz Schmid
  • Publication number: 20190386453
    Abstract: A plasmonic quantum well laser may be provided. The plasmonic quantum well laser includes a plasmonic waveguide and a p-n junction structure extends orthogonally to a direction of plasmon propagation along the plasmonic waveguide. Thereby, the p-n junction is positioned atop a dielectric material having a lower refractive index than material building the p-n junction, and the quantum well laser is electrically actuated. A method for building the plasmonic quantum well laser is also provided.
    Type: Application
    Filed: June 18, 2018
    Publication date: December 19, 2019
    Inventors: Heinz Schmid, Benedikt F. Mayer, Stephan Wirths, Kirsten Emilie Moselund
  • Publication number: 20190287912
    Abstract: An electrical junction comprising a first pair of leads and a second pair of leads. The first pair of leads and the second pair of leads comprise a Weyl semimetal. The junction comprises an electrical crossing arranged between the leads of the first pair and the leads of the second pair and is configured to provide an electrical connection between the leads of the first pair and the leads of the second pair. A related electrical device and a related neural network may be also presented.
    Type: Application
    Filed: March 15, 2018
    Publication date: September 19, 2019
    Inventors: Heinz Schmid, Bernd Gotsmann
  • Patent number: 10411092
    Abstract: A method comprises providing a cavity structure on the substrate comprising a first growth channel extending in a first direction, a second growth channel extending in a second direction, wherein the second direction is different from the first direction and the second channel is connected to the first channel at a channel junction, a first seed surface in the first channel, at least one opening for supplying precursor materials to the cavity structure, selectively growing from the first seed surface a first semiconductor structure substantially only in the first direction and in the first channel, thereby forming a second seed surface for a second semiconductor structure at the channel junction, growing in the second channel the second semiconductor structure in the second direction from the second seed surface, thereby forming the semiconductor junction comprising the first and the second semiconductor structure.
    Type: Grant
    Filed: February 28, 2017
    Date of Patent: September 10, 2019
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Mattias B. Borg, Kirsten E. Moselund, Heike E. Riel, Heinz Schmid
  • Patent number: 10297739
    Abstract: A braiding element and a method for operating the braiding device, a structure of braiding devices as well as an array of braiding devices for controlling parafermions for quantum computing may be provided. The braiding device comprises a first wire layer and a second wire layer, a superconductor layer arranged in vertical sandwich-style between the first and the second wire layer such that a device structure is built and a plurality cascades of gate electrodes such that one of the plurality of cascades of gate electrodes is arranged at the first quantum wire layer and at the second quantum wire layer of each of the three legs.
    Type: Grant
    Filed: March 7, 2018
    Date of Patent: May 21, 2019
    Assignee: International Business Machines Corporation
    Inventors: Johannes Gooth, Heinz Schmid
  • Publication number: 20190109003
    Abstract: Methods are provided for fabricating semiconductor nanowires on a substrate. A nanowire template is formed on the substrate. The nanowire template defines an elongate tunnel which extends, laterally over the substrate, between an opening in the template and a seed surface. The seed surface is exposed to the tunnel and of an area up to about 2×104 nm2. The semiconductor nanowire is selectively grown, via said opening, in the template from the seed surface. The area of the seed surface is preferably such that growth of the nanowire proceeds from a single nucleation point on the seed surface. There is also provided a method for fabricating a plurality of semiconductor nanowires on a substrate and a semiconductor nanowire and substrate structure.
    Type: Application
    Filed: December 6, 2018
    Publication date: April 11, 2019
    Inventors: MATTIAS BENGT BORG, KIRSTEN EMILIE MOSELUND, HEIKE E. REIL, HEINZ SCHMID
  • Patent number: 10153158
    Abstract: Methods are provided for fabricating semiconductor nanowires on a substrate. A nanowire template is formed on the substrate. The nanowire template defines an elongate tunnel which extends, laterally over the substrate, between an opening in the template and a seed surface. The seed surface is exposed to the tunnel and of an area up to about 2×104 nm2. The semiconductor nanowire is selectively grown, via said opening, in the template from the seed surface. The area of the seed surface is preferably such that growth of the nanowire proceeds from a single nucleation point on the seed surface. There is also provided a method for fabricating a plurality of semiconductor nanowires on a substrate and a semiconductor nanowire and substrate structure.
    Type: Grant
    Filed: December 8, 2014
    Date of Patent: December 11, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Mattias Bengt Borg, Kirsten Emilie Moselund, Heike E. Riel, Heinz Schmid
  • Publication number: 20180254319
    Abstract: Methods are provided for fabricating a semiconductor junction. A first semiconductor structure is selectively grown in a nanotube, which extends laterally over a substrate, from a seed extending within the nanotube. The seed is removed to expose the first semiconductor structure and create a cavity in the nanotube. A second semiconductor structure is selectively grown in the cavity from the first semiconductor structure, thereby forming a semiconductor junction between the first and second structures.
    Type: Application
    Filed: May 3, 2018
    Publication date: September 6, 2018
    Inventors: Mattias Borg, Kirsten Moselund, Heinz Schmid, Heike Riel
  • Patent number: 10066312
    Abstract: A method for producing a mono-crystalline sheet includes providing at least two aperture elements forming a gap in between; providing a molten alloy including silicon in the gap; providing a gaseous precursor medium comprising silicon in the vicinity of the molten alloy; providing a silicon nucleation crystal in the vicinity of the molten alloy; and bringing in contact said silicon nucleation crystal and the molten alloy. A device for producing a mono-crystalline sheet includes at least two aperture elements at a predetermined distance from each other, thereby forming a gap, and being adapted to be heated for holding a molten alloy including silicon by surface tension in the gap between the aperture elements; a precursor gas supply supplies a gaseous precursor medium comprising silicon in the vicinity of the molten alloy; and a positioning device for holding and moving a nucleation crystal in the vicinity of the molten alloy.
    Type: Grant
    Filed: September 12, 2016
    Date of Patent: September 4, 2018
    Assignee: International Business Machines Corporation
    Inventors: Mikael T. Bjoerk, Heike E. Riel, Heinz Schmid
  • Publication number: 20180190693
    Abstract: A method of fabrication of an array of optoelectronic structures includes first providing a crystalline substrate having cells corresponding to individual optoelectronic structures to be obtained. Each of the cells includes an opening to the substrate. Then, several first layer portions of a first compound semiconductor material are grown in each the opening to at least partly fill a respective one of the cells and form an essentially planar film portion therein. Next, several second layer portions of a second compound semiconductor material are grown over the first layer portions that coalesce to form a coalescent film extending over the first layer portions. Finally, excess portions of materials are removed, to obtain the array of optoelectronic structures. Each optoelectronic structure comprises a stack protruding from the substrate of: a residual portion of one of the second layer portions; and a residual portion of one of the first layer portions.
    Type: Application
    Filed: February 27, 2018
    Publication date: July 5, 2018
    Inventors: Mattias B. Borg, Lukas Czornomaz, Veeresh V. Deshpande, Vladimir Djara, Heike E. Riel, Heinz Schmid