Patents by Inventor Helen M. Dauplaise

Helen M. Dauplaise has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6380097
    Abstract: An aqueous thiourea-ammonia treatment is used to form a thin sulfurous film at the indium phosphide surface, having a thickness of less than one nanometer. The thiourea-ammonium hydroxide treatment can be used as is or immediately prior to deposition of cadmium sulfide for enhanced surface passivation. The thiourea-ammonium hydroxide treatment is entirely compatible with chemical bath deposition, molecular beam epitaxy, or metalorganic chemical vapor deposition of the cadmium sulfide.
    Type: Grant
    Filed: May 11, 1998
    Date of Patent: April 30, 2002
    Assignee: The United States of America as represented by the Secretary of the Air Force
    Inventors: Helen M. Dauplaise, Andrew Davis, Kenneth Vaccaro, Joseph P. Lorenzo
  • Patent number: 6049099
    Abstract: A novel indium phosphide (InP) based heterojunction bipolar transistor (HBT) is described. A II-VI compound, cadmium sulfide (CdS), is used as the emitter to improve the emitter injection efficiency and reduce recombination losses. The cadmium sulfide emitter is applied following the epitaxial growth of III-V compound collector and base regions. The large valence band discontinuity (.quadrature.E=0.75 eV) between CdS and InP allows InP to be used for both the base and collector material. Prior to cadmium sulfide deposition, the exposed surfaces of the epitaxial layers can be passivated with sulfur, further reducing the recombination losses.
    Type: Grant
    Filed: May 11, 1998
    Date of Patent: April 11, 2000
    Assignee: The United States of America as represented by the Secretary of the Air Force
    Inventors: Kenneth Vaccaro, Helen M. Dauplaise, Andrew Davis, Joseph P. Lorenzo
  • Patent number: 5689125
    Abstract: In a Schottky metal junction semiconductor device, a CdS interface layer, having a thickness of under 100 angstroms, is positioned under the Schottky barrier gate of a III-V HEMT, for reducing gate leakage, and for enabling full depletion of the conducting channel. A similar layer is positioned under the insulator of an MIS device having an InP substrate. The CdS layers are deposited from a chemical bath which merely entails a simple, safe and readily controllable additional step in the otherwise conventional manufacturing process of these devices.
    Type: Grant
    Filed: June 12, 1995
    Date of Patent: November 18, 1997
    Assignee: The United States of America as represented by the Secretary of the Air Force
    Inventors: Kenneth Vaccaro, Andrew Davis, Helen M. Dauplaise, Joseph P. Lorenzo