Abstract: A semiconductor module. One embodiment provides at least two semiconductor chips placed on a carrier. The at least two semiconductor chips are then covered with a molding material to form a molded body. The molded body is thinned until the at least two semiconductor chips are exposed. Then, the carrier is removed from the at least two semiconductor chips. The at least two semiconductor chips are singulated.

Abstract: A semiconductor module. In one embodiment, at least two semiconductor chips are placed on a carrier. The at least two semiconductor chips are then covered with a molding material. An exposed portion of the at least two semiconductor chips is provided. A first layer of conductive material is applied over the exposed portion of the at least two semiconductor chips to electrically connect to a contact pad on the exposed portion of the at least two semiconductor chips. The at least two semiconductor chips are singulated.

Abstract: The present invention relates to a metal-semiconductor contact comprising a semiconductor layer and comprising a metallization applied to the semiconductor layer, a high dopant concentration being introduced into the semiconductor layer such that a non-reactive metal-semiconductor contact is formed between the metallization and the semiconductor layer. The metallization and/or the semiconductor layer are formed in such a way that only a fraction of the introduced doping concentration is electrically active, and a semiconductor layer doped only with this fraction of the doping concentration only forms a Schottky contact when contact is made with the metallization. Furthermore, the invention relates to a semiconductor component comprising a drain zone, body zones embedded therein and source zones again embedded therein. The semiconductor component has metal-semiconductor contacts in which the contacts made contact only with the source zones but not with the body zones.

Abstract: A semiconductor component (1) with charge compensation structure (3) has a semiconductor body (4) having a drift path (5) between two electrodes (6, 7). The drift path (5) has drift zones of a first conduction type, which provide a current path between the electrodes (6, 7) in the drift path, while charge compensation zones (11) of a complementary conduction type constrict the current path of the drift path (5). For this purpose, the drift path (5) has two alternately arranged, epitaxially grown diffusion zone types (9, 10), the first drift zone type (9) having monocrystalline semiconductor material on a monocrystalline substrate (12), and a second drift zone type (10) having monocrystalline semiconductor material in a trench structure (13), with complementarily doped walls (14, 15), the complementarily doped walls (14, 15) forming the charge compensation zones (11).

Abstract: A semiconductor device includes a semiconductor material, the semiconductor material including a base region and a field stop zone including a first side adjacent the base region and a second side opposite the first side. The field stop zone includes a first dopant implant and a second dopant implant. The first dopant implant has a first dopant concentration maximum and the second dopant implant has a second dopant concentration maximum with the first dopant concentration maximum being less than the second dopant concentration maximum, and being located closer to the second side than the second dopant concentration maximum.

Abstract: A semiconductor component with charge compensation structure has a semiconductor body having a drift path between two electrodes. The drift path has drift zones of a first conduction type, which provide a current path between the electrodes in the drift path, while charge compensation zones of a complementary conduction type constrict the current path of the drift path. For this purpose, the drift path has two alternately arranged, epitaxially grown diffusion zone types, the first drift zone type having monocrystalline semiconductor material on a monocrystalline substrate, and a second drift zone type having monocrystalline semiconductor material in a trench structure, with complementarily doped walls, the complementarily doped walls forming the charge compensation zones.

Abstract: A wafer includes a wafer frontside and a region adjacent to the device surface, wherein the region includes vacancy-oxygen complexes and the wafer frontside includes a predetermined surface structure to form thereon a device with a desired property.

Abstract: A wafer includes a wafer frontside surface and a region adjacent to the wafer frontside surface. The region includes oxygen precipitates and the wafer frontside includes a predetermined surface structure to form thereon a device with a desired property.

Abstract: A semiconductor diode (30) has an anode (32), a cathode (33) and a semiconductor volume (31) provided between the anode (32) and the cathode (33). An electron mobility and/or hole mobility within a zone (34) of the semiconductor volume (31) that is situated in front of the cathode (33) is reduced relative to the rest of the semiconductor volume (31).

Abstract: A method for fabricating a buried metallic layer at a predetermined vertical position in a semiconductor body having a first and second side includes a step of applying a metal layer to one of the first and second sides at least in sections. The method also includes establishing a positive temperature gradient in a vertical direction of the semiconductor body proceeding from the one side. The temperature in the region of the one side is higher than the eutectic temperatures of system, so that the metal of the metal layer migrates in the vertical direction into the semiconductor body. The method also includes discontinuing the temperature gradient once the metal reaches the predetermined vertical position in the semiconductor body, in order thereby to obtain the metallic layer at the predetermined position.

Abstract: A semiconductor component with vertical structures having a high aspect ratio and method. In one embodiment, a drift zone is arranged between a first and a second component zone. A drift control zone is arranged adjacent to the drift zone in a first direction. A dielectric layer is arranged between the drift zone and the drift control zone wherein the drift zone has a varying doping and/or a varying material composition at least in sections proceeding from the dielectric.

Abstract: A panel has a baseplate with an upper first metallic layer and a multiplicity of a vertical semiconductor components. The vertical semiconductor components in each case have a first side with a first load electrode and a control electrode and an opposite second side with a second load electrode. The second side of the semiconductor components is in each case mounted on the metallic layer of the baseplate. The semiconductor components are arranged in such a way that edge sides of adjacent semiconductor components are separated from one another. A second metallic layer is arranged in separating regions between the semiconductor components.

Abstract: A semiconductor device, in which a first trench section is produced proceeding from a surface of a semiconductor body into the semiconductor body. A semiconductor layer is produced above the surface and above the first trench section. A further trench section is produced in the semiconductor layer in such a way that the first trench section and the further trench section form a continuous trench structure.

Abstract: A semiconductor wafer is provided with a wiring structure, and semiconductor chip positions arranged in rows and columns. The semiconductor wafer has at least one coating (6) as a self-supporting dimensionally stable substrate layer (4), and/or as a wiring structure composed of conductive, high-temperature-resistant material. The coating material (6) of the substrate layer (4) and/or of the wiring structure has a ternary carbide and/or a ternary nitride and/or carbon.

Abstract: A contact configuration has an ohmic contact between a metalization layer and a semiconductor body of monocrystalline semiconductor material. An amorphous semiconductor layer is formed between the metalization layer and the monocrystalline semiconductor body. The layer is formed of the same semiconductor material as the body. The contact configuration is either produced by applying amorphous semiconductor material on the semiconductor body (e.g., sputtering, vapor deposition, glow discharge) or by damage formation in the semiconductor body.

Abstract: A semiconductor device includes a semiconductor material, the semiconductor material including a base region and a field stop zone including a first side adjacent the base region and a second side opposite the first side. The field stop zone includes a first dopant implant and a second dopant implant. The first dopant implant has a first dopant concentration maximum and the second dopant implant has a second dopant concentration maximum with the first dopant concentration maximum being less than the second dopant concentration maximum, and being located closer to the second side than the second dopant concentration maximum.

Abstract: A power semiconductor device and a method for its production. The power semiconductor device has at least one power semiconductor chip, which has on its top side and on its back side large-area electrodes. The electrodes are electrically in connection with external contacts by means of connecting elements, the power semiconductor chip and the connecting elements being embedded in a plastic package. This plastic package has a number of layers of plastic, which are pressed one on top of the other and have plane-parallel upper sides. The connecting elements are arranged on at least one of the plane-parallel upper sides, between the layers of plastic pressed one on top of the other, as a patterned metal layer and are electrically in connection with the external contacts by means of contact vias through at least one of the layers of plastic.

Abstract: The invention relates to a power semiconductor component with increased robustness, in which a contact layer (13, 14) applied directly to a main surface (7, 11) of the semiconductor body (1) is composed of a metal (13) having a high melting point or of a thin aluminum layer (14), the layer thickness of which preferably lies between 1 and 5 nm. This contact layer is reinforced with a customary multilayer metallization system (15). The aluminum layer may, if appropriate, be patterned (14?).

Abstract: In a semiconductor wafer substrate (20) for power semiconductor components (1) and in a method for producing the same, the semiconductor wafer substrate (20) has a large-area, buried rear side electrode (3) in form of a layer arranged between a self-supporting wafer substrate (4) and a non-self-supporting monocrystalline silicon wafer layer (5) arranged on the rear side electrode (3). The rear side electrode (3) has a ternary carbide and/or a ternary nitride and/or carbon.

Abstract: The invention relates to a power semiconductor component (1) with charge compensation structure (3) and a method for the fabrication thereof. For this purpose, the power semiconductor component (1) has a semiconductor body (4) having a drift path (5) between two electrodes (6, 7). The drift path (5) has drift zones of a first conduction type, which provide a current path between the electrodes (6, 7) in the drift path, while charge compensation zones (11) of a complementary conduction type constrict the current path of the drift path (5). For this purpose, the drift path (5) has two alternately arranged, epitaxially grown diffusion zone types (9, 10), the first drift zone type (9) having monocrystalline semiconductor material on a monocrystalline substrate (12), and a second drift zone type (10) having monocrystalline semiconductor material in a trench structure (13), with complementarily doped walls (14, 15), the complementarily doped walls (14, 15) forming the charge compensation zones (11).