Patents by Inventor Hendrik BOUMAN

Hendrik BOUMAN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190375628
    Abstract: The sensor package comprises a carrier (1) including electric conductors (13), an ASIC device (6) and a sensor element (7), which is integrated in the ASIC device (6). A dummy die or interposer (4) is arranged between the carrier (1) and the ASIC device (6). The dummy die or interposer (4) is fastened to the carrier (1), and the ASIC device (6) is fastened to the dummy die or interposer (4).
    Type: Application
    Filed: June 14, 2017
    Publication date: December 12, 2019
    Applicant: ams International AG
    Inventors: Willem Frederik Adrianus BESLING, Casper van der AVOORT, Coenraad Cornelis TAK, Remco Henricus Wilhelmus PIJNENBURG, Olaf WUNNICKE, Hendrik BOUMAN
  • Patent number: 10192842
    Abstract: A sensor package comprises a sensor chip bonded to an intermediate carrier, with the sensor element over an opening in the carrier. The package is for soldering to a board, during which the intermediate carrier protects the sensor part of the sensor chip.
    Type: Grant
    Filed: December 10, 2014
    Date of Patent: January 29, 2019
    Assignee: ams International AG
    Inventors: Hendrik Bouman, Roel Daamen, Coenraad Tak
  • Patent number: 9862600
    Abstract: One example discloses an chip, comprising: a substrate; a first side of a passivation layer coupled to the substrate; a device, having a device height and a cavity, wherein a first device surface is coupled to a second side of the passivation layer which is opposite to the first side of the passivation layer; and a set of structures coupled to the second side of the passivation layer and configured to have a structure height greater than or equal to the device height.
    Type: Grant
    Filed: May 21, 2015
    Date of Patent: January 9, 2018
    Assignee: AMS INTERNATIONAL AG
    Inventors: Roel Daamen, Hendrik Bouman, Kailash Vijayakumar
  • Publication number: 20160340180
    Abstract: One example discloses an chip, comprising: a substrate; a first side of a passivation layer coupled to the substrate; a device, having a device height and a cavity, wherein a first device surface is coupled to a second side of the passivation layer which is opposite to the first side of the passivation layer; and a set of structures coupled to the second side of the passivation layer and configured to have a structure height greater than or equal to the device height.
    Type: Application
    Filed: May 21, 2015
    Publication date: November 24, 2016
    Inventors: Roel Daamen, Hendrik Bouman, Kailash Vijayakumar
  • Patent number: 9385099
    Abstract: One example embodiment discloses a chip having a chip area, wherein the chip area includes: an overhang area; a rigid coupling area, having a set of rigid coupling points, located on one side of the overhang area; and a flexible coupling area, having a set of flexible coupling points, located on a side of the overhang area opposite to the a rigid coupling area. Another example embodiment discloses a method for fabricating a die interconnect, comprising: fabricating a rigid coupler area, having a set of rigid coupler points, within a chip having a chip area; defining an overhang area within the chip area and abutted to the rigid coupler area; and fabricating a flexible coupler area, having a set of flexible coupler points, within the chip area abutted to a side of the overhang area opposite to the rigid coupler area.
    Type: Grant
    Filed: March 28, 2014
    Date of Patent: July 5, 2016
    Assignee: NXP, B.V.
    Inventors: Leonardus Antonius Elisabeth van Gemert, Coenraad Cornelis Tak, Marten Oldsen, Hendrik Bouman
  • Publication number: 20150279803
    Abstract: One example embodiment discloses a chip having a chip area, wherein the chip area includes: an overhang area; a rigid coupling area, having a set of rigid coupling points, located on one side of the overhang area; and a flexible coupling area, having a set of flexible coupling points, located on a side of the overhang area opposite to the a rigid coupling area. Another example embodiment discloses a method for fabricating a die interconnect, comprising: fabricating a rigid coupler area, having a set of rigid coupler points, within a chip having a chip area; defining an overhang area within the chip area and abutted to the rigid coupler area; and fabricating a flexible coupler area, having a set of flexible coupler points, within the chip area abutted to a side of the overhang area opposite to the rigid coupler area.
    Type: Application
    Filed: March 28, 2014
    Publication date: October 1, 2015
    Applicant: NXP B.V.
    Inventors: Leonardus Antonius Elisabeth van Gemert, Coenraad Cornelis Tak, Marten Oldsen, Hendrik Bouman
  • Patent number: 9070695
    Abstract: An integrated circuit package for an integrated circuit having one or more sensor elements in a sensor element area of the circuit. An encapsulation covers bond wires but leaves an opening over the sensor element area. A protection layer is provided over the integrated circuit over which the encapsulation extends, and it has a channel around the sensor element area to act as a trap for any encapsulation material which has crept into the opening area.
    Type: Grant
    Filed: September 11, 2012
    Date of Patent: June 30, 2015
    Assignee: NXP, B.V.
    Inventors: Roel Daamen, Hendrik Bouman, Coenraad Cornelis Tak
  • Publication number: 20150171042
    Abstract: A sensor package comprises a sensor chip bonded to an intermediate carrier, with the sensor element over an opening in the carrier. The package is for soldering to a board, during which the intermediate carrier protects the sensor part of the sensor chip.
    Type: Application
    Filed: December 10, 2014
    Publication date: June 18, 2015
    Inventors: Hendrik Bouman, Roel Daamen, Coenraad Tak
  • Publication number: 20130069176
    Abstract: An integrated circuit package for an integrated circuit having one or more sensor elements in a sensor element area of the circuit. An encapsulation covers bond wires but leaves an opening over the sensor element area. A protection layer is provided over the integrated circuit over which the encapsulation extends, and it has a channel around the sensor element area to act as a trap for any encapsulation material which has crept into the opening area.
    Type: Application
    Filed: September 11, 2012
    Publication date: March 21, 2013
    Applicant: NXP B.V.
    Inventors: Roel DAAMEN, Hendrik BOUMAN, Coenraad Cornelis TAK