Abstract: A method, an apparatus and/or a system of data compression through redundancy removal in an application acceleration environment is disclosed. In one aspect, a method includes generating through a fingerprint module of a redundancy removal engine associated with a first network element a hash identifier of at least one portion of data of a contiguous data block stored in a bidirectional cache memory of the redundancy removal engine associated with a first network element. The size of contiguous data block is larger than the size of the at least one portion of data of the contiguous data block for which the hash identifier is generated. The method further includes compressing a data stream through a transmission compression module of the redundancy removal engine based on the at least one a hash identifier that is indexed.

Abstract: Mechanisms for storing and searching a hierarchy of policies and associations thereof are disclosed which may be particularly useful for implementing security protocols, such as, but not limited to Internet Protocol security (IPsec). For example, a hierarchy of policies is stored in a search priority order in an associative memory, with each association of a particular policy stored higher in the search priority than its associated policy and after any other policy. Therefore, a lookup operation on the associative memory will identify a matching association, if one, else its matching policy. A match of a policy instead of an association may result in a corresponding association being added in the appropriate location. For IPsec implementations, the lookup word is typically derived from the packet, with this packet being typically processed based on the identified policy or association.

Abstract: Multiple branch operations using one or more associative memories are performed, which may be of particular use for, but is not limited to implementing security classification and access control lists. One embodiment generates a first lookup value including a first branch search level indication. A first lookup operation is performed on a set of associative memory entries based on the first lookup value to identify a first associative memory result, with each of associative memory entries including a branch level indication. The associative memory result is used to identify an adjunct memory result associated with a second branch level indication. A second lookup value is derived based on the second branch level indication. A second lookup operation is then performed on the associative memory entries based on the second lookup value to identify a second associative memory result.

Abstract: The present invention provides a solution that eliminates both the voltage-controlled oscillator (“VXCO” 105) and its associated D/A converter (120) from the timing recovery scheme, thereby significantly reducing manufacturing costs for modems, such as asymmetric digital subscriber loop (“ADSL”) modems. The present invention also enables tracking of a wider frequency offset. The present invention provides this with a novel timing recovery scheme implemented entirely in the digital domain. The present invention includes a free running clock (205) as the sampling clock for the A/D (110) and D/A (115) converters, and interpolators (210, 220, 615 and 635) to correct timing errors for both the receive and transmit samples. The desired sample can be obtained based on its timing offset and its neighboring samples.

Abstract: Mechanisms for storing and searching a hierarchy of items are disclosed which may be particularly useful for implementing security policies and security associations, such as, but not limited to Internet Protocol security (IPsec). A hierarchy of items is stored in a search priority order. Multiple element definitions and groups of elements are identified. Representations of the element definitions and elements are stored in a prioritized searchable data structure in decreasing search priority such that representations of each particular element definition is stored after representations of a set of particular elements associated with the particular element definition and before representations of lower priority element definitions and their associated elements. The element definitions may include Internet Protocol security policies and the elements may include Internet Protocol security associations. The searchable data structure may include an associative memory or a plurality of associative memory entries.

Abstract: The present invention provides a solution that eliminates both the voltage-controlled oscillator (“VXCO” 105) and its associated D/A converter (120) from the timing recovery scheme, thereby significantly reducing manufacturing costs for modems, such as asymmetric digital subscriber loop (“ADSL”) modems. The present invention also enables tracking of a wider frequency offset. The present invention provides this with a novel timing recovery scheme implemented entirely in the digital domain. The present invention includes a free running clock (205) as the sampling clock for the A/D (110) and D/A (115) converters, and interpolators (210, 220, 615 and 635) to correct timing errors for both the receive and transmit samples. The desired sample can be obtained based on its timing offset and its neighboring samples.