Patents by Inventor Hessel Sprey

Hessel Sprey has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220384197
    Abstract: The current disclosure relates to deposition of a transition metal chalcogenide barrier layer. The method of depositing a transition metal chalcogenide barrier layer comprises providing a substrate having an opening into a reaction chamber, providing a transition metal precursor in the reaction chamber in vapor phase and providing an reactive chalcogen species in the reaction chamber. The method may be a plasma-enhanced atomic layer deposition method. The disclosure further relates to an interconnect comprising a transition metal chalcogenide barrier layer.
    Type: Application
    Filed: May 25, 2022
    Publication date: December 1, 2022
    Inventors: Johanna Henrica Deijkers, Adriaan Jacobus Martinus Mackus, Ageeth Anke Bol, Wilhelmus M. M. Kessels, Hessel Sprey, Jan Willem Maes
  • Patent number: 11088002
    Abstract: The invention relates to a substrate rack and a substrate processing system for processing substrates in a reaction chamber. The substrate rack may be used for introducing a plurality of substrates in the reaction chamber. The substrate rack may have a plurality of spaced apart substrate holding provisions configured to hold the substrates in a spaced apart relationship. The rack may have an illumination system to irradiate radiation with a range from 100 to 500 nanometers onto a top surface of the substrates.
    Type: Grant
    Filed: March 29, 2018
    Date of Patent: August 10, 2021
    Assignee: ASM IP Holding B.V.
    Inventors: Dieter Pierreux, Werner Knaepen, Bert Jongbloed, Cornelis Thaddeus Herbschleb, Hessel Sprey
  • Patent number: 10699899
    Abstract: Antimony oxide thin films are deposited by atomic layer deposition using an antimony reactant and an oxygen source. Antimony reactants may include antimony halides, such as SbCl3, antimony alkylamines, and antimony alkoxides, such as Sb(OEt)3. The oxygen source may be, for example, ozone. In some embodiments the antimony oxide thin films are deposited in a batch reactor. The antimony oxide thin films may serve, for example, as etch stop layers or sacrificial layers.
    Type: Grant
    Filed: August 20, 2018
    Date of Patent: June 30, 2020
    Assignee: ASM International N.V.
    Inventors: Raija H. Matero, Linda Lindroos, Hessel Sprey, Jan Willem Maes, David de Roest, Dieter Pierreux, Kees van der Jeugd, Lucia D'Urzo, Tom E. Blomberg
  • Publication number: 20190304821
    Abstract: The invention relates to a substrate rack and a substrate processing system for processing substrates in a reaction chamber. The substrate rack may be used for introducing a plurality of substrates in the reaction chamber. The substrate rack may have a plurality of spaced apart substrate holding provisions configured to hold the substrates in a spaced apart relationship. The rack may have an illumination system to irradiate radiation with a range from 100 to 500 nanometers onto a top surface of the substrates.
    Type: Application
    Filed: March 29, 2018
    Publication date: October 3, 2019
    Inventors: Dieter Pierreux, Werner Knaepen, Bert Jongbloed, Cornelis Thaddeus Herbschleb, Hessel Sprey
  • Publication number: 20190103266
    Abstract: Antimony oxide thin films are deposited by atomic layer deposition using an antimony reactant and an oxygen source. Antimony reactants may include antimony halides, such as SbCl3, antimony alkylamines, and antimony alkoxides, such as Sb(OEt)3. The oxygen source may be, for example, ozone. In some embodiments the antimony oxide thin films are deposited in a batch reactor. The antimony oxide thin films may serve, for example, as etch stop layers or sacrificial layers.
    Type: Application
    Filed: August 20, 2018
    Publication date: April 4, 2019
    Inventors: Raija H. Matero, Linda Lindroos, Hessel Sprey, Jan Willem Maes, David de Roest, Dieter Pierreux, Kees van der Jeugd, Lucia D'Urzo, Tom E. Blomberg
  • Patent number: 10056249
    Abstract: Antimony oxide thin films are deposited by atomic layer deposition using an antimony reactant and an oxygen source. Antimony reactants may include antimony halides, such as SbCl3, antimony alkylamines, and antimony alkoxides, such as Sb(OEt)3. The oxygen source may be, for example, ozone. In some embodiments the antimony oxide thin films are deposited in a batch reactor. The antimony oxide thin films may serve, for example, as etch stop layers or sacrificial layers.
    Type: Grant
    Filed: November 22, 2016
    Date of Patent: August 21, 2018
    Assignee: ASM International N.V.
    Inventors: Raija H. Matero, Linda Lindroos, Hessel Sprey, Jan Willem Maes, David de Roest, Dieter Pierreux, Kees van der Jeugd, Lucia D'Urzo, Tom E. Blomberg
  • Publication number: 20170140918
    Abstract: Antimony oxide thin films are deposited by atomic layer deposition using an antimony reactant and an oxygen source. Antimony reactants may include antimony halides, such as SbCl3, antimony alkylamines, and antimony alkoxides, such as Sb(OEt)3. The oxygen source may be, for example, ozone. In some embodiments the antimony oxide thin films are deposited in a batch reactor. The antimony oxide thin films may serve, for example, as etch stop layers or sacrificial layers.
    Type: Application
    Filed: November 22, 2016
    Publication date: May 18, 2017
    Inventors: Raija H. Matero, Linda Lindroos, Hessel Sprey, Jan Willem Maes, David de Roest, Dieter Pierreux, Kees van der Jeugd, Lucia D'Urzo, Tom E. Blomberg
  • Patent number: 9552979
    Abstract: A process for depositing aluminum nitride is disclosed. The process comprises providing a plurality of semiconductor substrates in a batch process chamber and depositing an aluminum nitride layer on the substrates by performing a plurality of deposition cycles without exposing the substrates to plasma during the deposition cycles. Each deposition cycle comprises flowing an aluminum precursor pulse into the batch process chamber, removing the aluminum precursor from the batch process chamber, and removing the nitrogen precursor from the batch process chamber after flowing the nitrogen precursor and before flowing another pulse of the aluminum precursor. The process chamber may be a hot wall process chamber and the deposition may occur at a deposition pressure of less than 1 Torr.
    Type: Grant
    Filed: May 31, 2013
    Date of Patent: January 24, 2017
    Assignee: ASM IP HOLDING B.V.
    Inventors: Werner Knaepen, Bert Jongbloed, Dieter Pierreux, Peter Zagwijn, Hessel Sprey, Cornelius A. van der Jeugd, Marinus Josephus de Blank, Robin Roelofs, Qi Xie, Jan Willem Maes
  • Patent number: 9514934
    Abstract: Antimony oxide thin films are deposited by atomic layer deposition using an antimony reactant and an oxygen source. Antimony reactants may include antimony halides, such as SbCl3, antimony alkylamines, and antimony alkoxides, such as Sb(OEt)3. The oxygen source may be, for example, ozone. In some embodiments the antimony oxide thin films are deposited in a batch reactor. The antimony oxide thin films may serve, for example, as etch stop layers or sacrificial layers.
    Type: Grant
    Filed: March 13, 2015
    Date of Patent: December 6, 2016
    Assignee: ASM International N.V.
    Inventors: Raija H. Matero, Linda Lindroos, Hessel Sprey, Jan Willem Maes, David De Roest, Dieter Pierreux, Kees Van Der Jeugd, Lucia D'Urzo, Tom E. Blomberg
  • Publication number: 20150249005
    Abstract: Antimony oxide thin films are deposited by atomic layer deposition using an antimony reactant and an oxygen source. Antimony reactants may include antimony halides, such as SbCl3, antimony alkylamines, and antimony alkoxides, such as Sb(OEt)3. The oxygen source may be, for example, ozone. In some embodiments the antimony oxide thin films are deposited in a batch reactor. The antimony oxide thin films may serve, for example, as etch stop layers or sacrificial layers.
    Type: Application
    Filed: March 13, 2015
    Publication date: September 3, 2015
    Inventors: RAIJA H. MATERO, LINDA LINDROOS, HESSEL SPREY, JAN WILLEM MAES, DAVID DE ROEST, DIETER PIERREUX, KEES VAN DER JEUGD, LUCIA D'URZO, TOM E. BLOMBERG
  • Patent number: 9006112
    Abstract: Antimony oxide thin films are deposited by atomic layer deposition using an antimony reactant and an oxygen source. Antimony reactants may include antimony halides, such as SbCl3, antimony alkylamines, and antimony alkoxides, such as Sb(OEt)3. The oxygen source may be, for example, ozone. In some embodiments the antimony oxide thin films are deposited in a batch reactor. The antimony oxide thin films may serve, for example, as etch stop layers or sacrificial layers.
    Type: Grant
    Filed: October 11, 2012
    Date of Patent: April 14, 2015
    Assignee: ASM International N.V.
    Inventors: Raija H. Matero, Linda Lindroos, Hessel Sprey, Jan Willem Maes, David de Roest, Dieter Pierreux, Kees van der Jeugd, Lucia D'Urzo, Tom E. Blomberg
  • Publication number: 20140357090
    Abstract: A process for depositing aluminum nitride is disclosed. The process comprises providing a plurality of semiconductor substrates in a batch process chamber and depositing an aluminum nitride layer on the substrates by performing a plurality of deposition cycles without exposing the substrates to plasma during the deposition cycles. Each deposition cycle comprises flowing an aluminum precursor pulse into the batch process chamber, removing the aluminum precursor from the batch process chamber, and removing the nitrogen precursor from the batch process chamber after flowing the nitrogen precursor and before flowing another pulse of the aluminum precursor. The process chamber may be a hot wall process chamber and the deposition may occur at a deposition pressure of less than 1 Torr.
    Type: Application
    Filed: May 31, 2013
    Publication date: December 4, 2014
    Inventors: Werner Knaepen, Bert Jongbloed, Dieter Pierreux, Peter Zagwijn, Hessel Sprey, Cornelius A. van der Jeugd, Marinus Josephus de Blank, Robin Roelofs, Qi Xie, Jan Willem Maes
  • Patent number: 8652573
    Abstract: Method of depositing a film having a substantially uniform thickness by means of chemical vapor deposition, comprising: providing a reaction chamber; providing a substrate in said reaction chamber; subjecting the substrate to a series of deposition cycles, wherein each deposition cycle includes the steps of: (a) during a first time interval, supplying a first reactant to the reaction chamber; (b) during a second time interval, supplying a second reactant to the reaction chamber; and (c) during a third time interval, supplying neither the first nor the second reactant to the reaction chamber; wherein a start of the second time interval lies within the first time interval, such that a pre-exposure interval exists between a start of the first time interval and the start of the second time interval, during which pre-exposure interval the first reactant is supplied to the reaction chamber while the second reactant is not.
    Type: Grant
    Filed: July 14, 2011
    Date of Patent: February 18, 2014
    Assignee: ASM International N.V.
    Inventors: Maarten Stokhof, Hessel Sprey, Tatsuya Yoshimi, Bert Jongbloed, Noureddine Adjeroud
  • Publication number: 20120015105
    Abstract: Method of depositing a film having a substantially uniform thickness by means of chemical vapor deposition, comprising: providing a reaction chamber; providing a substrate in said reaction chamber; subjecting the substrate to a series of deposition cycles, wherein each deposition cycle includes the steps of: (a) during a first time interval, supplying a first reactant to the reaction chamber; (b) during a second time interval, supplying a second reactant to the reaction chamber; and (c) during a third time interval, supplying neither the first nor the second reactant to the reaction chamber; wherein a start of the second time interval lies within the first time interval, such that a pre-exposure interval exists between a start of the first time interval and the start of the second time interval, during which pre-exposure interval the first reactant is supplied to the reaction chamber while the second reactant is not.
    Type: Application
    Filed: July 14, 2011
    Publication date: January 19, 2012
    Inventors: Maarten Stokhof, Hessel Sprey, Yoshimi Tatsuya, Bert Jongbloed, Noureddine Adjeroud
  • Publication number: 20110256718
    Abstract: Thin films are formed by formed by atomic layer deposition, whereby the composition of the film can be varied from monolayer to monolayer during cycles including alternating pulses of self-limiting chemistries. In the illustrated embodiments, varying amounts of impurity sources are introduced during the cyclical process. A graded gate dielectric is thereby provided, even for extremely thin layers. The gate dielectric as thin as 2 nm can be varied from pure silicon oxide to oxynitride to silicon nitride. Similarly, the gate dielectric can be varied from aluminum oxide to mixtures of aluminum oxide and a higher dielectric material (e.g., ZrO2) to pure high k material and back to aluminum oxide. In another embodiment, metal nitride (e.g., WN) is first formed as a barrier for lining dual damascene trenches and vias. During the alternating deposition process, copper can be introduced, e.g.
    Type: Application
    Filed: April 4, 2011
    Publication date: October 20, 2011
    Applicant: ASM INTERNATIONAL N.V.
    Inventors: Suvi P. Haukka, Ivo Raaijmakers, Wei Min Li, Juhana Kostamo, Hessel Sprey, Christiaan J. Werkhoven
  • Patent number: 7981791
    Abstract: Thin films are formed by formed by atomic layer deposition, whereby the composition of the film can be varied from monolayer to monolayer during cycles including alternating pulses of self-limiting chemistries. In the illustrated embodiments, varying amounts of impurity sources are introduced during the cyclical process. A graded gate dielectric is thereby provided, even for extremely thin layers. The gate dielectric as thin as 2 nm can be varied from pure silicon oxide to oxynitride to silicon nitride. Similarly, the gate dielectric can be varied from aluminum oxide to mixtures of aluminum oxide and a higher dielectric material (e.g., ZrO2) to pure high k material and back to aluminum oxide. In another embodiment, metal nitride (e.g., WN) is first formed as a barrier for lining dual damascene trenches and vias. During the alternating deposition process, copper can be introduced, e.g.
    Type: Grant
    Filed: August 29, 2008
    Date of Patent: July 19, 2011
    Assignee: ASM International N.V.
    Inventors: Suvi P. Haukka, Ivo Raaijmakers, Wei Min Li, Juhana Kostamo, Hessel Sprey, Christiaan J. Werkhoven
  • Patent number: 7884016
    Abstract: In some embodiments, a low-k dielectric film liner, preferably comprising benzocyclobutene, is deposited on the sidewalls of through-silicon vias used in three-dimensional (3-D) integration of integrated circuits. A semiconductor workpiece having a via is provided. A dielectric film liner, preferably comprising benzocyclobutene, is deposited on the sidewalls of the via by chemical vapor deposition. Following the deposition of the dielectric film liner, conductive material is deposited into the via. The conductive material on the bottom of the via can be exposed by thinning the back of the semiconductor workpiece, thereby forming a through-silicon via. The semiconductor workpiece can form a stack with one or more additional semiconductor workpieces having vias filled with conductive material to form a 3-D integrated circuit. The conductive material electrically interconnects the integrated circuits at different levels of the stack.
    Type: Grant
    Filed: February 12, 2009
    Date of Patent: February 8, 2011
    Assignee: ASM International, N.V.
    Inventors: Hessel Sprey, Akinori Nakano
  • Publication number: 20100200989
    Abstract: In some embodiments, a low-k dielectric film liner, preferably comprising benzocyclobutene, is deposited on the sidewalls of through-silicon vias used in three-dimensional (3-D) integration of integrated circuits. A semiconductor workpiece having a via is provided. A dielectric film liner, preferably comprising benzocyclobutene, is deposited on the sidewalls of the via by chemical vapor deposition. Following the deposition of the dielectric film liner, conductive material is deposited into the via. The conductive material on the bottom of the via can be exposed by thinning the back of the semiconductor workpiece, thereby forming a through-silicon via. The semiconductor workpiece can form a stack with one or more additional semiconductor workpieces having vias filled with conductive material to form a 3-D integrated circuit. The conductive material electrically interconnects the integrated circuits at different levels of the stack.
    Type: Application
    Filed: February 12, 2009
    Publication date: August 12, 2010
    Applicant: ASM International, N.V.
    Inventors: Hessel Sprey, Akinori Nakano
  • Publication number: 20090269939
    Abstract: Methods for selective oxidation using pulses of an oxidizing agent are described. An oxidation process is provided in which a pulse of an oxidizing agent is followed by a flow of a purging agent. The pulse of the oxidizing agent and the flow of the purging agent forms a cycle that can be repeated to allow for desired oxidation on parts of a structure, e.g., a transistor structure, while preventing or limiting undesired oxidation on other parts of the structure. In addition, during the oxidation, a nitrogen source such as N2, NH3, N2H4 or combinations thereof, can be provided to enhance the selectivity of the oxidation process. The nitrogen source can act as an oxygen scavenger to enhance oxidation selectively, or undesired oxidation can also be further prevented or limited by introducing other oxygen scavengers, such as hydrazine.
    Type: Application
    Filed: February 27, 2009
    Publication date: October 29, 2009
    Applicant: ASM International, N.V.
    Inventor: Hessel Sprey
  • Publication number: 20090068832
    Abstract: Thin films are formed by formed by atomic layer deposition, whereby the composition of the film can be varied from monolayer to monolayer during cycles including alternating pulses of self-limiting chemistries. In the illustrated embodiments, varying amounts of impurity sources are introduced during the cyclical process. A graded gate dielectric is thereby provided, even for extremely thin layers. The gate dielectric as thin as 2 nm can be varied from pure silicon oxide to oxynitride to silicon nitride. Similarly, the gate dielectric can be varied from aluminum oxide to mixtures of aluminum oxide and a higher dielectric material (e.g., ZrO2) to pure high k material and back to aluminum oxide. In another embodiment, metal nitride (e.g., WN) is first formed as a barrier for lining dual damascene trenches and vias. During the alternating deposition process, copper can be introduced, e.g.
    Type: Application
    Filed: August 29, 2008
    Publication date: March 12, 2009
    Applicant: ASM INTERNATIONAL N.V.
    Inventors: Suvi P. Haukka, Ivo Raaijmakers, Wei Min Li, Juhana Kostamo, Hessel Sprey, Christrian J. Werkhoven