Patents by Inventor Hideaki Tsuchiya

Hideaki Tsuchiya has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20150228586
    Abstract: A semiconductor device includes an interlayer insulating film INS2, adjacent Cu wirings M1W formed in the interlayer insulating film INS2, and an insulating barrier film BR1 which is in contact with a surface of the interlayer insulating film INS2 and surfaces of the Cu wirings M1W and covers the interlayer insulating film INS2 and the Cu wirings M1W. Between the adjacent Cu wirings M1W, the interlayer insulating film INS2 has a damage layer DM1 on its surface, and has an electric field relaxation layer ER1 having a higher nitrogen concentration than a nitrogen concentration of the damage layer DM1 at a position deeper than the damage layer DM1.
    Type: Application
    Filed: November 8, 2013
    Publication date: August 13, 2015
    Inventors: Tatsuya Usami, Yukio Miura, Hideaki Tsuchiya
  • Patent number: 8749058
    Abstract: The semiconductor device includes an interlayer insulating film, a wiring provided in the interlayer insulating film, and a SiN film provided over the interlayer insulating film and over the wiring. The peak positions of Si—N bonds of the SiN film, which are measured by FTIR, are within the range of 845 cm?1 to 860 cm?1. This makes it possible to inhibit current leakage in a silicon nitride film, which is a barrier insulating film for preventing the diffusion of wiring metal.
    Type: Grant
    Filed: December 13, 2011
    Date of Patent: June 10, 2014
    Assignee: Renesas Electronics Corporation
    Inventors: Tatsuya Usami, Hideaki Tsuchiya, Yukio Miura, Tomoyuki Nakamura, Koichi Ohto, Chikako Ohto, Shinji Yokogawa
  • Publication number: 20120181615
    Abstract: A distance between a contact and a gate electrode can be measured efficiently. Conversion data indicating a correlation between the distance between the first gate electrode and the first contact and a magnitude of a leakage current amount is prepared in advance. The leakage current amount between the first gate electrode and the first contact is measured, and the measured leakage current amount is converted into the distance between the first gate electrode and the first contact by using the conversion data. Then, a superposition error between an exposure process for forming the first gate electrode and an exposure process for forming the first contact can be measured from a difference between the measured value of the distance between the first gate electrode and the first contact and a design value of the distance.
    Type: Application
    Filed: January 9, 2012
    Publication date: July 19, 2012
    Applicant: Renesas Electronics Corporation
    Inventors: Tatsuo SHIMIZU, Shinji YOKOGAWA, Satoshi UNO, Hideaki TSUCHIYA
  • Publication number: 20120181694
    Abstract: The semiconductor device includes an interlayer insulating film, a wiring provided in the interlayer insulating film, and a SiN film provided over the interlayer insulating film and over the wiring. The peak positions of Si—N bonds of the SiN film, which are measured by FTIR, are within the range of 845 cm?1 to 860 cm?1. This makes it possible to inhibit current leakage in a silicon nitride film, which is a barrier insulating film for preventing the diffusion of wiring metal.
    Type: Application
    Filed: December 13, 2011
    Publication date: July 19, 2012
    Applicant: Renesas Electronics Corporation
    Inventors: Tatsuya Usami, Hideaki Tsuchiya, Yukio Miura, Tomoyuki Nakamura, Koichi Ohto, Chikako Ohto, Shinji Yokogawa
  • Patent number: 8209651
    Abstract: A wiring layout method includes designing a layout of a power wiring for an integrated circuit; designing a layout of plural signal wirings for the integrated circuit; comparing the signal frequency; classifying the signal wirings; calculating an evaluation value of a temperature rise; and modifying the layouts of the integrated circuit.
    Type: Grant
    Filed: November 4, 2009
    Date of Patent: June 26, 2012
    Assignee: Renesas Electronics Corporation
    Inventors: Shinji Yokogawa, Hideaki Tsuchiya
  • Patent number: 7966587
    Abstract: Conventionally, an excessively strict current limitation is often adopted. An interconnection apparatus includes an acquisition unit and a decision unit. The acquisition unit serves to acquire a current density and data rate of a region that a specific interconnect passes through. The decision unit serves to decide whether the temperature increase corresponding to the current density and the data rate acquired by the acquisition unit is within a permissible range.
    Type: Grant
    Filed: May 18, 2007
    Date of Patent: June 21, 2011
    Assignee: Renesas Electronics Corporation
    Inventors: Hideaki Tsuchiya, Shinji Yokogawa
  • Publication number: 20100333052
    Abstract: A reliability reference storage unit stores reference data for dividing semiconductor devices into equal to or more than three reliability ranks on the basis of the magnitude of an overlay error between a first interconnect layer and a second interconnect layer disposed over the first interconnect layer. An error storage unit stores overlay errors measured at multiple points within the surface of a semiconductor wafer. An error calculation unit calculates the overlay errors for a plurality of semiconductor chips on the basis of the coordinates of the plurality of semiconductor chips within the surface of the semiconductor wafer and the overlay errors stored in the error storage unit. A reliability information providing unit provides reliability information indicating reliability ranks to the plurality of semiconductor chips on the basis of the overlay errors for the plurality of semiconductor chips and reference data.
    Type: Application
    Filed: October 6, 2009
    Publication date: December 30, 2010
    Applicant: NEC ELECTRONICS CORPORATION
    Inventor: Hideaki Tsuchiya
  • Publication number: 20100095258
    Abstract: A wiring layout method includes designing a layout of a power wiring for an integrated circuit; designing a layout of plural signal wirings for the integrated circuit; comparing the signal frequency; classifying the signal wirings; calculating an evaluation value of a temperature rise; and modifying the layouts of the integrated circuit. In the comparing the signal frequency, the signal frequency of each of the signal wirings is compared with a predetermined reference frequency. In the classifying the signal wirings, the signal wirings are classified into a first group in which a signal frequency is equal to or higher than a reference frequency and a second group in which a signal frequency is lower than the reference frequency. In the calculating an evaluation value of a temperature rise, an evaluation value of a temperature rise is calculated by excluding the temperature rise caused by a power consumption of the signal wirings of the first group.
    Type: Application
    Filed: November 4, 2009
    Publication date: April 15, 2010
    Applicant: NEC ELECTRONICS CORPORATION
    Inventors: Shinji Yokogawa, Hideaki Tsuchiya
  • Publication number: 20080150168
    Abstract: Conventionally, an excessively strict current limitation is often adopted. An interconnection apparatus includes an acquisition unit and a decision unit. The acquisition unit serves to acquire a current density and data rate of a region that a specific interconnect passes through. The decision unit serves to decide whether the temperature increase corresponding to the current density and the data rate acquired by the acquisition unit is within a permissible range.
    Type: Application
    Filed: May 18, 2007
    Publication date: June 26, 2008
    Applicant: NEC ELECTRONIC CORPORATION
    Inventors: Hideaki Tsuchiya, Shinji Yokogawa
  • Patent number: 7356408
    Abstract: A recognizing unit recognizes targets located in front of the own vehicle based upon a detection result obtained from a preview sensor, and then, classifies the recognized targets by sorts to which these targets belong. A control unit determines information to be displayed based upon both the targets recognized by the recognizing unit and navigation information. A display device is controlled by the control unit so as to display thereon the determined information. The control unit controls the display device so that symbols indicative of the recognized targets are displayed to be superimposed on the navigation information, and also, controls the display device so that the symbols are displayed by employing a plurality of different display colors corresponding to the sorts to which the respective targets belong.
    Type: Grant
    Filed: October 14, 2004
    Date of Patent: April 8, 2008
    Assignee: Fuji Jukogyo Kabushiki Kaisha
    Inventors: Hideaki Tsuchiya, Tsutomu Tanzawa
  • Publication number: 20050086000
    Abstract: A recognizing unit recognizes targets located in front of the own vehicle based upon a detection result obtained from a preview sensor, and then, classifies the recognized targets by sorts to which these targets belong. A control unit determines information to be displayed based upon both the targets recognized by the recognizing unit and navigation information. A display device is controlled by the control unit so as to display thereon the determined information. The control unit controls the display device so that symbols indicative of the recognized targets are displayed to be superimposed on the navigation information, and also, controls the display device so that the symbols are displayed by employing a plurality of different display colors corresponding to the sorts to which the respective targets belong.
    Type: Application
    Filed: October 14, 2004
    Publication date: April 21, 2005
    Applicant: Fuji Jukogyo Kabushiki Kaisha
    Inventors: Hideaki Tsuchiya, Tsutomu Tanzawa
  • Publication number: 20040256672
    Abstract: A new MOSFET structure capable of controlling short-channel effects in an ultra-small MOSFET, whose channel length is less than or equal to 10 nm, has been disclosed. The MOSFET comprises a channel region whose channel length is less than or equal to 10 nm, a source region and a drain region formed at both sides of the channel region, an insulating film provided so as to cover at least the channel region, and a gate electrode provided so as to face the channel region via the insulating film, wherein the length of the gate electrode is greater than the channel length and both ends of the gate electrode overlap the source region and the drain region via the insulating film.
    Type: Application
    Filed: June 16, 2004
    Publication date: December 23, 2004
    Applicant: Semiconductor Technology Academic Research Center
    Inventor: Hideaki Tsuchiya
  • Patent number: 6538546
    Abstract: In a magnetic core for a non-contact displacement sensor comprising a detecting coil, a coil receiving member and a terminal, the coil receiving member is comprised of a green compact made of insulated soft magnetic powder and an insulating layer covering the green compact, and an organic resin is filled in a closed space of the coil receiving member.
    Type: Grant
    Filed: June 29, 2001
    Date of Patent: March 25, 2003
    Assignees: Tokyo Sintered Metal Company Limited, Koyo Seiko Co., Ltd.
    Inventors: Yoichi Serino, Masayuki Yamamoto, Masaki Sugiyama, Hideaki Tsuchiya, Masakazu Moriyama, Shunsuke Nakaura, Norio Nakatani, Takahiro Sanada, Hidenobu Nagano
  • Patent number: 6385334
    Abstract: In a correction operating part 10c, three regions including two distant regions and one near region are selected on a reference image picked up by a main camera 2, and distance data are added to the positions of the respective regions to define a range, in which corresponding regions exist, in a comparative image picked up by a sub-camera 3 to search the range to determine the positions of the regions at a resolution of one pixel or less. Then, on the basis of one of the distant regions, a translation correction value and an angle of rotation for the comparative image are derived from the relationship between the positions of the respective regions to be added to the set value of an affine transforming circuit 18 to parallel-displace and rotate the comparative image. Thereafter, an angle of rotation for causing the horizontal line of the main camera 2 to be parallel to the base line of a stereo camera is derived to be added to the set value of an affine transforming circuit 17 to rotate the reference image.
    Type: Grant
    Filed: March 10, 1999
    Date of Patent: May 7, 2002
    Assignee: Fuji Jukogyo Kabushiki Kaisha
    Inventors: Keiji Saneyoshi, Hideaki Tsuchiya
  • Publication number: 20020021199
    Abstract: In a magnetic core for a non-contact displacement sensor comprising a detecting coil, a coil receiving member and a terminal, the coil receiving member is comprised of a green compact made of insulated soft magnetic powder and an insulating layer covering the green compact, and an organic resin is filled in a closed space of the coil receiving member.
    Type: Application
    Filed: June 29, 2001
    Publication date: February 21, 2002
    Inventors: Yoichi Serino, Masayuki Yamamoto, Masaki Sugiyama, Hideaki Tsuchiya, Masakazu Moriyama, Shunsuke Nakaura, Norio Nakatani, Takahiro Sanada, Hidenobu Nagaro
  • Patent number: 6148250
    Abstract: A three-dimensional image of a ground surface taken by a stereoscopic camera is converted to a distance image in a stereoscopic processing section. In an altitude calculating section, after peculiar points contained in the distance image are deleted and further the lens distortion is deleted from the distance image, the distance image is transferred to a real space coordinate. Then, an equation approximating to a plane is obtained from data of the distance image and a length of a perpendicular line to the plane is calculated as a ground altitude.
    Type: Grant
    Filed: February 9, 1999
    Date of Patent: November 14, 2000
    Assignee: Fuji Jukogyo Kabushiki Kaisha
    Inventors: Keiji Saneyoshi, Hideaki Tsuchiya
  • Patent number: 5530420
    Abstract: A running guide apparatus for a vehicle includes stereoscopic picture processing element for processing a pair of stereoscopic pictures of an object outside a vehicle imaged by a imaging system mounted on the vehicle, construction detection element for detecting a plurality of various constructions by using three dimensional position data calculated with each portion of the object corresponding to the distance distribution data from the stereoscopic picture processing element; gap distance calculation element for respectively calculating the nearest distance as right and left gap distances each between an extended line of right or left side of the vehicle and each of ends on the vehicle side of the plurality of various constructions detected by the construction detection element; and information element for informing the driver of data related to the right and left gap data calculated by the gap distance calculation element; so as to obtain a distance distribution of an entire picture in dependency upon a dis
    Type: Grant
    Filed: December 27, 1994
    Date of Patent: June 25, 1996
    Assignee: Fuji Jukogyo Kabushiki Kaisha
    Inventors: Hideaki Tsuchiya, Keiji Hanawa, Keiji Saneyoshi
  • Patent number: RE37610
    Abstract: A running guide apparatus for a vehicle includes stereoscopic picture processing element for processing a pair of stereoscopic pictures of an object outside a vehicle imaged by a imaging system mounted on the vehicle, construction detection element for detecting a plurality of various constructions by using three dimensional position data calculated with each portion of the object corresponding to the distance distribution data from the stereoscopic picture processing element; gap distance calculation element for respectively calculating the nearest distance as right and left gap distances each between an extended line of right or left side of the vehicle and each of ends on the vehicle side of the plurality of various constructions detected by the construction detection element; and information element for informing the driver of data related to the right and left gap data calculated by the gap distance calculation element; so as to obtain a distance distribution of an entire picture in dependency upon a dis
    Type: Grant
    Filed: June 24, 1998
    Date of Patent: March 26, 2002
    Assignee: Fuji Jukogyo Kabushiki Kaisha
    Inventors: Hideaki Tsuchiya, Keiji Hanawa, Keiji Saneyoshi