Patents by Inventor Hidechica Kishigami

Hidechica Kishigami has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5018061
    Abstract: A microprocessor with on-cache memory and an address translation buffer in which it further comprises first and second flip-flop circuits for indicating in hit or miss in the tag field of the cache memory and for storing which of the X and Y sections of the tag field a target data exists. Access to the tag field is carried out prior to access to the data field of the cache memory, thereby preventing access to the data field when a miss occurs in the tag field, and thus decreasing power consumption.
    Type: Grant
    Filed: June 27, 1988
    Date of Patent: May 21, 1991
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hidechica Kishigami, Tohru Sasaki, Kiyotaka Sasai