Patents by Inventor Hideki Yagi

Hideki Yagi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9329451
    Abstract: A method for producing optical semiconductor devices includes: forming a stacked semiconductor layer on a device substrate to provide an epitaxial substrate having a size corresponding to a section arrangement; forming, on the epitaxial substrate, a mask having a pattern for a semiconductor mesa and for a trench of at least one optical semiconductor device, a width of the trench in the pattern being determined according to a trench width map in which trench width is based upon an in-plane distribution of the thickness of a resin layer of the at least one device, and upon a correlation between the thickness of the resin layer and the trench width; forming a trench structure including the semiconductor mesa and the trench by etching the stacked semiconductor layer using the mask; forming a resin layer on the trench structure; and forming an opening on the semiconductor mesa by etching the resin layer.
    Type: Grant
    Filed: January 26, 2015
    Date of Patent: May 3, 2016
    Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Takamitsu Kitamura, Hideki Yagi
  • Patent number: 9285613
    Abstract: A semiconductor Mach-Zehnder modulator includes a substrate having a main surface including first, second and third regions sequentially arranged along a direction; a waveguide mesa including first and second waveguide arms provided on the second region, first and second optical couplers provided on the first and third regions, respectively; a first semiconductor protective layer provided on side surfaces of the first and second waveguide arms; a buried layer provided on side surfaces of the waveguide mesa and on the main surface, the buried layer including a material having a dielectric constant lower than that of the first protective layer; and first and second upper electrodes provided on the first and second waveguide arms, respectively. The first and second optical couplers are connected to the first and second waveguide arms. Above the second region, the buried layer is provided on the first protective layer.
    Type: Grant
    Filed: May 22, 2013
    Date of Patent: March 15, 2016
    Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventor: Hideki Yagi
  • Patent number: 9280004
    Abstract: A method for manufacturing a semiconductor modulator includes the steps of preparing a substrate having a main surface including first and second areas; forming a stacked semiconductor layer on the main surface; forming an optical waveguide mesa by etching the stacked semiconductor layer using a mask, the optical waveguide mesa including an optical modulation portion; applying a resin on a top surface and a side surface of the optical waveguide mesa and on the substrate; forming a first opening in the resin on the second area of the substrate; forming an underlayer structure on the second area of the substrate in contact with the substrate; and forming a pad electrode on the underlayer structure in contact with the underlayer structure through the first opening of the resin. The underlayer structure includes an insulating layer made of a dielectric material.
    Type: Grant
    Filed: March 28, 2014
    Date of Patent: March 8, 2016
    Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Hideki Yagi, Takamitsu Kitamura, Hirohiko Kobayashi, Yoshihiro Yoneda
  • Patent number: 9280030
    Abstract: A method for producing a semiconductor optical device includes the steps of forming first and second optical waveguides; forming a first resin layer on the first and the second optical waveguides; forming an opening in the first resin layer; forming a first electrode in the opening; forming a second resin layer on the first electrode and the first resin layer; forming a groove in the second resin layer on the first electrode; forming a second electrode on the second resin layer, a side surface of the groove, and the top surface of the first electrode; and forming a third electrode on the second electrode. The second and third electrodes have a region in which the second and third electrodes pass over the second optical waveguide, and, in the region, the first and second resin layers are disposed between the second electrode and the second optical waveguide.
    Type: Grant
    Filed: July 11, 2014
    Date of Patent: March 8, 2016
    Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Daisuke Kimura, Hideki Yagi, Takamitsu Kitamura
  • Patent number: 9261649
    Abstract: A method for manufacturing a semiconductor optical waveguide device includes the steps of forming a waveguide mesa having first and second portions by etching a stacked semiconductor layer through a first mask; forming a dummy buried region embedding a top surface and side surfaces of the waveguide mesa; forming a second mask on the dummy buried region, the second mask having an opening on the first portion and having a pattern on the second portion; forming a third mask having an opening that reaches a top surface of the first portion, the third mask including a dummy buried mask formed by etching the dummy buried region through the second mask; forming an upper mesa by etching the waveguide mesa through the third mask; and after removing the third mask, forming a lower mesa by etching the stacked semiconductor layer, the lower mesa having a greater width than that of the upper mesa.
    Type: Grant
    Filed: March 13, 2015
    Date of Patent: February 16, 2016
    Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Takamitsu Kitamura, Hideki Yagi, Naoya Kono
  • Publication number: 20160026064
    Abstract: An optical semiconductor device including: a substrate having a principal surface; a first and a second optical waveguides disposed on the principal surface of the substrate, the first and second optical waveguides extending in a first direction, the second optical waveguide being arranged adjacent to the first optical waveguide in a second direction intersecting with the first direction; a first and a second signal electrodes disposed on the first and second optical waveguides; a resistor disposed on the principal surface, the resistor being arranged between the first optical waveguide and the second optical waveguide, the resistor being electrically connected to the first signal electrode and the second signal electrode; a resin layer disposed on the principal surface, top surfaces of the first and second signal electrodes, and the resistor; and a capacitor disposed on the resin layer, the capacitor being electrically connected to the resistor through an opening of the resin layer.
    Type: Application
    Filed: July 23, 2015
    Publication date: January 28, 2016
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Ryuji MASUYAMA, Naoya KONO, Daisuke KIMURA, Hirohiko KOBAYASHI, Takamitsu KITAMURA, Hideki YAGI
  • Publication number: 20160026063
    Abstract: A modulator including: a Mach-Zehnder modulator that includes an optical waveguide disposed on a substrate, the optical waveguide including an electrode thereon; a resin layer disposed on the substrate, the resin layer embedding the optical waveguide, the resin layer having a groove arranged besides the optical waveguide; a termination resistor disposed on the substrate in the groove of the resin layer; and a first wiring disposed on the resin layer, the first wiring being connected to the termination resistor and the electrode of the optical waveguide.
    Type: Application
    Filed: July 21, 2015
    Publication date: January 28, 2016
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Hideki YAGI, Hirohiko Kobayashi, Naoya Kono, Takamitsu Kitamura
  • Publication number: 20160011439
    Abstract: A semiconductor optical modulator includes a substrate having a principal surface; a waveguide disposed on the principal surface of the substrate, the waveguide extending in a first direction; a first electrode disposed on the waveguide, the first electrode being in contact with an upper surface of the waveguide; a first wiring connected to the first electrode, the first wiring extending in a second direction intersecting the first direction; a build-up portion connected to the first wiring; a second wiring connected to the build-up portion, the second wiring extending in a plane parallel to the principal surface of the substrate; and a resin layer disposed on the substrate, the resin layer embedding the first wiring and the build-up portion. The build-up portion extends along a third direction, the third direction intersecting perpendicularly to the principal surface of the substrate. The second wiring is disposed on the resin layer.
    Type: Application
    Filed: July 10, 2015
    Publication date: January 14, 2016
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Takamitsu KITAMURA, Hideki YAGI, Daisuke KIMURA, Hirohiko KOBAYASHI, Masataka WATANABE
  • Patent number: 9229168
    Abstract: A semiconductor optical waveguide device includes a substrate having a first area and a second area, and first, second, and semiconductor mesas on the substrate. The first semiconductor mesa includes a cladding layer and a first mesa portion on the second area, the first mesa portion including first and second portions. The second semiconductor mesa includes an intermediate layer, a first core layer, and first and second mesa portions on the first and second areas, respectively. The third semiconductor mesa includes a second core layer, and first and second mesa portions having a greater width than that of the second semiconductor mesa. The first portion of the first semiconductor mesa has a substantially same width as the second mesa portion of the second semiconductor mesa. The first core layer is optically coupled to the second core layer through the intermediate layer disposed between the first and second core layers.
    Type: Grant
    Filed: March 5, 2014
    Date of Patent: January 5, 2016
    Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Akira Furuya, Takamitsu Kitamura, Hideki Yagi, Naoya Kono
  • Patent number: 9229293
    Abstract: A method for manufacturing a semiconductor optical device includes the steps of growing a stacked layer including lower and upper core layers, a first upper region including a non-doped layer, a second upper region including a p-type layer, and a cap layer; forming an upper mesa by etching the stacked layer; selectively etching the cap layer in the upper mesa on the first and second regions; forming a mask on the upper mesa in the second and third regions; and etching the upper mesa using the mask so as to form first to fourth mesa portions. The first and fourth mesa portions are formed by etching the first and second upper regions, and the second upper region and the cap layer, respectively. The second and third mesa portions are formed by etching the first and second upper regions, and the second upper region and the cap layer, respectively.
    Type: Grant
    Filed: August 8, 2014
    Date of Patent: January 5, 2016
    Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Naoya Kono, Hideki Yagi, Takamitsu Kitamura
  • Patent number: 9223088
    Abstract: A method for manufacturing a semiconductor optical device includes the steps of forming a semiconductor mesa by etching a stacked semiconductor layer, the semiconductor mesa being defined by two grooves, one on each side of the semiconductor mesa; forming a first insulating film on a side surface and a top surface of the semiconductor mesa; forming a resin film on the first insulating film, the resin film filling the grooves; etching the resin film on the semiconductor mesa to form a first opening in the resin film, the first insulating film being exposed through the first opening; etching the first insulating film exposed through the first opening to expose the top surface of the semiconductor mesa; depositing an ohmic metal on the top surface of the semiconductor mesa; and depositing a second insulating film on the ohmic metal and a surface of the resin film.
    Type: Grant
    Filed: May 1, 2014
    Date of Patent: December 29, 2015
    Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Hirohiko Kobayashi, Yoshihiro Yoneda, Hideki Yagi
  • Publication number: 20150331298
    Abstract: A semiconductor optical integrated device including: a substrate having a first area, a second area and a third area arranged in a waveguiding direction; a laser portion disposed on the third area the laser portion including a laser waveguide and a heater thereon; a semiconductor waveguide disposed on the second area, the semiconductor waveguide including a core layer and a cladding layer disposed on the core layer; a Mach-Zehnder modulator portion disposed on the first area, the Mach-Zehnder modulator portion including a first arm and a second arm; a buried region embedding the laser waveguide, the semiconductor waveguide, and the first and second arms; a groove disposed on the second area, the groove extending in a direction intersecting the waveguiding direction to across the semiconductor waveguide to the buried region; and a resin body disposed on the Mach-Zehnder modulator portion. The laser portion is optically coupled to the Mach-Zehnder modulator portion via the semiconductor waveguide.
    Type: Application
    Filed: May 5, 2015
    Publication date: November 19, 2015
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventor: HIDEKI YAGI
  • Patent number: 9176360
    Abstract: A method for producing a spot-size convertor includes the steps of preparing a substrate; forming a stacked semiconductor layer including first and second core layers on the substrate; forming a mesa structure by etching the stacked semiconductor layer using a first mask, the mesa structure including a side surface and a bottom portion of the first core layer; forming a protective mask covering the side surface; etching the bottom portion using the protective mask to form a top mesa; and forming a bottom mesa by etching the second core layer using a second mask. The top mesa includes the first core layer and a portion having a mesa width gradually reduced in a first direction of a waveguide axis. The bottom mesa includes the second core layer and a portion having a mesa width gradually reduced in a second direction opposite to the first direction.
    Type: Grant
    Filed: July 15, 2014
    Date of Patent: November 3, 2015
    Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Hideki Yagi, Naoko Konishi, Takamitsu Kitamura, Naoya Kono
  • Patent number: 9158139
    Abstract: A method for manufacturing a Mach-Zehnder modulator includes the steps of forming a stacked semiconductor layer, the stacked semiconductor layer including a first conductivity type semiconductor layer, a core layer and a second conductivity type semiconductor layer, forming a waveguide mesa, the waveguide mesa having a first portion, a second portion and a third portion arranged between the first and second portions; forming a buried region on the waveguide mesa; forming an opening in the buried region on the third portion by etching the buried region using a mask; etching the second conductivity type semiconductor layer in the third portion through the buried region as a mask; and removing the buried region after etching the second conductivity type semiconductor layer. In the step of etching the second conductivity type semiconductor layer, the buried region covers a side surface of the third portion of the waveguide mesa.
    Type: Grant
    Filed: April 1, 2014
    Date of Patent: October 13, 2015
    Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Takamitsu Kitamura, Hideki Yagi
  • Publication number: 20150277046
    Abstract: A method for manufacturing a semiconductor optical device includes the steps of forming a semiconductor mesa by etching a stacked semiconductor layer, the semiconductor mesa being defined by two grooves, one on each side of the semiconductor mesa; forming a first insulating film on a side surface and a top surface of the semiconductor mesa; forming a resin film on the first insulating film, the resin film filling the grooves; etching the resin film on the semiconductor mesa to form a first opening in the resin film, the first insulating film being exposed through the first opening; etching the first insulating film exposed through the first opening to expose the top surface of the semiconductor mesa; depositing an ohmic metal on the top surface of the semiconductor mesa; and depositing a second insulating film on the ohmic metal and a surface of the resin film.
    Type: Application
    Filed: May 1, 2014
    Publication date: October 1, 2015
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Hirohiko KOBAYASHI, Yoshihiro YONEDA, Hideki YAGI
  • Publication number: 20150260915
    Abstract: A method for manufacturing a semiconductor optical waveguide device includes the steps of forming a waveguide mesa having first and second portions by etching a stacked semiconductor layer through a first mask; forming a dummy buried region embedding a top surface and side surfaces of the waveguide mesa; forming a second mask on the dummy buried region, the second mask having an opening on the first portion and having a pattern on the second portion; forming a third mask having an opening that reaches a top surface of the first portion, the third mask including a dummy buried mask formed by etching the dummy buried region through the second mask; forming an upper mesa by etching the waveguide mesa through the third mask; and after removing the third mask, forming a lower mesa by etching the stacked semiconductor layer, the lower mesa having a greater width than that of the upper mesa.
    Type: Application
    Filed: March 13, 2015
    Publication date: September 17, 2015
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Takamitsu KITAMURA, Hideki YAGI, Naoya KONO
  • Publication number: 20150260933
    Abstract: An integrated optical semiconductor device includes a substrate including first and second regions; a plurality of light receiving devices disposed in the second region; a multimode interference coupler disposed in the first region, the multimode interference coupler including output optical waveguides optically coupled to the corresponding light receiving devices; first and second conductive layers disposed on a back surface of the substrate in the first and second regions, respectively; and a plurality of capacitors disposed in the second region, each of the capacitors including a first electrode connected to one of the light receiving devices and a second electrode connected to the second conductive layer. The second conductive layer is electrically insulated from the first conductive layer. The substrate is made of a semi-insulating semiconductor. The multimode interference coupler and the light receiving device include the same n-type semiconductor layer disposed on a principal surface of the substrate.
    Type: Application
    Filed: March 10, 2015
    Publication date: September 17, 2015
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Ryuji Masuyama, Yoshihiro Yoneda, Hideki Yagi, Naoko Konishi
  • Publication number: 20150241648
    Abstract: A semiconductor optical device includes a substrate including first and second regions arranged in a first direction, a photodiode disposed on the first region, an optical waveguide disposed on the second region, and a buried layer disposed on a side surface of the photodiode. The side surface of the photodiode extends in the first direction. The photodiode has a first end surface intersecting with the first direction, and the optical waveguide is in direct contact with the first end surface. The buried layer is composed of a III-V compound semiconductor doped with a transition metal. The photodiode includes a stacked semiconductor layer including a first cladding layer, a light-absorbing layer and a second cladding layer stacked in that order on the substrate. The light-absorbing layer has a side surface having at least a portion recessed with respect to a side surface of the first cladding layer.
    Type: Application
    Filed: February 20, 2015
    Publication date: August 27, 2015
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Takehiko KIKUCHI, Hideki YAGI, Yoshihiro YONEDA
  • Patent number: 9103976
    Abstract: A method for manufacturing a waveguide-type semiconductor device includes the steps of forming an epitaxial structure including a waveguide mesa and a device mesa; forming a mask for selective growth on the epitaxial structure; growing a semiconductor region on an end surface of the device mesa by using the mask for selective growth, the semiconductor region including a side portion having a layer shape and a protruding wall portion; forming an ohmic electrode on a top surface of the device mesa; forming a resin layer on the device mesa and the semiconductor region; forming a resin mask having an opening on the ohmic electrode; forming an electric conductor connecting the ohmic electrode to an electrode pad, the electric conductor passing over the protruding wall portion while making contact with a surface of the resin mask; and removing the resin mask after forming the electric conductor.
    Type: Grant
    Filed: May 16, 2014
    Date of Patent: August 11, 2015
    Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Ryuji Masuyama, Yoshihiro Yoneda, Hideki Yagi, Naoko Konishi
  • Publication number: 20150132877
    Abstract: A method for producing optical semiconductor devices includes: forming a stacked semiconductor layer on a device substrate to provide an epitaxial substrate having a size corresponding to a section arrangement; forming, on the epitaxial substrate, a mask having a pattern for a semiconductor mesa and for a trench of at least one optical semiconductor device, a width of the trench in the pattern being determined according to a trench width map in which trench width is based upon an in-plane distribution of the thickness of a resin layer of the at least one device, and upon a correlation between the thickness of the resin layer and the trench width; forming a trench structure including the semiconductor mesa and the trench by etching the stacked semiconductor layer using the mask; forming a resin layer on the trench structure; and forming an opening on the semiconductor mesa by etching the resin layer.
    Type: Application
    Filed: January 26, 2015
    Publication date: May 14, 2015
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Takamitsu KITAMURA, Hideki YAGI