Patents by Inventor Hidemichi Furihata

Hidemichi Furihata has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11133454
    Abstract: A piezoelectric element includes: a first electrode provided on a base; a second electrode; and a piezoelectric layer that is provided between the first electrode and the second electrode and that contains a complex oxide having a perovskite structure and including potassium, sodium, and niobium, where: a surface of the piezoelectric layer on a side of the second electrode is composed of faces of first grains and faces of second grains; a roughness height on the faces of the first grains is larger than a roughness height on the faces of the second grains; and an area occupied by the faces of the first grains is 10.0% or less on the surface of the piezoelectric layer.
    Type: Grant
    Filed: February 20, 2020
    Date of Patent: September 28, 2021
    Assignee: SEIKO EPSON CORPORATION
    Inventors: Takayuki Yonemura, Hidemichi Furihata, Yasuto Kakemura
  • Publication number: 20200324546
    Abstract: A piezoelectric element includes: a first electrode provided on a base; a piezoelectric layer provided on the first electrode and containing a complex oxide which has a perovskite structure and contains potassium, sodium, and niobium; and a second electrode provided on the piezoelectric layer, in which the first electrode contains platinum, the first electrode is (111) preferentially oriented, and a platinum atom contained in the first electrode is bonded to an oxygen atom at an interface between the first electrode and the piezoelectric layer.
    Type: Application
    Filed: April 9, 2020
    Publication date: October 15, 2020
    Inventors: Kazuya KITADA, Masayuki OMOTO, Hidemichi FURIHATA, Kazuhide GOMI, Hidetoshi TAKO
  • Publication number: 20200274054
    Abstract: A piezoelectric element includes: a first electrode provided on a base; a second electrode; and a piezoelectric layer that is provided between the first electrode and the second electrode and that contains a complex oxide having a perovskite structure and including potassium, sodium, and niobium, where: a surface of the piezoelectric layer on a side of the second electrode is composed of faces of first grains and faces of second grains; a roughness height on the faces of the first grains is larger than a roughness height on the faces of the second grains; and an area occupied by the faces of the first grains is 10.0% or less on the surface of the piezoelectric layer.
    Type: Application
    Filed: February 20, 2020
    Publication date: August 27, 2020
    Applicant: SEIKO EPSON CORPORATION
    Inventors: Takayuki YONEMURA, Hidemichi FURIHATA, Yasuto KAKEMURA
  • Patent number: 10700258
    Abstract: A piezoelectric element includes a substrate; a first electrode formed above the substrate; a piezoelectric layer which contains a composite oxide having a perovskite crystal structure and which is formed above the first electrode; and a second electrode formed above the piezoelectric layer, and the amount of carbon contained in the substrate is 0.26 to less than 14.00 percent by atom.
    Type: Grant
    Filed: December 21, 2018
    Date of Patent: June 30, 2020
    Assignee: Seiko Epson Corporation
    Inventors: Kazuya Kitada, Masayuki Omoto, Tsutomu Asakawa, Hidemichi Furihata
  • Publication number: 20190198747
    Abstract: A piezoelectric element includes a substrate; a first electrode formed above the substrate; a piezoelectric layer which contains a composite oxide having a perovskite crystal structure and which is formed above the first electrode; and a second electrode formed above the piezoelectric layer, and the amount of carbon contained in the substrate is 0.26 to less than 14.00 percent by atom.
    Type: Application
    Filed: December 21, 2018
    Publication date: June 27, 2019
    Inventors: Kazuya KITADA, Masayuki OMOTO, Tsutomu ASAKAWA, Hidemichi FURIHATA
  • Publication number: 20180076381
    Abstract: A method for producing a piezoelectric element includes a step of forming a first electrode layer, a step of forming a piezoelectric body layer on the first electrode layer, a step of forming a second electrode layer on the piezoelectric body layer, a step of patterning the second electrode layer, a step of patterning the piezoelectric body layer by wet etching, and a step of forming an organic insulating layer on a side surface of the patterned piezoelectric body layer.
    Type: Application
    Filed: February 9, 2016
    Publication date: March 15, 2018
    Inventors: Noboru FURUYA, Hidemichi FURIHATA
  • Publication number: 20160059552
    Abstract: An inclined plane which inclines toward a lower plane of a ceiling portion, that is, the lower plane of a communication substrate from a ceiling plane of a second liquid chamber is formed in the second liquid chamber of the communication substrate. Therefore, an individual communication opening is formed, in a state of penetrating the communication substrate from the inclined plane. One end (lower end) of the individual communication opening communicates with the second liquid chamber by being open onto the inclined plane, and the other end (upper end) of the individual communication opening individually communicates with a pressure chamber of a pressure chamber forming substrate by being open onto an upper plane of the communication substrate. When a thickness of the communication substrate is referred to as T, a length of the individual communication opening is referred to as L, and a substantial depth of the second liquid chamber is referred to as D, the dimensions are configured so as to be L+D>T.
    Type: Application
    Filed: August 28, 2015
    Publication date: March 3, 2016
    Inventors: Motoki TAKABE, Koji ASADA, Hidemichi FURIHATA, Hiroyasu ASAKAWA
  • Patent number: 9254657
    Abstract: An inclined plane which inclines toward a lower plane of a ceiling portion, that is, the lower plane of a communication substrate from a ceiling plane of a second liquid chamber is formed in the second liquid chamber of the communication substrate. Therefore, an individual communication opening is formed, in a state of penetrating the communication substrate from the inclined plane. One end (lower end) of the individual communication opening communicates with the second liquid chamber by being open onto the inclined plane, and the other end (upper end) of the individual communication opening individually communicates with a pressure chamber of a pressure chamber forming substrate by being open onto an upper plane of the communication substrate. When a thickness of the communication substrate is referred to as T, a length of the individual communication opening is referred to as L, and a substantial depth of the second liquid chamber is referred to as D, the dimensions are configured so as to be L+D>T.
    Type: Grant
    Filed: August 28, 2015
    Date of Patent: February 9, 2016
    Assignee: Seiko Epson Corporation
    Inventors: Motoki Takabe, Koji Asada, Hidemichi Furihata, Hiroyasu Asakawa
  • Patent number: 8636343
    Abstract: A liquid ejecting head contains a piezoelectric element having a piezoelectric layer and an electrode disposed on the piezoelectric layer, in which the piezoelectric layer contains a complex oxide containing bismuth, iron, barium, and titanium and having a perovskite structure, has a yield stress of 5.66 GPa or more, and has a Young's modulus of 114 GPa or more.
    Type: Grant
    Filed: December 18, 2012
    Date of Patent: January 28, 2014
    Assignee: Seiko Epson Corporation
    Inventor: Hidemichi Furihata
  • Patent number: 8012449
    Abstract: A method of manufacturing a complex metal oxide powder, the method including: preparing a raw material composition for forming a complex metal oxide; mixing an oxidizing solution including an oxidizing substance into the raw material composition to produce complex metal oxide particles to obtain a liquid dispersion of the particles; and separating the particles from the liquid dispersion to obtain a complex metal oxide powder. The complex metal oxide is shown by a general formula AB1?xCxO3, an element A including at least Pb, an element B including at least one of Zr, Ti, V, W, and Hf, and an element C including at least one of Nb and Ta.
    Type: Grant
    Filed: June 26, 2007
    Date of Patent: September 6, 2011
    Assignee: Seiko Epson Corporation
    Inventors: Takeshi Kijima, Hidemichi Furihata, Setsuya Iwashita, Satoshi Kimura, Toshihiko Kaneda
  • Patent number: 7966720
    Abstract: A method of manufacturing an element substrate including: forming a release layer on a first support substrate; forming a metal layer having a predetermined pattern on the release layer; applying a sol-gel solution including a material for an inorganic substrate to the first support substrate; removing a solvent from the sol-gel solution by heat treatment to form the inorganic substrate; and removing the metal layer from the first support substrate by decomposing the release layer to transfer the metal layer to the inorganic substrate.
    Type: Grant
    Filed: October 2, 2007
    Date of Patent: June 28, 2011
    Assignee: Seiko Epson Corporation
    Inventors: Toshihiko Kaneda, Satoshi Kimura, Hidemichi Furihata, Takeshi Kijima
  • Patent number: 7604835
    Abstract: A method for manufacturing a wiring substrate includes the steps of (a) providing a first surface-active agent in first and second areas and of a substrate, (b) providing a second surface-active agent in the first area of the substrate, (c) providing a catalyst on the second surface-active agent, and (d) depositing a metal layer on the catalyst to thereby form a wiring composed of the metal layer along the first area.
    Type: Grant
    Filed: February 3, 2005
    Date of Patent: October 20, 2009
    Assignee: Seiko Epson Corporation
    Inventors: Hidemichi Furihata, Satoshi Kimura, Minoru Marumo
  • Patent number: 7597813
    Abstract: A method of manufacturing an element substrate including: forming a release layer on a first support substrate; forming a metal layer having a predetermined pattern on the release layer; disposing a second support substrate on the first support substrate so that the metal layer is interposed between the first and second support substrates; pouring a resin material in a fluid state between the first and second support substrates; curing the resin material to form a resin substrate; and removing the metal layer from the first support substrate by decomposing the release layer to transfer the metal layer to the resin substrate.
    Type: Grant
    Filed: October 2, 2007
    Date of Patent: October 6, 2009
    Assignee: Seiko Epson Corporation
    Inventors: Toshihiko Kaneda, Satoshi Kimura, Hidemichi Furihata, Takeshi Kijima
  • Patent number: 7521361
    Abstract: A method for manufacturing a wiring substrate by an electroless plating method that precipitates metal without using a plating resist is provided. The method includes the steps of: (a) providing a catalyst layer having a predetermined pattern on a substrate; (b) dipping the substrate in an electroless plating solution to thereby precipitate metal on the catalyst layer to provide a first metal layer; (c) washing a top surface of the substrate with water; and (d) dipping the substrate in an electroless plating solution to thereby precipitate metal on the first metal layer to provide a second metal layer.
    Type: Grant
    Filed: March 1, 2007
    Date of Patent: April 21, 2009
    Assignee: Seiko Epson Corporation
    Inventors: Satoshi Kimura, Hidemichi Furihata, Takeshi Kijima
  • Patent number: 7488678
    Abstract: A method of manufacturing an interconnect substrate by electroless plating, including: (a) forming a catalyst layer with a specific pattern on a substrate; (b) immersing the substrate in a first electroless plating solution including a first metal to deposit the first metal on the catalyst layer to form a first metal layer; and (c) immersing the substrate in a second electroless plating solution including a second metal to deposit the second metal on the first metal layer to form a second metal layer, an ionization tendency of the first metal being higher than an ionization tendency of the second metal.
    Type: Grant
    Filed: March 9, 2007
    Date of Patent: February 10, 2009
    Assignee: Seiko Epson Corporation
    Inventors: Satoshi Kimura, Hidemichi Furihata, Toshihiko Kaneda
  • Publication number: 20080299356
    Abstract: A plated substrate includes a substrate, a resin formed body having a specified pattern including catalytic metal that functions as a catalyst for electroless plating, and a metal layer formed on a top surface of the resin layer.
    Type: Application
    Filed: October 2, 2007
    Publication date: December 4, 2008
    Applicant: SEIKO EPSON CORPORATION
    Inventors: Toshihiko KANEDA, Satoshi KIMURA, Hidemichi FURIHATA, Takeshi KIJIMA
  • Publication number: 20080274338
    Abstract: A method for manufacturing a wiring substrate includes the steps of: (a) forming a sacrificial layer in a first pattern on a substrate; (b) forming a catalyst layer in a second pattern on the substrate; (c) immersing the substrate in an electroless plating liquid, thereby depositing a metal layer on the catalyst layer in the second pattern; and (d) heating to remove the sacrificial layer and to form a metal layer in a third pattern, wherein the third pattern is a region where the first pattern and the second pattern overlap each other.
    Type: Application
    Filed: March 27, 2008
    Publication date: November 6, 2008
    Applicant: SEIKO EPSON CORPORATION
    Inventors: Toshihiko KANEDA, Satoshi KIMURA, Hidemichi FURIHATA, Jun AMAKO, Daisuke SAWAKI, Takeshi KIJIMA
  • Publication number: 20080261026
    Abstract: A method of manufacturing an element substrate including: forming a release layer on a first support substrate; forming a metal layer having a predetermined pattern on the release layer; applying a sol-gel solution including a material for an inorganic substrate to the first support substrate; removing a solvent from the sol-gel solution by heat treatment to form the inorganic substrate; and removing the metal layer from the first support substrate by decomposing the release layer to transfer the metal layer to the inorganic substrate.
    Type: Application
    Filed: October 2, 2007
    Publication date: October 23, 2008
    Inventors: Toshihiko Kaneda, Satoshi Kimura, Hidemichi Furihata, Takeshi Kijima
  • Patent number: 7425474
    Abstract: A method of manufacturing a transistor includes the step of forming on a substrate a source electrode and drain electrode by selective electroless plating after patterning a charge control agent attached to the substrate using light, and the step of forming an organic semiconductor, a gate insulation layer, and a gate electrode.
    Type: Grant
    Filed: February 18, 2005
    Date of Patent: September 16, 2008
    Assignee: Seiko Epson Corporation
    Inventors: Takeo Kawase, Satoshi Kimura, Hidemichi Furihata, Mitsuaki Harada
  • Patent number: 7404885
    Abstract: A plating method includes the steps of (a) forming a roughened area in a predetermined area of a substrate, (b) forming a surface-active agent layer above at least the roughened area, (c) forming, above the roughened area, a catalyst layer above the surface-active agent layer, and (d) precipitating a metal layer above the catalyst layer.
    Type: Grant
    Filed: March 8, 2006
    Date of Patent: July 29, 2008
    Assignee: Seiko Epson Corporation
    Inventors: Hidemichi Furihata, Satoshi Kimura