Patents by Inventor Hideo Ishida

Hideo Ishida has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20090054100
    Abstract: Based on the program information for programs to be viewed that have been set by the user in a program-to-view setting section 105, a viewing duration calculating section 106 calculates the total viewing duration for programs to be viewed. A power consumption calculating section 107 calculates the amount of power to be consumed based on the total viewing duration. A battery level detection section 109 detects the battery level. When the battery level is less than the amount of power to be consumed, a recharge notification section 110 notifies the user that the battery needs to be recharged.
    Type: Application
    Filed: April 28, 2006
    Publication date: February 26, 2009
    Inventor: Hideo Ishida
  • Patent number: 7496281
    Abstract: A free space detection section detects a free space of a recording medium. A recording capacity calculation section calculates a recording capacity necessary for recording a program in the form of a first encoded signal on the recording medium. A signal control section for comparing the free space detected by the free space detection section and the recording capacity calculated by the recording capacity calculation section. A signal selection section selects at least one of the first encoded signal and a second encoded signal according to a result of the comparison by the signal control section. A recording section records the encoded signal selected by the signal selection section on the recording medium. The first encoded signal is obtained by compressively encoding the program at a first compression ratio. The second encoded signal is obtained by compressively encoding the program at a second compression ratio which is higher than the first compression ratio.
    Type: Grant
    Filed: July 8, 2004
    Date of Patent: February 24, 2009
    Assignee: Panasonic Corporation
    Inventor: Hideo Ishida
  • Patent number: 7165307
    Abstract: There are disclosed a method and apparatus for applying a strippable paint to a large-sized product finished with a sprayed coating, such as an automobile, to form a protective film on the surface of the coating. The product is conventionally kept in stock for a period of time before it is shipped. Contaminations such as dust are washed away from the surface of the product. Then, the strippable paint is applied, preliminarily dried, and non-preliminarily dried to form the protective film out of the strippable paint on the surface of the coating. This protective film is formed easily, appropriately, and reliably. The obtained protective film has a uniform and sufficient thickness. Even if the surface contains unapplied regions to which the paint should not be applied, the paint can be applied to the whole surface of the coating while avoiding the unapplied regions according to the invention. The application can be performed easily and reliably without leaving unapplied portions around the unapplied regions.
    Type: Grant
    Filed: April 4, 1996
    Date of Patent: January 23, 2007
    Assignee: Honda Giken Kogyo Kabushiki Kaisha
    Inventors: Hideaki Tojo, Hideo Ishida, Hisashi Kurota, Takao Arasawa, Nobuyuki Okita
  • Patent number: 7097876
    Abstract: There are disclosed a method and a apparatus for applying a strippable paint to a large-sized product finished with a sprayed coating, such as an automobile, to form a protective film on the surface of the coating. The product is conventionally kept in stock for a period of time before it is shipped. Contaminations such as dust are washed away from the surface of the product. Then, the strippable paint is applied, preliminarily dried, and non-preliminarily dried to form the protective film out of the strippable paint on the surface of the coating. This protective film is formed easily, appropriately, and reliably. The obtained protective film has a uniform and sufficient thickness. Even if the surface contains unapplied regions to which the paint should not be applied, the paint can be applied to the whole surface of the coating while avoiding the unapplied regions according to the invention. The application can be performed easily and reliably without leaving unapplied portions around the unapplied regions.
    Type: Grant
    Filed: March 6, 1995
    Date of Patent: August 29, 2006
    Assignee: Honda Giken Kogyo Kabushiki Kaisha
    Inventors: Hideaki Tojo, Hideo Ishida, Hisashi Kurota, Hideo Hiroe, Takao Arasawa, Satoru Yamada, Nobuyuki Okita
  • Publication number: 20050138232
    Abstract: A memory system control method is a control method in a system which comprises a central processing unit, a cache memory, and a main memory, and has a DMA transfer function to said main memory, wherein when the amount of data transferred to said main memory reaches an arbitrary value, the data in the cache memory corresponding to the address of data in said main memory which have been written by the DMA transfer are purged.
    Type: Application
    Filed: December 17, 2004
    Publication date: June 23, 2005
    Inventors: Sou Tamura, Hideo Ishida, Masaki Tatano
  • Publication number: 20050008336
    Abstract: A free space detection section detects a free space of a recording medium. A recording capacity calculation section calculates a recording capacity necessary for recording a program in the form of a first encoded signal on the recording medium. A signal control section for comparing the free space detected by the free space detection section and the recording capacity calculated by the recording capacity calculation section. A signal selection section selects at least one of the first encoded signal and a second encoded signal according to a result of the comparison by the signal control section. A recording section records the encoded signal selected by the signal selection section on the recording medium. The first encoded signal is obtained by compressively encoding the program at a first compression ratio. The second encoded signal is obtained by compressively encoding the program at a second compression ratio which is higher than the first compression ratio.
    Type: Application
    Filed: July 8, 2004
    Publication date: January 13, 2005
    Inventor: Hideo Ishida
  • Publication number: 20030163910
    Abstract: There are disclosed a method and a machine for applying a strippable paint to a large-sized product finished with a sprayed coating, such as an automobile, to form a protective film on the surface of the coating. The product is kept in stock and will be shipped. Contaminations such as dust are washed away from the surface of the product. Then, the strippable paint is applied, preliminarily dried, and non-preliminarily dried to form the protective film out of the strippable paint on the surface of the coating. This protective film is formed easily, appropriately, and certainly. The obtained protective film has a uniform and sufficient thickness. Even if the surface contains unapplied regions to which the paint should not be applied, the paint can be applied to the whole surface of the coating while avoiding the unapplied regions. The application can be performed easily and certainly without leaving unapplied portions around the unapplied regions.
    Type: Application
    Filed: April 4, 1996
    Publication date: September 4, 2003
    Inventors: HIDEAKI TOJO, HIDEO ISHIDA, HISASHI KUROTA, TAKAO ARASAWA, NOBUYUKI OKITA
  • Publication number: 20030087028
    Abstract: There are disclosed a method and a machine for applying a strippable paint to a large-sized product finished with a sprayed coating, such as an automobile, to form a protective film on the surface of the coating. The product is kept in stock and will be shipped. Contaminations such as dust are washed away from the surface of the product Then, the strippable paint is applied, preliminarily dried, and non-preliminarily dried to form the protective film out of the strippable paint on the surface of the coating. This protective film is formed easily, appropriately, and certainly. The obtained protective film has a uniform and sufficient thickness. Even if the surface contains unapplied regions to which the paint should not be applied, the paint can be applied to the whole surface of the coating while avoiding the unapplied regions. The application can be performed easily and certainly without leaving unapplied portions around the unapplied regions.
    Type: Application
    Filed: March 6, 1995
    Publication date: May 8, 2003
    Inventors: HIDEAKI TOJO, HIDEO ISHIDA, HISASHI KUROTA, HIDEO HIROE, TAKAO ARASAWA, SATORU YAMADA, NOBUYUKI OKITA
  • Patent number: 6307858
    Abstract: In an ATM cell transmission system having an ATM layer device (1), a data path interface (3) and a plurality of normal PHY (Physical) layer devices (2-0 to 2-M) according to Utopia Level 2 specification, the ATM layer device (1) comprises: a cell buffer (4); FIFO memories (5-0 to 5-M) each corresponding to each of the normal PHY layer devices (2-0 to 2-M); an output controller (5′) for controlling the cell buffer (4) to output an ATM cell to be transmitted through one of the normal PHY layer devices (2-0 to 2-M) into corresponding one of the FIFO memories (5-0 to 5-M) on condition that the ATM cell is stored in the cell buffer (4) and the corresponding one of the FIFO memories (5-0 to 5-M) is not full; and a cell transmission controller (10) for performing polling of the normal PHY layer devices (2-0 to 2-M), designating a selected PHY layer device among the normal PHY layer devices (2-0 to 2-M) which have returned the HIGH level of the cell transmission allowance signal (TxClav) to the polling and wher
    Type: Grant
    Filed: December 11, 1998
    Date of Patent: October 23, 2001
    Assignee: NEC Corporation
    Inventors: Nobuyuki Mizukoshi, Hideo Ishida, Noboru Sato
  • Patent number: 6266324
    Abstract: In an ATM device comprising a switch core 11, a port shaping unit 25 is arranged within the switch core 11 to carry out a port shaping operation. The port shaping unit 25 controls reading timing of each cell stored in a shared buffer 10. Therefore, a delay to absorb the CDV is decided by the reading timing and the port shaping operation is achieved within the ATM device without attaching any additional memories to the ATM device.
    Type: Grant
    Filed: April 22, 1998
    Date of Patent: July 24, 2001
    Assignee: NEC Corporation
    Inventors: Kiyoshi Kirino, Nobuyuki Mizukoshi, Hideo Ishida
  • Patent number: 6155121
    Abstract: A V-belt is mounted on a first fixed conical plate and second fixed conical plate of a lower unit, and an upper unit is made to descend. A first movable conical plate and second movable conical plate are installed in the upper unit, and the V-belt is gripped between the fixed conical plates and movable conical plates. When a rotary actuator of the lower unit draws a drawbar which extends below the movable conical plate downwards, a predetermined pressure is applied to the V-belt. The first movable conical plate and first fixed conical plate are rotated in this state to drive the V-belt, and a noise test is performed.
    Type: Grant
    Filed: December 7, 1998
    Date of Patent: December 5, 2000
    Assignees: Nissan Motor Co., Ltd., Fujigiken Kogyo Co., Ltd.
    Inventors: Hideo Ishida, Kimio Izawa
  • Patent number: 6141729
    Abstract: A data transfer system comprises a plurality of terminals; a plurality of high-speed data transfer units connected to the terminals through a network, each data transfer unit comprising a plurality of storage devices and a storage device group control device or unit for controlling readout of data from the storage devices, and dividing and storing data requested by the terminals; a virtual storage device group controlling device or unit for controlling readout of data from virtual storage device groups, each virtual storage device group being constructed by selecting a storage device from each high-speed data transfer unit; and an instruction conversion unit or device for receiving a data readout instruction on the basis of data requests output from the terminals, which instruction is given to the virtual storage device groups, from the virtual storage device group control unit or device, and converting the instruction into a data readout instruction to the storage devices from the storage device group contro
    Type: Grant
    Filed: September 23, 1996
    Date of Patent: October 31, 2000
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hideo Ishida, Toshiyuki Ochiai, Yutaka Tanaka, Teruto Hirota, Akihiko Wada, Eiichi Toyonaga, Kunihiko Sakoda
  • Patent number: 6079278
    Abstract: Slackness of a ball spline joint which engages a first member of a circular shape and a second member fitted outside of the first member is measured by measuring a displacement of a first measurement point (P1) and a second measurement point (P2). The measurement points are set on the radial line passing through the center of the first member and the center of the spline groove. Using the distances (R1, R2) between the center of the first member and the measurement points (P1, P2), and the displacement amount (A1, A2) of the measurement points (P1, P2) under a predetermined relative torque, the slackness of the joint is calculated. By arranging the measurement points (P1, P2) on either side of the center of the first member, the effect of measurement error in the displacement amount (A1, A2) on the calculation is reduced.
    Type: Grant
    Filed: October 27, 1998
    Date of Patent: June 27, 2000
    Assignee: Nissan Motor Co., Ltd.
    Inventor: Hideo Ishida
  • Patent number: 6070201
    Abstract: A memory control device having a plurality of data transfer paths including a storage device group comprising a plurality of storage devices for storing data and a buffer memory group comprising multiple buffer memories for storing transferred data, dividing files into multiple blocks for storing blocks in multiple storage devices on different data transfer paths, and executing control to read data from the storage device to be output with a request from a connected terminal to the buffer memory wherein storage devices on different paths create multiple virtual storage device groups, and buffer memories create virtual buffer memory groups. The memory control device comprises a data output control for executing control in a first cycle, the data being temporarily dividedly stored in a prescribed virtual storage device group.
    Type: Grant
    Filed: September 25, 1997
    Date of Patent: May 30, 2000
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Yutaka Tanaka, Keiji Okamoto, Hideo Ishida
  • Patent number: 6029189
    Abstract: In a data transfer system in which when a first to fourth terminals require reading data, the data are read out of a first to fourth storages to be stored in a first and second buffer memories while a first and second virtual groups of storages are alternately switched every constant cycle, and thereafter a first and second data sending units send the data stored in the first and second buffer memories to the terminals; on the other hand, when the first to fourth terminals require writing data, received data is divided in a way to distribute the process loads of data read and data write of the divided data equally into a first and second data transfer units. At the same time, the data are stored in the first and second buffer memories of the first and second data transfer units, and thereafter the data are written into the first to fourth storages while switching the first and second virtual groups of storages alternately.
    Type: Grant
    Filed: December 8, 1997
    Date of Patent: February 22, 2000
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hideo Ishida, Yutaka Tanaka
  • Patent number: 5937085
    Abstract: An image processing apparatus includes a color difference data interpolator for alternately calculating the interpolation data items of color difference signals Cb and Cr in a time-sharing process. The interpolator includes registers for storing therein data items sb and sr of input color difference data items ICb and ICr, selectors for selecting either one of the data items ICb, sb, ICr, and sr and respectively outputting data items t1 and t2, an internal ratio calculating section for receiving the data items t1 and t2 to conduct an operation of (3.times.t1+t2) and outputting internal ratio data D, and registers for storing color difference Cb data B supplied from the data D. Consequently, an image processing circuit for the interpolation to enlarge the picture size of video data in the compressed YCbCr data format is reduced in the hardware size.
    Type: Grant
    Filed: September 13, 1996
    Date of Patent: August 10, 1999
    Assignee: NEC Corporation
    Inventor: Hideo Ishida
  • Patent number: 5671022
    Abstract: An image processing system and method capable of reducing hardware scale to improve processing speed. The G conversion section includes a third product producer for producing a third product from a first intermediate product corresponding to a first common partial bit string of multipliers of a color difference Cr for R and G conversions, and a fourth product producer for producing a fourth product from a second intermediate product corresponding to a second common partial bit string of multipliers of a color difference Cb for B and G conversions, and intermediate calculation data of a fixed factor multiplication of the color difference Cr for the R data conversion and intermediate calculation data of a fixed factor multiplication of the color difference Cb for the B data conversion are utilized for the conversion calculation of the data G.
    Type: Grant
    Filed: August 15, 1996
    Date of Patent: September 23, 1997
    Assignee: NEC Corporation
    Inventor: Hideo Ishida
  • Patent number: 5664323
    Abstract: Producing vehicles by using a plurality of production lines allowing the vehicles to successively pass through a welding step, a coating step and an assembling step in each line, in accordance with an increase or decrease in the number of vehicles to be produced in the respective production lines, some of the vehicles in one of the production lines which has less of a margin for production are transferred, after passing through the welding step, to another production line at a portion between its welding step and coating step which line has more of a margin for production. With this arrangement, when it becomes necessary to increase or decrease the number of vehicles in the lines, it is possible to produce vehicles without changing the production ability in the respective steps after the welding step, only by adjusting the number of vehicles in the welding step of the production line which has a less of a margin for production.
    Type: Grant
    Filed: November 17, 1995
    Date of Patent: September 9, 1997
    Assignee: Honda Giken Kogyo Kabushiki Kaisha
    Inventors: Yoshiki Ishida, Keiichi Samekawa, Kenichi Katayama, Yoshifumi Matsumoto, Hideo Ishida, Koichi Kimura
  • Patent number: 5575053
    Abstract: In producing vehicles by using a plurality of production lines allowing the vehicles to successively pass through a welding step, a coating step and an assembling step, in accordance with an increase or decrease in the production of vehicles in the respective production lines, some of the vehicles in one of the production lines which has less margin for producing vehicles are transferred, after passing through said welding step, to another production line between a welding step and coating step which another production line has more margin for producing vehicles. With this arrangement, when it becomes necessary to increase or decrease the production of vehicles in the respective production lines, it is possible to produce vehicles with high efficiency without changing the production ability in the respective steps after passing through the welding step, only by adjusting the production of vehicles in the welding step in the production line which has less margin for producing vehicles.
    Type: Grant
    Filed: February 23, 1995
    Date of Patent: November 19, 1996
    Assignee: Honda Giken Kogyo Kabushiki Kaisha
    Inventors: Yoshiki Ishida, Keiichi Samekawa, Kenichi Katayama, Yoshifumi Matsumoto, Hideo Ishida, Koichi Kimura
  • Patent number: 5553257
    Abstract: An address generating circuit having a two-dimensional coding table which has respective coded words corresponding to a combination of x and y where the value of event A is determined as x and the value of event B as y (x and y are positive integers) between two events A and B, and stores the coded words in an address corresponding to each combination of x and y; coincidence detectors which input the values x and y of the events A and B and detect whether these values coincide with the integer of 1 to S (S is the maximum number among the integers satisfying S+log.sub.2 S<P and P is a positive integer); comparators which examine whether the inputted y satisfies x+log.sub.2 y.ltoreq.P for each integral number of x, and examine whether the inputted x satisfies y+log.sub.2 x.ltoreq.
    Type: Grant
    Filed: February 1, 1994
    Date of Patent: September 3, 1996
    Assignee: NEC Corporation
    Inventors: Hideo Ishida, Yasushi Ooi