Patents by Inventor Hideo Takamizawa

Hideo Takamizawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4766671
    Abstract: A method of manufacturing a ceramic electronic device includes the steps of: forming a pattern of a predetermined shape made of a photosensitive resin; forming an electrical circuit element on a ceramic green sheet; stacking and pressing the pattern, the ceramic green sheet having the electrical circuit element thereon, and at least one ceramic green sheet to prepare a laminated body; and sintering the laminated body. A ceramic electronic device integrally including a cavity and the electrical circuit element therein is manufactured by this method.
    Type: Grant
    Filed: October 24, 1986
    Date of Patent: August 30, 1988
    Assignee: NEC Corporation
    Inventors: Kazuaki Utsumi, Hideo Takamizawa, Mitsuo Tsuzuki, Michihisa Suga, Sadayuki Takahashi
  • Patent number: 4650777
    Abstract: Aluminum nitride ceramics is prepared by mixing acetylide of calcium, strontium, barium or other material with raw aluminum nitride powder with a content between 0.02 and 10 wt %, forming the mixture into a predetermined shape and sintering the formed body in a non-oxidizing atmosphere such as nitrogen gas by pressureless and/or pressure sintering technique.
    Type: Grant
    Filed: January 22, 1985
    Date of Patent: March 17, 1987
    Assignee: NEC Corporation
    Inventors: Yasuhiro Kurokawa, Kazuaki Utsumi, Hideo Takamizawa
  • Patent number: 4536435
    Abstract: A multilayer glass-ceramic substrate comprises insulator layers of a composition consisting essentially of, when components are expressed as oxides in percent by weight, 40-60 percent of aluminum oxide, 1-40 percent of lead oxide, 1-30 percent of boron oxide, 2-40 percent of silicon dioxide, 0.01-25 percent of at least one oxide of chemical element(s) of Group II of the periodic table, and 0.01-10 percent of at least one oxide of Group IV element(s) except carbon, silicon, and lead. Each insulator layer may be only from 190 microns down to 10 microns thick. The substrate has a flexural strength of 2,100 kg/cm.sup.2 or more. Preferably, the Group II element(s) is magnesium, calcium, strontium, barium, and/or zinc. The Group IV element(s) is zirconium, titanium, germanium, and/or tin. When the percentages are 40-60 for aluminum oxide, 4.1-16.6 for lead oxide, 1.0-10.0 for boron oxide, 14.0-39.1 for silicon dioxide, 0.1-4.8 for magnesium oxide, 2.0-10.0 for calcium oxide, 0.05-3.0 for barium oxide, 0.01-3.
    Type: Grant
    Filed: October 14, 1982
    Date of Patent: August 20, 1985
    Assignee: Nippon Electric Co., Ltd.
    Inventors: Kazuaki Utsumi, Yuzo Shimada, Masanori Suzuki, Hideo Takamizawa
  • Patent number: 4353047
    Abstract: The present invention provides a dielectric material adapted for microwave integrated circuits (MIC) and an electric circuit making use of said dielectric material. More particularly, an oxide dielectric material principally consisting of (1-x)BaO.xTiO.sub.2 (0.7.ltoreq.x.ltoreq.0.95) and containing both 0.007 to 0.7 weight % of manganese and 0.037 to 3.7 weight % of zirconium, has a large dielectric constant, a small dielectric loss and a small temperature coefficient of dielectric constant and is uniform over a broad range, and especially it is possible to easily manufacture a substrate having a uniform dielectric constant and a uniform dielectric loss. Transistors and MIC's employing such substrates can attain uniform and excellent high-frequency characteristics.
    Type: Grant
    Filed: April 28, 1981
    Date of Patent: October 5, 1982
    Assignee: Nippon Electric Co., Ltd.
    Inventors: Tsutomu Noguchi, Yuji Kajiwara, Masanori Suzuki, Hideo Takamizawa
  • Patent number: 4037168
    Abstract: As an input and/or an output matching circuit for a transistor, a transistorized high-frequency power amplifier comprises at least one pattern of a conductive material on a sheet of a ferroelectric material placed on a conductive base plate in direct contact therewith. The ferroelectric material is represented by the formula:(1 - x) BaO.xTiO.sub.2,where 0.7 .ltoreq. x < 1.0. Preferably, x .ltoreq. 0.95. The pattern may be in direct contact with the ferroelectric sheet to form a capacitor together with the base plate, a quarter-wavelength impedance transformer, or both. Preferably, the pattern is formed by integrated circuit techniques. An inductor may preferably be provided either by a portion of the pattern with a conventional dielectric material substituted for the ferroelectric material at that part of the sheet which is below the pattern portion or by a chip inductor.
    Type: Grant
    Filed: September 9, 1976
    Date of Patent: July 19, 1977
    Assignee: Nippon Electric Company Limited
    Inventors: Hidehiko Katoh, Yuji Kajiwara, Hideo Takamizawa