Patents by Inventor Hideo Yamazaki

Hideo Yamazaki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240116759
    Abstract: Provided is a method for producing a positive electrode active material for an alkali ion secondary battery, the positive electrode active material containing a large amount of a transition metal and enabling operation of the battery. In the method for producing a positive electrode active material for an alkali ion secondary battery, in which the positive electrode active material contains 34 mol % or more of CrO+FeO+MnO+CoO+NiO, the method includes: a step of preparing a positive electrode active material precursor containing crystals; and a step of irradiating the positive electrode active material precursor with light to melt the crystals and amorphize at least a portion of the positive electrode active material precursor.
    Type: Application
    Filed: February 3, 2022
    Publication date: April 11, 2024
    Inventors: Tsuyoshi HONMA, Masafumi HIRATSUKA, Hideo YAMAUCHI, Ayumu TANAKA, Kei TSUNODA, Yoshinori YAMAZAKI
  • Patent number: 11929461
    Abstract: The present invention provides an electrolytic solution capable of providing an electrochemical device, such as a lithium ion secondary battery, or a module that has excellent high-temperature storage performance. The electrolytic solution contains: a homocyclic compound other than aromatic compounds; and a cyclic dicarbonyl compound. The homocyclic compound contains at least one group selected from the group consisting of a nitrile group and an isocyanate group.
    Type: Grant
    Filed: April 5, 2017
    Date of Patent: March 12, 2024
    Assignee: DAIKIN INDUSTRIES, LTD.
    Inventors: Kenzou Takahashi, Shinichi Kinoshita, Hideo Sakata, Shigeaki Yamazaki, Hiroyuki Arima
  • Publication number: 20140336312
    Abstract: The invention relates to mixtures, comprising (a) an oligomeric compound, comprising repeat units of the general formula (I) or acid-addition salts thereof and/or (b) a compound of the general formula (II) or acid-addition salts thereof and (c) at least one compound of the general formula (III) and (d) optionally further additives, and also to the use of these mixtures for the stabilization of non-living organic materials with respect to exposure to light, oxygen, and/or heat. The invention further relates to non-living organic materials, comprising at least one of these mixtures, and to articles produced therefrom. The invention further relates to a process for the stabilization of non-living organic materials, with respect to exposure to light, oxygen, and/or heat.
    Type: Application
    Filed: July 24, 2014
    Publication date: November 13, 2014
    Applicant: BASF SE
    Inventors: Simon Schambony, Hideo Yamazaki, Greg Coughlin
  • Patent number: 8822575
    Abstract: The invention relates to mixtures, comprising (a) an oligomeric compound, comprising repeat units of the general formula (I) or acid-addition salts thereof and/or (b) a compound of the general formula (II) or acid-addition salts thereof and (c) at least one compound of the general formula (III) and (d) optionally further additives, and also to the use of these mixtures for the stabilization of non-living organic materials with respect to exposure to light, oxygen, and/or heat. The invention further relates to non-living organic materials, comprising at least one of these mixtures, and to articles produced therefrom. The invention further relates to a process for the stabilization of non-living organic materials, with respect to exposure to light, oxygen, and/or heat.
    Type: Grant
    Filed: August 1, 2008
    Date of Patent: September 2, 2014
    Assignee: BASF SE
    Inventors: Simon Schambony, Hideo Yamazaki, Greg Coughlin
  • Publication number: 20110130493
    Abstract: The invention relates to mixtures, comprising (a) an oligomeric compound, comprising repeat units of the general formula (I) or acid-addition salts thereof and/or (b) a compound of the general formula (II) or acid-addition salts thereof and (c) at least one compound of the general formula (III) and (d) optionally further additives, and also to the use of these mixtures for the stabilization of non-living organic materials with respect to exposure to light, oxygen, and/or heat. The invention further relates to non-living organic materials, comprising at least one of these mixtures, and to articles produced therefrom. The invention further relates to a process for the stabilization of non-living organic materials, with respect to exposure to light, oxygen, and/or heat.
    Type: Application
    Filed: August 1, 2008
    Publication date: June 2, 2011
    Applicant: BASF SE
    Inventors: Simon Schambony, Hideo Yamazaki, Greg Coughlin
  • Publication number: 20090008133
    Abstract: Provided are patterned circuits with accurately aligned raised features. Also provided are methods for making the circuits using photoresist-on-photoresist patterning.
    Type: Application
    Filed: December 27, 2004
    Publication date: January 8, 2009
    Inventors: Jeffrey W. Bullard, Dennis M. Brunner, Paul M. Harvey, Hideo Yamazaki, Hiroki Satoh, Hisayuki Nagai
  • Publication number: 20080210661
    Abstract: There is provided a method for forming a via hole (2) in a substrate (10) for a flexible printed circuit board, the method being capable of simply forming a via hole having an excellent circularness of an opening portion and high reliability. In a method for forming a via hole in a substrate for a flexible printed circuit board, the method includes the steps: forming a first thin film layer (11) containing metal or alloy and having a thickness of less than 2 ?m on one surface (15) of a substrate, disposing a second thin film layer (12) over the first thin film layer (11), selectively removing a portion, corresponding to a region where the via hole (2) is formed, of the second thin film layer (12), etching the first thin film layer (11), and subjecting the substrate (10) to chemical milling to form the via hole (2).
    Type: Application
    Filed: May 23, 2006
    Publication date: September 4, 2008
    Inventors: Kazuo Satoh, Hideo Yamazaki
  • Publication number: 20080196822
    Abstract: There is provided a means for laminating and bonding a flexible printed circuit and a stiffener film with an adhesive layer therebetween by using a laminator without creating air bubbles at the lamination surface and without using large-scale manufacturing equipment. A method comprising: providing a laminate in which liners are on upper and lower surfaces of a half-cured reactive adhesive layer (3), removing one of the liners from the laminate, and bonding a surface of a first adherend (2) to the first exposed surface of the adhesive layer; removing the other liner from the laminate, pressure bonding a minute embossing pattern (4) surface of an embossed liner to the second exposed surface of the adhesive layer to form a minute embossing pattern on the surface of the adhesive layer; and removing the embossed liner from the surface of the adhesive layer, and thermocompression bonding a second adherend to the surface of the adhesive layer having the minute embossing pattern.
    Type: Application
    Filed: August 8, 2006
    Publication date: August 21, 2008
    Inventors: Kazuo Satoh, Haruyuki Mikami, Hideo Yamazaki
  • Publication number: 20080110665
    Abstract: To provide a PCB that does not generate a short-circuit problem even at a very small pitch and has high connection reliability a method is provided for connecting a printed circuit board (PCB) to a second circuit board comprising: providing a printed circuit board (PCB) having a connection portion; providing a second circuit board having a connection portion, the second circuit board to be connected to the PCB, wherein the connection portion of one or both of the PCB and second circuit board has at least one conductive bump, positioning the connection portion of the PCB opposite the connection portion of the second circuit board with a thermosetting adhesive film between the connection portions of the PCB and second circuit board, and applying heat and pressure to the connection portions and the thermosetting adhesive film such that the adhesive film is displaced sufficiently to allow electrical contact between the at least one bump and the connection portion of the opposing circuit board and such that the he
    Type: Application
    Filed: January 24, 2006
    Publication date: May 15, 2008
    Inventors: Kazuo Satoh, Hideo Yamazaki
  • Patent number: 7364666
    Abstract: Disclosed is a method for making flexible circuits in which portions of a tie layer are removed by etching the underlying polymer. Also disclosed are flexible circuits made by this method.
    Type: Grant
    Filed: December 6, 2005
    Date of Patent: April 29, 2008
    Assignee: 3M Innovative Properties Company
    Inventors: Sridhar V. Dasaratha, James S. McHattie, James R. Shirck, Hideo Yamazaki, Yuji Hiroshige, Makoto Sekiguchi
  • Publication number: 20070246158
    Abstract: The present invention provides a wiring board capable of realizing electrical connectivity even with connection leads having a fine pitch of 100 ?m or less. The present invention relates to a wiring board with adhesive film comprising: a wiring board, in which the surface of a connection terminal portion on the end of a connection lead on the wiring board has a non-flat shape formed by a plating method; and, an adhesive film that covers the surface of the connection terminal portion and contains either a thermoplastic resin or a thermoplastic, thermosetting resin.
    Type: Application
    Filed: April 21, 2006
    Publication date: October 25, 2007
    Inventors: Hideo Yamazaki, Yoshiyuki Ohkura, Nathan Kreutter, Shoji Takeuchi
  • Publication number: 20070023877
    Abstract: To provide a chip on flex (COF) tape having an improved precision of cumulative pitches while retaining bending properties. [Means to Solve the Problems] A chip on flex (COF) tape having a wiring pattern comprising a plurality of wirings arranged in parallel formed on the surface of a flexible insulating film, wherein a dimension retention pattern is formed on said surface of said flexible insulating film and/or the surface of the side of the film opposite thereto so as to cross the width direction of at least two of said wirings arranged in parallel in the vicinity of the connecting portion of said wiring pattern with a semiconductor chip and/or the connecting portion with an external device.
    Type: Application
    Filed: August 3, 2004
    Publication date: February 1, 2007
    Inventor: Hideo Yamazaki
  • Publication number: 20060131700
    Abstract: The present invention includes an electronic-circuit article that has a substrate, a plasma deposited layer disposed on the substrate, where the plasma deposited layer comprises at least about 10.0 atomic percent, and a patterned conductive layer disposed above the plasma deposited layer.
    Type: Application
    Filed: December 22, 2004
    Publication date: June 22, 2006
    Inventors: Moses David, Catharine Shay, Badri Veeraraghavan, Hideo Yamazaki, James Shirck
  • Publication number: 20060134914
    Abstract: Disclosed is a method for making flexible circuits in which portions of a tie layer are removed by etching the underlying polymer. Also disclosed are flexible circuits made by this method.
    Type: Application
    Filed: December 6, 2005
    Publication date: June 22, 2006
    Inventors: Sridhar Dasaratha, James McHattie, James Shirck, Hideo Yamazaki, Yuji Hiroshige, Makoto Sekiguchi
  • Patent number: 6864577
    Abstract: A circuit includes a substrate having a dielectric layer with a first surface and a second surface. A conductive layer is formed on the first surface. A beveled via is formed in a dielectric layer of the substrate. The via has a first opening of a first width in the first surface, and a second opening of a second width in the second surface, the second width being greater than the first width. A conductive plug is connected to the conductive layer. The plug is formed in the via and extends from adjacent the first opening toward the second opening, and terminates adjacent the second opening at a plug interface surface. A conductive solder ball is connected to the plug interface surface and extends to protrude from the second surface.
    Type: Grant
    Filed: April 26, 2002
    Date of Patent: March 8, 2005
    Assignee: 3M Innovative Properties Company
    Inventors: William J. Clatanoff, Gayle R. T. Schueller, Robert J. Schubert, Yusuke Saito, Hideo Yamazaki, Hideaki Yasui
  • Patent number: 6648953
    Abstract: The present invention provides an ink composition for an ink jet recording process, which exhibits excellent print quality with good water fastness and light fastness and without flying in deflected directions from the ink head or nozzle fill-in even after a prolonged ink jet printing. The ink comprises (1) a carbon black, (2) an organic pigment, (3) a dispersant incorporated in an aqueous medium and (4) a saccharide.
    Type: Grant
    Filed: April 26, 2001
    Date of Patent: November 18, 2003
    Assignee: Seiko Epson Corporation
    Inventors: Hideo Yamazaki, Michinari Tsukahara, Hiroto Nakamura, Hidehiko Komatsu
  • Publication number: 20020113312
    Abstract: A circuit includes a substrate having a dielectric layer with a first surface and a second surface. A conductive layer is formed on the first surface. A beveled via is formed in a dielectric layer of the substrate. The via has a first opening of a first width in the first surface, and a second opening of a second width in the second surface, the second width being greater than the first width. A conductive plug is connected to the conductive layer. The plug is formed in the via and extends from adjacent the first opening toward the second opening, and terminates adjacent the second opening at a plug interface surface. A conductive solder ball is connected to the plug interface surface and extends to protrude from the second surface.
    Type: Application
    Filed: April 26, 2002
    Publication date: August 22, 2002
    Applicant: 3M Innovative Properties Company
    Inventors: William J. Clatanoff, Gayle R.T. Schueller, Robert J. Schubert, Yusuke Saito, Hideo Yamazaki, Hideaki Yasui
  • Patent number: 6400018
    Abstract: A circuit includes a substrate having a dielectric layer with a first surface and a second surface. A conductive layer is formed on the first surface. A beveled via is formed in a dielectric layer of the substrate. The via has a first opening of a first width in the first surface, and a second opening of a second width in the second surface, the second width being greater than the first width. A conductive plug is connected to the conductive layer. The plug is formed in the via and extends from adjacent the first opening toward the second opening, and terminates adjacent the second opening at a plug interface surface. A conductive solder ball is connected to the plug interface surface and extends to protrude from the second surface.
    Type: Grant
    Filed: August 27, 1998
    Date of Patent: June 4, 2002
    Assignee: 3M Innovative Properties Company
    Inventors: William J. Clatanoff, Gayle R. T. Schueller, Robert J. Schubert, Yusuke Saito, Hideo Yamazaki, Hideaki Yasui
  • Publication number: 20020017219
    Abstract: The present invention provides an ink composition for an ink jet recording process, which exhibits excellent print quality with good water fastness and light fastness and without flying in deflected directions from the ink head or nozzle fill-in even after a prolonged ink jet printing. The ink comprises (1) a carbon black, (2) an organic pigment, (3) a dispersant incorporated in an aqueous medium and (4) a saccharide.
    Type: Application
    Filed: April 26, 2001
    Publication date: February 14, 2002
    Inventors: Hideo Yamazaki, Michinari Tsukahara, Hiroto Nakamura, Hidehiko Komatsu
  • Publication number: 20010045611
    Abstract: A circuit includes a substrate having a dielectric layer with a first surface and a second surface. A conductive layer is formed on the first surface. A beveled via is formed in a dielectric layer of the substrate. The via has a first opening of a first width in the first surface, and a second opening of a second width in the second surface, the second width being greater than the first width. A conductive plug is connected to the conductive layer. The plug is formed in the via and extends from adjacent the first opening toward the second opening, and terminates adjacent the second opening at a plug interface surface. A conductive solder ball is connected to the plug interface surface and extends to protrude from the second surface.
    Type: Application
    Filed: August 27, 1998
    Publication date: November 29, 2001
    Applicant: 3M Innovative Properties Company
    Inventors: WILLIAM J. CLATANOFF, GAYLE R.T SCHUELLER, ROBERT J. SCHUBERT, YUSUKE SAITO, HIDEO YAMAZAKI, HIDEAKI YASUI