Patents by Inventor Hidetaka Ohazama

Hidetaka Ohazama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220418058
    Abstract: A first electronic component (10) includes a terminal (142) and a substrate (100). The substrate (100) includes the terminal (142). At least a portion of a second electronic component (20) overlaps the terminal (142) of the first electronic component (10). A resin film (300) electrically connects the terminal (142) of the first electronic component (10) and the second electronic component (20). The resin film (300) includes a first portion (310) and a second portion (320). The first portion (310) of the resin film (300) overlaps the terminal (142) and the second electronic component (20) when viewed from a predetermined direction (D). The second portion (320) of the resin film (300) does not overlap the substrate (100) or the terminal (142), and overlaps the second electronic component (20) when viewed from the predetermined direction (D).
    Type: Application
    Filed: February 8, 2021
    Publication date: December 29, 2022
    Inventor: Hidetaka OHAZAMA
  • Patent number: 10707428
    Abstract: A light-emitting unit (140) is formed on one surface (101) of a substrate (100). Further, the light-emitting unit (140) includes a first electrode (110), an organic layer (120), and a second electrode (130). A covering member (180) covers the light-emitting unit (140). An integrated circuit (300) is arranged on the one surface (101) of the substrate (100). In addition, the integrated circuit (300) is electrically connected to at least one of the first electrode (110) and the second electrode (130). A protective member (400) is located in a region (105) between the covering member (180) and the integrated circuit (300). Further, the protective member (400) is provided so as to expose the entirety of a first surface (301) of the integrated circuit (300) on a side opposite to the substrate (100).
    Type: Grant
    Filed: March 23, 2016
    Date of Patent: July 7, 2020
    Assignees: PIONEER CORPORATION, TOHOKU PIONEER CORPORATION
    Inventor: Hidetaka Ohazama
  • Publication number: 20190097146
    Abstract: A light-emitting unit (140) is formed on one surface (101) of a substrate (100). Further, the light-emitting unit (140) includes a first electrode (110), an organic layer (120), and a second electrode (130). A covering member (180) covers the light-emitting unit (140). An integrated circuit (300) is arranged on the one surface (101) of the substrate (100). In addition, the integrated circuit (300) is electrically connected to at least one of the first electrode (110) and the second electrode (130). A protective member (400) is located in a region (105) between the covering member (180) and the integrated circuit (300). Further, the protective member (400) is provided so as to expose the entirety of a first surface (301) of the integrated circuit (300) on a side opposite to the substrate (100).
    Type: Application
    Filed: March 23, 2016
    Publication date: March 28, 2019
    Inventor: Hidetaka OHAZAMA
  • Patent number: 9722213
    Abstract: When a coating film 4 is formed on a substrate 1, on which elements 3 are formed, by an ALD film forming method or the like, the coating film 4 is partially removed in a simple step. A method for manufacturing an electronic device includes a step of coating the substrate 1 partially with a partially coating member 2, a step of forming the elements 3 on the substrate 1, a step of forming the coating film 4 on the substrate 1 to cover the elements 3 and the partially coating member 2, and a step of forming a crack 4A in the coating film 4 on the partially coating member 2.
    Type: Grant
    Filed: March 27, 2012
    Date of Patent: August 1, 2017
    Assignees: PIONEER CORPORATION, TOHOKU PIONEER CORPORATION
    Inventors: Jun Sugahara, Hidetaka Ohazama, Shinsuke Tanaka, Hiromu Nara, Hiroki Tan
  • Patent number: 9705105
    Abstract: An electrical component (40) and a substrate (100) constitute at least a portion of an electrical device. At least one surface of the substrate (100) is formed of an insulator. A conductor (20) is formed on the one surface. The conductor (20) is covered with a sealing film (210). The sealing film (210) is a film having insulation properties. An opening (212) is formed in the sealing film (210). The opening (212) is located on a portion of the conductor (20) when seen in a plan view. The conductor (20) is connected to the electrical component (40) with an anisotropic conductive film (30) interposed therebetween. The anisotropic conductive film (30) overlaps the opening (212), and contains a plurality of metal particles.
    Type: Grant
    Filed: April 1, 2013
    Date of Patent: July 11, 2017
    Assignees: PIONEER CORPORATION, TOHOKU PIONEER CORPORATION
    Inventor: Hidetaka Ohazama
  • Publication number: 20170012239
    Abstract: A light emitting element (102) is formed on a substrate (100), and includes an organic layer (120). Terminals (112 and 132) are formed on the substrate (100), and are connected to the light emitting element (102). A protective film (140) covers the light emitting element (102) and the terminals (112 and 132). An intermediate layer (150) is provided between the terminal (112) and the protective film (140) and between the terminal (132) and the protective film (140). For example, the glass transition temperature or phase transition temperature of the intermediate layer (150) is lower than the glass transition temperature or phase transition temperature of the protective film (140).
    Type: Application
    Filed: January 21, 2014
    Publication date: January 12, 2017
    Inventors: Makoto HOSHINA, Shinsuke TANAKA, Hidetaka OHAZAMA, Shinji NAKAJIMA
  • Publication number: 20160056405
    Abstract: An electrical component (40) and a substrate (100) constitute at least a portion of an electrical device. At least one surface of the substrate (100) is formed of an insulator. A conductor (20) is formed on the one surface. The conductor (20) is covered with a sealing film (210). The sealing film (210) is a film having insulation properties. An opening (212) is formed in the sealing film (210). The opening (212) is located on a portion of the conductor (20) when seen in a plan view. The conductor (20) is connected to the electrical component (40) with an anisotropic conductive film (30) interposed therebetween. The anisotropic conductive film (30) overlaps the opening (212), and contains a plurality of metal particles.
    Type: Application
    Filed: April 1, 2013
    Publication date: February 25, 2016
    Inventor: Hidetaka OHAZAMA
  • Publication number: 20150076463
    Abstract: In an organic EL device, a risk of a short circuit between adjacent terminals in a connection space on a substrate can be reduced. An organic EL device includes a substrate, one or a plurality of organic EL elements formed on the substrate, a plurality of connection terminals provided on the substrate and electrically connected to electrodes of the organic EL elements, an insulating cover layer that covers the connection terminals and the substrate between the connection terminals, and a mounted component mounted via an anisotropic conducive layer and including terminals to be connected electrically connected to the connection terminals. The anisotropic conductive layer includes conductive particulates that electrically connect the connection terminals and the terminals to be connected. The conductive particulates electrically connect the connection terminals and the terminals to be connected piercing through the cover layer.
    Type: Application
    Filed: March 1, 2012
    Publication date: March 19, 2015
    Applicants: Tohoku Pioneer Corporation, Pioneer Corporation
    Inventor: Hidetaka Ohazama
  • Patent number: 8853935
    Abstract: An organic EL module includes an element substrate on which at least one organic EL element is formed, a first terminal provided on the element substrate and is drawn out from the electrode of the at least one organic EL element, a second terminal facing the first terminal and provided on a circuit substrate, and a pole that electrically connects the first terminal with the second terminal through a through-hole of the circuit substrate.
    Type: Grant
    Filed: July 18, 2012
    Date of Patent: October 7, 2014
    Assignees: Pioneer Corporation, Tohoku Pioneer Corporation
    Inventor: Hidetaka Ohazama
  • Publication number: 20130020935
    Abstract: An organic EL module 1 includes an element substrate 10 on which a one or a plurality of organic EL elements 1U are formed, a first terminal 11 which is provided on the element substrate 10 and is drawn out from the electrode of the organic EL element 1U, a sealing layer 12 which covers the organic EL element 1U, a circuit substrate 13 which is arranged over the sealing layer 12 at some interval, a second terminal 14 which is provided beneath the circuit substrate 13 and a pole 15 which electrically connects the first terminal 11 with the second terminal 14 while supporting the circuit substrate 13 over the element substrate 10.
    Type: Application
    Filed: July 18, 2012
    Publication date: January 24, 2013
    Applicants: TOHOKU PIONEER CORPORATION, PIONEER CORPORATION
    Inventor: Hidetaka Ohazama
  • Patent number: 7327042
    Abstract: Accumulating spaces for conductive particles are formed in gaps of wiring patterns for conductive wirings which are disposed on a surface of a supporting body. When interconnecting a pair of interconnection objects having the respective wiring patterns via an anisotropic conductive film thereon due to a thermocompression bonding, the conductive particles to be flown-out into the gaps by the thermocompression bonding are allowed to escape into the accumulating spaces, so that an over-density of the conductive particles can be prevented to avoid a shortage in the wiring patterns.
    Type: Grant
    Filed: December 4, 2003
    Date of Patent: February 5, 2008
    Assignee: Tohoku Pioneer Corporation
    Inventor: Hidetaka Ohazama
  • Patent number: 7236624
    Abstract: In the neighborhood of each connecting region of a panel substrate, tape automated bonding (TAB) substrates, and a flexible substrate, marks for a visual inspection are provided at a preset distance apart from the connecting region. According to the present marks, inferior products are eliminated with a high rate of accuracy upon visual inspection after completing a connection of display panel.
    Type: Grant
    Filed: August 29, 2002
    Date of Patent: June 26, 2007
    Assignee: Tohoku Pioneer Corporation
    Inventor: Hidetaka Ohazama
  • Patent number: 7193157
    Abstract: A flexible circuit board is provided to prevent unsuccessful interconnection between the wirings of the flexible circuit board and the output terminals of a semiconductor chip, the flexible circuit board having a plurality of sections of wirings of different sizes, each section including a pattern of wirings of the same size. The flexible circuit board has predetermined patterns of wirings on an insulating material base, and the wirings are electrically connected to the output terminals of a semiconductor chip. A pattern of the wirings of the same size forms a first wiring section, while another pattern of the wirings of the same size form a second wiring section. The flexible circuit board is provided with a pattern transition region between the neighboring wiring sections with wirings of different sizes to avoid unsuccessful interconnection which would be otherwise caused by the difference in size between the wirings.
    Type: Grant
    Filed: July 30, 2004
    Date of Patent: March 20, 2007
    Assignee: Tohoku Pioneer Corporation
    Inventors: Atsusi Matsuda, Hidetaka Ohazama
  • Patent number: 6937004
    Abstract: A test mark is provided, for use in an inspection after a display panel, TAB tapes, and a flexible board have been connected together. Defective panels can be rejected with high accuracy in the simple inspection, thereby mitigating the burden on the microscopic inspection. At a predetermined distance from each of connection areas for connecting a panel substrate, TAB tapes, and a flexible board, there are provided test marks with at least one on each component. The electrical connection is tested between each pair of the test marks to thereby determine whether the interconnection is in a good state.
    Type: Grant
    Filed: October 4, 2002
    Date of Patent: August 30, 2005
    Assignee: Tohoku Pioneer Corporation
    Inventor: Hidetaka Ohazama
  • Publication number: 20050039945
    Abstract: A flexible circuit board is provided to prevent unsuccessful interconnection between the wirings of the flexible circuit board and the output terminals of a semiconductor chip, the flexible circuit board having a plurality of sections of wirings of different sizes, each section including a pattern of wirings of the same size. The flexible circuit board has predetermined patterns of wirings on an insulating material base, and the wirings are electrically connected to the output terminals of a semiconductor chip. A pattern of the wirings of the same size forms a first wiring section, while another pattern of the wirings of the same size form a second wiring section. The flexible circuit board is provided with a pattern transition region between the neighboring wiring sections with wirings of different sizes to avoid unsuccessful interconnection which would be otherwise caused by the difference in size between the wirings.
    Type: Application
    Filed: July 30, 2004
    Publication date: February 24, 2005
    Inventors: Atsusi Matsuda, Hidetaka Ohazama
  • Publication number: 20040108132
    Abstract: Accumulating spaces for conductive particles are formed in gaps of wiring patterns for conductive wirings which are disposed on a surface of a supporting body. When interconnecting a pair of interconnection objects having the respective wiring patterns via an anisotropic conductive film thereon due to a thermocompression bonding, the conductive particles to be flown-out into the gaps by the thermocompression bonding are allowed to escape into the accumulating spaces, so that an over-density of the conductive particles can be prevented to avoid a shortage in the wiring patterns.
    Type: Application
    Filed: December 4, 2003
    Publication date: June 10, 2004
    Applicant: Pioneer Corporation
    Inventor: Hidetaka Ohazama
  • Publication number: 20030155908
    Abstract: A test mark is provided, for use in an inspection after a display panel, TAB tapes, and a flexible board have been connected together. Defective panels can be rejected with high accuracy in the simple inspection, thereby mitigating the burden on the microscopic inspection. At a predetermined distance from each of connection areas for connecting a panel substrate, TAB tapes, and a flexible board, there are provided test marks with at least one on each component. The electrical connection is tested between each pair of the test marks to thereby determine whether the interconnection is in a good state.
    Type: Application
    Filed: October 4, 2002
    Publication date: August 21, 2003
    Applicant: Tohoku Pioneer Corporation
    Inventor: Hidetaka Ohazama
  • Publication number: 20030053056
    Abstract: In the neighborhood of each connecting region 11, 12, 13, 14 of a panel substrate, a TAB substrates 2, 3, and a flexible substrate 4, marks 15a-15d, 20a-20d, 30a-30d, 40a-40d for a visual inspection are provided at a preset distance apart from the connecting region. According to the present marks, inferior products can be eliminated with a high accuracy in a step of the visual inspection after completing a connection of display panel. Thus, workload in a step of microscope inspection after the step of the visual inspection can be reduced.
    Type: Application
    Filed: August 29, 2002
    Publication date: March 20, 2003
    Applicant: TOHOKU PIONEER CORPORATION
    Inventor: Hidetaka Ohazama