Patents by Inventor Hideto Hidaka

Hideto Hidaka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11020685
    Abstract: The object is to provide a method for producing an alcohol by applying a multiple-effect method to improve the energy efficiency of the whole process. The object is achieved by a method for producing an alcohol including a concentration step of introducing a water-alcohol mixed solution into a multiple-effect distillation column for concentrating the same; a condensation step of introducing a vapor recovered from the top of the distillation column into a condenser for condensing the same; and a separation step of introducing the water-alcohol mixed solution condensed in the condensation step in a liquid phase into a membrane separation apparatus for separating the water and alcohol in the mixed solution.
    Type: Grant
    Filed: September 13, 2019
    Date of Patent: June 1, 2021
    Assignee: Mitsubishi Chemical Corporation
    Inventors: Hideto Hidaka, Yohei Sato
  • Patent number: 10870084
    Abstract: The invention provides a water-alcohol separation system and a method for water-alcohol separation for producing a high purity alcohol while achieving energy saving as the whole process. Namely, a water-alcohol separation system including plural separation membrane modules connected in series, a vacuum apparatus for reducing a pressure at a permeated side of each of the separation membrane modules, and a condenser for condensing a vapor that has passed through a membrane, in which plural independent vacuum systems reduce the pressure at the permeated side of the membrane of the separation membrane modules.
    Type: Grant
    Filed: September 16, 2019
    Date of Patent: December 22, 2020
    Assignee: Mitsubishi Chemical Corporation
    Inventors: Hideto Hidaka, Yohei Sato
  • Patent number: 10836694
    Abstract: The present invention aims to improve the production capacity of alcohol in a method of producing high concentration alcohol using a distillation column and an adsorption-desorption column. The method is a method of producing high concentration alcohol by dehydration of a water-alcohol mixture, including: a distillation step of introducing a water-alcohol mixture into a distillation column to obtain crude alcohol; and an adsorption-desorption step of introducing a part of the crude alcohol into an adsorption-desorption column to obtain high concentration alcohol; wherein a further part of the crude alcohol is introduced into a dehydration apparatus to obtain high concentration alcohol.
    Type: Grant
    Filed: July 29, 2019
    Date of Patent: November 17, 2020
    Assignee: Mitsubishi Chemical Corporation
    Inventors: Tadafumi Yamamura, Hideto Hidaka, Hiroyuki Kakiuchi
  • Publication number: 20200009507
    Abstract: The invention provides a water-alcohol separation system and a method for water-alcohol separation for producing a high purity alcohol while achieving energy saving as the whole process. Namely, a water-alcohol separation system including plural separation membrane modules connected in series, a vacuum apparatus for reducing a pressure at a permeated side of each of the separation membrane modules, and a condenser for condensing a vapor that has passed through a membrane, in which plural independent vacuum systems reduce the pressure at the permeated side of the membrane of the separation membrane modules.
    Type: Application
    Filed: September 16, 2019
    Publication date: January 9, 2020
    Applicant: Mitsubishi Chemical Corporation
    Inventors: Hideto HIDAKA, Yohei Sato
  • Publication number: 20200001199
    Abstract: The object is to provide a method for producing an alcohol by applying a multiple-effect method to improve the energy efficiency of the whole process. The object is achieved by a method for producing an alcohol including a concentration step of introducing a water-alcohol mixed solution into a multiple-effect distillation column for concentrating the same; a condensation step of introducing a vapor recovered from the top of the distillation column into a condenser for condensing the same; and a separation step of introducing the water-alcohol mixed solution condensed in the condensation step in a liquid phase into a membrane separation apparatus for separating the water and alcohol in the mixed solution.
    Type: Application
    Filed: September 13, 2019
    Publication date: January 2, 2020
    Applicant: Mitsubishi Chemical Corporation
    Inventors: Hideto HIDAKA, Yohei SATO
  • Publication number: 20190352244
    Abstract: The present invention aims to improve the production capacity of alcohol in a method of producing high concentration alcohol using a distillation column and an adsorption-desorption column. The method is a method of producing high concentration alcohol by dehydration of a water-alcohol mixture, including: a distillation step of introducing a water-alcohol mixture into a distillation column to obtain crude alcohol; and an adsorption-desorption step of introducing a part of the crude alcohol into an adsorption-desorption column to obtain high concentration alcohol; wherein a further part of the crude alcohol is introduced into a dehydration apparatus to obtain high concentration alcohol.
    Type: Application
    Filed: July 29, 2019
    Publication date: November 21, 2019
    Applicant: Mitsubishi Chemical Corporation
    Inventors: Tadafumi Yamamura, Hideto Hidaka, Hiroyuki Kakiuchi
  • Patent number: 9388994
    Abstract: The present invention relates to a dehumidification and humidification apparatus for vehicles using an adsorbent which is capable of feeding a dehumidified air for preventing fogging of window glass and a humidified air for improvement in comfortableness, and is simplified in construction thereof and reduced in size thereof. The dehumidification and humidification apparatus for vehicles according to the present invention comprises a casing (1), and a blower (2), an adsorbent module (3) and an air passage switching device (4) which are accommodated in the casing.
    Type: Grant
    Filed: October 17, 2007
    Date of Patent: July 12, 2016
    Assignee: Toyota Jidosha Kabushiki Kaisha
    Inventors: Hideto Hidaka, Hiroyuki Kakiuchi, Toshihiro Tsuemoto, Takanobu Nakaguro
  • Patent number: 8769978
    Abstract: In a dehumidification/humidification device, a blower and an adsorbent module are contained in a casing. In other embodiment, the blower, the adsorbent module, and a flow passage-changing device are contained in the casing. The adsorbent module includes an adsorbing element formed by carrying an adsorbent on a permeable element and a heater directly disposed on the adsorbing element. The state of the electrification of the heater is changed and an air-blowing direction or a flow passage is changed, whereby a dehumidified air is discharged from a first suction/discharge port (or discharge port), and a humidified air is discharged from a second suction/discharge port (or discharge port).
    Type: Grant
    Filed: March 28, 2008
    Date of Patent: July 8, 2014
    Assignee: Toyota Jidosha Kabushiki Kaisha
    Inventors: Takanobu Nakaguro, Toshihiro Tsuemoto, Hiroyuki Kakiuchi, Hideto Hidaka
  • Patent number: 8351253
    Abstract: A tunnel magnetic resistive element forming a magnetic memory cell includes a fixed magnetic layer having a fixed magnetic field of a fixed direction, a free magnetic layer magnetized by an applied magnetic field, and a tunnel barrier that is an insulator film provided between the fixed and free magnetic layers in a tunnel junction region. In the free magnetic layer, a region corresponding to an easy axis region having characteristics desirable as a memory cell is used as the tunnel junction region. A hard axis region having characteristics undesirable as a memory cell is not used as a portion of the tunnel magnetic resistive element.
    Type: Grant
    Filed: July 6, 2011
    Date of Patent: January 8, 2013
    Assignee: Renesas Electronics Corporation
    Inventor: Hideto Hidaka
  • Publication number: 20110260224
    Abstract: A tunnel magnetic resistive element forming a magnetic memory cell includes a fixed magnetic layer having a fixed magnetic field of a fixed direction, a free magnetic layer magnetized by an applied magnetic field, and a tunnel barrier that is an insulator film provided between the fixed and free magnetic layers in a tunnel junction region. In the free magnetic layer, a region corresponding to an easy axis region having characteristics desirable as a memory cell is used as the tunnel junction region. A hard axis region having characteristics undesirable as a memory cell is not used as a portion of the tunnel magnetic resistive element.
    Type: Application
    Filed: July 6, 2011
    Publication date: October 27, 2011
    Applicant: Renesas Electronics Corporation
    Inventor: Hideto HIDAKA
  • Patent number: 8000133
    Abstract: A tunnel magnetic resistive element forming a magnetic memory cell includes a fixed magnetic layer having a fixed magnetic field of a fixed direction, a free magnetic layer magnetized by an applied magnetic field, and a tunnel barrier that is an insulator film provided between the fixed and free magnetic layers in a tunnel junction region. In the free magnetic layer, a region corresponding to an easy axis region having characteristics desirable as a memory cell is used as the tunnel junction region. A hard axis region having characteristics undesirable as a memory cell is not used as a portion of the tunnel magnetic resistive element.
    Type: Grant
    Filed: April 6, 2010
    Date of Patent: August 16, 2011
    Assignee: Renesas Electronics Corporation
    Inventor: Hideto Hidaka
  • Patent number: 7978542
    Abstract: An end of a selected bit line in a selected column is electrically coupled to an end of a corresponding current return line by one of first and second write column select gates, which are selectively turned on in response to results of column selection. A data write circuit sets the other end of the selected bit line and the other end of the current return line to one and the other of a power supply voltage and a ground voltage in accordance with a level of write data via one of first and second data buses and an inverted data bus, respectively.
    Type: Grant
    Filed: December 30, 2010
    Date of Patent: July 12, 2011
    Assignee: Renesas Electronics Corporation
    Inventor: Hideto Hidaka
  • Publication number: 20110163779
    Abstract: A logic gate is constructed of an insulated gate field effect transistor (MIS transistor) having a thin gate insulation film. An operation power supply line to the logic gate is provided with an MIS transistor having a thick gate insulation film for switching the supply and stop of an operation power source voltage. A voltage of the gate of the power source switching transistor is made changing in an amplitude greater than an amplitude of an input and an output signal to the logic gate. Current consumption in a semiconductor device configured of MIS transistor of a thin gate insulation film can be reduced and an power source voltage thereof can be stabilized.
    Type: Application
    Filed: March 14, 2011
    Publication date: July 7, 2011
    Applicant: Renesas Electronics Corporation
    Inventor: Hideto HIDAKA
  • Patent number: 7948795
    Abstract: In the data read operation, a memory cell and a dummy memory cell are respectively coupled to two bit lines of a selected bit line pair, a data read current is supplied. In the selected memory cell column, a read gate drives the respective voltages on a read data bus pair, according to the respective voltages on the bit lines. A data read circuit amplifies the voltage difference between the read data buses so as to output read data. The use of the read gate enables the read data buses to be disconnected from a data read current path. As a result, respective voltage changes on the bit lines are rapidly produced, and therefore, the data read speed can be increased.
    Type: Grant
    Filed: May 3, 2010
    Date of Patent: May 24, 2011
    Assignee: Renesas Electronics Corporation
    Inventor: Hideto Hidaka
  • Publication number: 20110096592
    Abstract: An end of a selected bit line in a selected column is electrically coupled to an end of a corresponding current return line by one of first and second write column select gates, which are selectively turned on in response to results of column selection. A data write circuit sets the other end of the selected bit line and the other end of the current return line to one and the other of a power supply voltage and a ground voltage in accordance with a level of write data via one of first and second data buses and an inverted data bus, respectively.
    Type: Application
    Filed: December 30, 2010
    Publication date: April 28, 2011
    Applicant: Renesas Electronics Corporation
    Inventor: Hideto HIDAKA
  • Patent number: 7928759
    Abstract: A logic gate is constructed of an insulated gate field effect transistor (MIS transistor) having a thin gate insulation film. An operation power supply line to the logic gate is provided with an MIS transistor having a thick gate insulation film for switching the supply and stop of an operation power source voltage. A voltage of the gate of the power source switching transistor is made changing in an amplitude greater than an amplitude of an input and an output signal to the logic gate. Current consumption in a semiconductor device configured of MIS transistor of a thin gate insulation film can be reduced and an power source voltage thereof can be stabilized.
    Type: Grant
    Filed: May 7, 2010
    Date of Patent: April 19, 2011
    Assignee: Renesas Electronics Corporation
    Inventor: Hideto Hidaka
  • Patent number: 7911871
    Abstract: A thin film magnetic memory includes a size-variable Read Only Memory (ROM) region and a size-variable Random Access Memory (RAM) coupled to different ports for parallel access to the ports, respectively. A memory system allowing fast and efficient data transfer can be achieved.
    Type: Grant
    Filed: August 24, 2009
    Date of Patent: March 22, 2011
    Assignee: Renesas Electronics Corporation
    Inventor: Hideto Hidaka
  • Patent number: 7885096
    Abstract: An end of a selected bit line in a selected column is electrically coupled to an end of a corresponding current return line by one of first and second write column select gates, which are selectively turned on in response to results of column selection. A data write circuit sets the other end of the selected bit line and the other end of the current return line to one and the other of a power supply voltage and a ground voltage in accordance with a level of write data via one of first and second data buses and an inverted data bus, respectively.
    Type: Grant
    Filed: June 9, 2009
    Date of Patent: February 8, 2011
    Assignee: Renesas Electronics Corporation
    Inventor: Hideto Hidaka
  • Patent number: 7864564
    Abstract: Between the value of an electric current and the supply duration for which the electric current is supplied that cause magnetization reversal, there is the relation of monotonous decrease. This means that, as the supply duration is shortened, the threshold current value for causing the magnetization reversal is larger. Therefore, in terms of suppressing occurrence of read disturb, the read current supply duration may be shortened to increase the threshold value of the current causing the magnetization reversal and thereby ensure a sufficient read disturb margin. Therefore, the read current supply duration may be shortened relative to the write current supply duration ensure the read disturb margin and suppress occurrence of read disturb.
    Type: Grant
    Filed: December 14, 2009
    Date of Patent: January 4, 2011
    Assignee: Renesas Electronics Corporation
    Inventor: Hideto Hidaka
  • Publication number: 20100219857
    Abstract: A logic gate is constructed of an insulated gate field effect transistor (MIS transistor) having a thin gate insulation film. An operation power supply line to the logic gate is provided with an MIS transistor having a thick gate insulation film for switching the supply and stop of an operation power source voltage. A voltage of the gate of the power source switching transistor is made changing in an amplitude greater than an amplitude of an input and an output signal to the logic gate. Current consumption in a semiconductor device configured of MIS transistor of a thin gate insulation film can be reduced and an power source voltage thereof can be stabilized.
    Type: Application
    Filed: May 7, 2010
    Publication date: September 2, 2010
    Applicant: RENSAS TECHNOLOGY CORP.
    Inventor: Hideto HIDAKA