Patents by Inventor Hidetoshi Nozaki

Hidetoshi Nozaki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20050274874
    Abstract: The present disclosure introduces a simple method for reducing the capacitance of the floating diffusion node of a CMOS image sensor and consequently improving the image sensor's sensitivity. While reducing parasitic capacitances such as the capacitance between the transfer gate and the floating node, the proposed device layouts, in which the channel width of the detection section is different from the channel width of the photoelectric conversion element, demand no more than what is required for the fabrication of the traditional layouts.
    Type: Application
    Filed: June 14, 2004
    Publication date: December 15, 2005
    Inventors: Hidetoshi Nozaki, Sohei Manabe
  • Patent number: 6974943
    Abstract: A active pixel sensor cell is disclosed that comprises a pinned photodiode. A transfer transistor is placed between the pinned photodiode and an output node, the transfer transistor being a depletion mode N-type MOSFET. A reset transistor is coupled between a high voltage rail Vdd and the output node. Finally, an output transistor has its gate coupled to the output node.
    Type: Grant
    Filed: July 22, 2003
    Date of Patent: December 13, 2005
    Assignee: OmniVision Technologies, Inc.
    Inventors: Sohei Manabe, Hidetoshi Nozaki
  • Publication number: 20050219884
    Abstract: An active pixel that incorporates elements of CCD technology into a CMOS image sensor is disclosed. Each pixel includes a reset transistor that resets a sense node. The active pixel includes an amplification transistor that is modulated by the signal on the sense node. A light sensing element, such as a photodiode, is provided and its signal is selectively read out by a transfer gate, selectively stored by a memory gate, and finally read out onto the sense node by a control gate. Underneath the memory gate is a memory well that acts as memory for the pixel and stores the signal output by the light sensing element.
    Type: Application
    Filed: March 30, 2004
    Publication date: October 6, 2005
    Inventors: Sohei Manabe, Hidetoshi Nozaki
  • Publication number: 20050017245
    Abstract: A pixel sensor cell used in a CMOS image sensor is disclosed. The cell includes a pinned photodiode formed in a Pwell that is formed in an N-type semiconductor substrate. A transfer transistor is placed between the pinned photodiode and an output node. A reset transistor is coupled between a high voltage rail Vdd and the output node. Finally, an output transistor with its gate coupled to the output node is provided.
    Type: Application
    Filed: February 4, 2004
    Publication date: January 27, 2005
    Inventors: Sohei Manabe, Hidetoshi Nozaki
  • Publication number: 20050017155
    Abstract: A active pixel sensor cell is disclosed that comprises a pinned photodiode. A transfer transistor is placed between the pinned photodiode and an output node, the transfer transistor being a depletion mode N-type MOSFET. A reset transistor is coupled between a high voltage rail Vdd and the output node. Finally, an output transistor has its gate coupled to the output node.
    Type: Application
    Filed: July 22, 2003
    Publication date: January 27, 2005
    Inventors: Sohei Manabe, Hidetoshi Nozaki
  • Publication number: 20040108502
    Abstract: The present invention provides a solid-state image pickup apparatus which is able to easily discharge signal charges in a signal accumulating section and which is free from reduction in the dynamic range of the element, thermal noise in a dark state, an image-lag and so forth even if the pixel size of the MOS solid-state image pickup apparatus is reduced, the voltage of a reading gate is lowered and the concentration in the well is raised. The solid-state image pickup apparatus according to the present invention incorporates a p-type silicon substrate having a surface on which a p+ diffusion layer for constituting a photoelectric conversion region and a drain of a reading MOS field effect transistor are formed. A signal accumulating section formed by an n-type diffusion layer is formed below the p+ diffusion layer. A gate electrode of the MOS field effect transistor is, on the surface of the substrate, formed between the p+ diffusion layer and the drain.
    Type: Application
    Filed: December 5, 2003
    Publication date: June 10, 2004
    Inventors: Nobuo Nakamura, Hisanori Ihara, Ikuko Inoue, Hidenori Shibata, Akiko Nomachi, Yoshiyuki Shioyama, Hidetoshi Nozaki, Masako Hori, Akira Makabe, Hiroshi Naruse, Hideki Inokuma, Seigo Abe, Hirofumi Yamashita, Tetsuya Yamaguchi
  • Patent number: 6690423
    Abstract: The present invention provides a solid-state image pickup apparatus which is able to easily discharge signal charges in a signal accumulating section and which is free from reduction in the dynamic range of the element, thermal noise in a dark state, an image-lag and so forth even if the pixel size of the MOS solid-state image pickup apparatus is reduced, the voltage of a reading gate is lowered and the concentration in the well is raised. The solid-state image pickup apparatus according to the present invention incorporates a p-type silicon substrate having a surface on which a p+ diffusion layer for constituting a photoelectric conversion region and a drain of a reading MOS field effect transistor are formed. A signal accumulating section formed by an n-type diffusion layer is formed below the p+ diffusion layer. A gate electrode of the MOS field effect transistor is, on the surface of the substrate, formed between the p+ diffusion layer and the drain.
    Type: Grant
    Filed: March 19, 1999
    Date of Patent: February 10, 2004
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Nobuo Nakamura, Hisanori Ihara, Ikuko Inoue, Hidenori Shibata, Akiko Nomachi, Yoshiyuki Shioyama, Hidetoshi Nozaki, Masako Hori, Akira Makabe, Hiroshi Naruse, Hideki Inokuma, Seigo Abe, Hirofumi Yamashita, Tetsuya Yamaguchi
  • Patent number: 6642087
    Abstract: A readout gate electrode is selectively formed on a silicon substrate. An N-type drain region is formed at one end of the readout gate electrode, and an N-type signal storage region is formed at the other end thereof. A P+-type surface shield region is selectively epitaxial-grown on the signal storage region, and a silicide block layer is formed on the surface shield region to cover at least part of the signal storage region. A Ti silicide film is selective epitaxial-grown on the drain region.
    Type: Grant
    Filed: January 10, 2003
    Date of Patent: November 4, 2003
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hidetoshi Nozaki, Ikuko Inoue, Hirofumi Yamashita
  • Publication number: 20030137008
    Abstract: A readout gate electrode is selectively formed on a silicon substrate. An N-type drain region is formed at one end of the readout gate electrode, and an N-type signal storage region is formed at the other end thereof. A P+-type surface shield region is selectively epitaxial-grown on the signal storage region, and a silicide block layer is formed on the surface shield region to cover at least part of the signal storage region. A Ti silicide film is selective epitaxial-grown on the drain region.
    Type: Application
    Filed: January 10, 2003
    Publication date: July 24, 2003
    Inventors: Hidetoshi Nozaki, Ikuko Inoue, Hirofumi Yamashita
  • Publication number: 20030127667
    Abstract: The invention is regarding to solid-state imaging device.
    Type: Application
    Filed: November 5, 2002
    Publication date: July 10, 2003
    Inventors: Ikuko Inoue, Hirofumi Yamashita, Hidetoshi Nozaki
  • Patent number: 6570222
    Abstract: A readout gate electrode is selectively formed on a silicon substrate. An N-type drain region is formed at one end of the readout gate electrode, and an N-type signal storage region is formed at the other end thereof. A P+-type surface shield region is selectively epitaxial-grown on the signal storage region, and a silicide block layer is formed on the surface shield region to cover at least part of the signal storage region. A Ti silicide film is selective epitaxial-grown on the drain region.
    Type: Grant
    Filed: March 9, 2001
    Date of Patent: May 27, 2003
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hidetoshi Nozaki, Ikuko Inoue, Hirofumi Yamashita
  • Patent number: 6521925
    Abstract: A solid-state image sensor comprises a photodiode which is provided in a p-type substrate or a p-type well and composed of a first n-type region for storing photoelectrically converted signal charges, a gate electrode provided above the substrate or well so as to be adjacent to one end of the photodiode, and a n-type drain provided at the surface of the substrate or well opposite to the photodiode, with the gate electrode interviewing therebetween. There is provided a second n-type region which is formed so as to be in contact with the upper part of the first n-type region on the gate electrode side and one end of which is formed to self-align with one end of the gate electrode to be part of the photodiode. This construction prevents the short-channel effect of the signal read transistor section and reduces or eradicates the left-over signal charges stored in the photodiode, thereby reducing noise and improving the sensitivity of the sensor.
    Type: Grant
    Filed: March 30, 2000
    Date of Patent: February 18, 2003
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Akiko Mori, Hisanori Ihara, Tetsuya Yamaguchi, Hiroaki Ishiwata, Hidetoshi Nozaki
  • Patent number: 6441411
    Abstract: A solid-state image sensor comprises a semiconductor substrate, a photoelectric conversion portion formed above the semiconductor substrate, and noise cancelers each formed, adjacent to the photoelectric conversion portion, on the semiconductor substrate through an insulating film, for removing noise of a signal read from the photoelectric conversion portion, wherein the semiconductor substrate has a conductive type opposite to a conductive type of a charge of the signal, and has a first region where concentration of impurities for determining the conductive type is high and a second region where concentration of the impurities on the first region is low.
    Type: Grant
    Filed: December 4, 2000
    Date of Patent: August 27, 2002
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hidetoshi Nozaki, Hirofumi Yamashita, Hisanori Ihara, Tetsuya Yamaguchi, Ikuko Inoue
  • Patent number: 6344670
    Abstract: The solid-state image sensor comprises a semiconductor substrate, a plurality of photoelectric conversion sections formed within respective isolated active regions on the semiconductor substrate, an image area wherein unit cells comprising the plurality of photoelectric conversion sections and a signal scanning circuit are arranged in a two-dimensional array form, and signal lines for reading signals from the respective unit cells within the image pick-up area, wherein the respective photoelectric conversion sections being formed by at least two ion implantations.
    Type: Grant
    Filed: January 8, 2001
    Date of Patent: February 5, 2002
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tetsuya Yamaguchi, Hisanori Ihara, Hirofumi Yamashita, Hidetoshi Nozaki, Ikuko Inoue
  • Publication number: 20010025970
    Abstract: A readout gate electrode is selectively formed on a silicon substrate. An N-type drain region is formed at one end of the readout gate electrode, and an N-type signal storage region is formed at the other end thereof. A P+-type surface shield region is selectively epitaxial-grown on the signal storage region, and a silicide block layer is formed on the surface shield region to cover at least part of the signal storage region. A Ti silicide film is selective epitaxial-grown on the drain region.
    Type: Application
    Filed: March 9, 2001
    Publication date: October 4, 2001
    Inventors: Hidetoshi Nozaki, Ikuko Inoue, Hirofumi Yamashita
  • Patent number: 6271554
    Abstract: A solid-state image sensor comprises a semiconductor substrate, a photoelectric conversion portion formed above the semiconductor substrate, and noise cancelers each formed, adjacent to the photoelectric conversion portion, on the semiconductor substrate through an insulating film, for removing noise of a signal read from the photoelectric conversion portion, wherein the semiconductor substrate has a conductive type opposite to a conductive type of a charge of the signal, and has a first region where concentration of impurities for determining the conductive type is high and a second region where concentration of the impurities on the first region is low.
    Type: Grant
    Filed: July 2, 1998
    Date of Patent: August 7, 2001
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hidetoshi Nozaki, Hirofumi Yamashita, Hisanori Ihara, Tetsuya Yamaguchi, Ikuko Inoue
  • Publication number: 20010003047
    Abstract: The solid-state image sensor comprises a semiconductor substrate, a plurality of photoelectric conversion sections formed within respective isolated active regions on the semiconductor substrate, an image area wherein unit cells comprising the plurality of photoelectric conversion sections and a signal scanning circuit are arranged in a two-dimensional array form, and signal lines for reading signals from the respective unit cells within the image pick-up area, wherein the respective photoelectric conversion sections being formed by at least twice ion implantation.
    Type: Application
    Filed: January 8, 2001
    Publication date: June 7, 2001
    Inventors: Tetsuya Yamaguchi, Hisanori Ihara, Hirofumi Yamashita, Hidetoshi Nozaki, Ikuko Inoue
  • Publication number: 20010000623
    Abstract: A solid-state image sensor comprises a semiconductor substrate, a photoelectric conversion portion formed above the semiconductor substrate, and noise cancelers each formed, adjacent to the photoelectric conversion portion, on the semiconductor substrate through an insulating film, for removing noise of a signal read from the photoelectric conversion portion, wherein the semiconductor substrate has a conductive type opposite to a conductive type of a charge of the signal, and has a first region where concentration of impurities for determining the conductive type is high and a second region where concentration of the impurities on the first region is low.
    Type: Application
    Filed: December 4, 2000
    Publication date: May 3, 2001
    Inventors: Hidetoshi Nozaki, Hirofumi Yamashita, Hisanori Ihara, Tetsuya Yamaguchi, Ikuko Inoue
  • Patent number: 6215139
    Abstract: An amplifying solid-state image sensor includes a semiconductor substrate, and a plurality of unit pixels arranged on the semiconductor substrate in a two-dimensional manner, in which each of the plurality of unit pixels includes a photodiode for performing the photoelectric conversion, a storage diode for storing electric signal charge obtained by the photodiode, an amplifying transistor for amplifying the electric signal charge stored in the storage diode, and a signal reading section for reading a signal voltage from the amplifying transistor, and in which each of the plurality of unit pixels has a first active region and a second active region in which the second active region has the same conductivity type as that of the semiconductor substrate and an impurity concentration higher than that of the semiconductor substrate, the photodiode in each of the unit pixels is formed in the first active region, and the amplifying transistor is formed in the second region.
    Type: Grant
    Filed: August 5, 1998
    Date of Patent: April 10, 2001
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yoshinori Iida, Hidetoshi Nozaki
  • Patent number: 6211509
    Abstract: A MOS-type solid-state image sensor has a plurality of pixel units arranged on a p-type Si substrate in a matrix format. Each pixel unit has a photoelectric conversion portion including a photodiode, and a signal extraction portion including an amplification MOS transistor. Each element isolation region for isolating the pixel units from each other has a field oxide film formed on the substrate and a p-type diffusion layer formed in the substrate layer immediately below the oxide film to have a higher carrier impurity concentration than the substrate layer. The bottom portion of each element isolation region is positioned deeper than the bottom portion of a depletion layer extending from the p-n junction of the photodiode to the substrate in an equilibrium state.
    Type: Grant
    Filed: March 30, 1999
    Date of Patent: April 3, 2001
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Ikuko Inoue, Nobuo Nakamura, Hirofumi Yamashita, Tetsuya Yamaguchi, Hidetoshi Nozaki, Hisanori Ihara