Patents by Inventor Hideyuki Kishida
Hideyuki Kishida has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20170162700Abstract: By using a conductive layer including Cu as a long lead wiring, increase in wiring resistance is suppressed. Further, the conductive layer including Cu is provided in such a manner that it does not overlap with the oxide semiconductor layer in which a channel region of a TFT is formed, and is surrounded by insulating layers including silicon nitride, whereby diffusion of Cu can be prevented; thus, a highly reliable semiconductor device can be manufactured. Specifically, a display device which is one embodiment of a semiconductor device can have high display quality and operate stably even when the size or definition thereof is increased.Type: ApplicationFiled: February 15, 2017Publication date: June 8, 2017Inventors: Shunpei YAMAZAKI, Jun KOYAMA, Masahiro TAKAHASHI, Hideyuki KISHIDA, Akiharu MIYANAGA, Junpei SUGAO, Hideki UOCHI, Yasuo NAKAMURA
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Publication number: 20170162719Abstract: An object is to provide a semiconductor device with stable electric characteristics in which an oxide semiconductor is used. The impurity concentration in the oxide semiconductor layer is reduced in the following manner: a silicon oxide layer including many defects typified by dangling bonds is formed in contact with the oxide semiconductor layer, and an impurity such as hydrogen or moisture (a hydrogen atom or a compound including a hydrogen atom such as H2O) included in the oxide semiconductor layer is diffused into the silicon oxide layer. Further, a mixed region is provided between the oxide semiconductor layer and the silicon oxide layer. The mixed region includes oxygen, silicon, and at least one kind of metal element that is included in the oxide semiconductor.Type: ApplicationFiled: February 23, 2017Publication date: June 8, 2017Inventors: Shunpei YAMAZAKI, Akiharu MIYANAGA, Masahiro TAKAHASHI, Hideyuki KISHIDA, Junichiro SAKATA
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Patent number: 9627198Abstract: An object is to provide a semiconductor device with stable electric characteristics in which an oxide semiconductor is used. The impurity concentration in the oxide semiconductor layer is reduced in the following manner: a silicon oxide layer including many defects typified by dangling bonds is formed in contact with the oxide semiconductor layer, and an impurity such as hydrogen or moisture (a hydrogen atom or a compound including a hydrogen atom such as H2O) included in the oxide semiconductor layer is diffused into the silicon oxide layer. Further, a mixed region is provided between the oxide semiconductor layer and the silicon oxide layer. The mixed region includes oxygen, silicon, and at least one kind of metal element that is included in the oxide semiconductor.Type: GrantFiled: September 30, 2010Date of Patent: April 18, 2017Assignee: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Shunpei Yamazaki, Akiharu Miyanaga, Masahiro Takahashi, Hideyuki Kishida, Junichiro Sakata
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Patent number: 9601635Abstract: By using a conductive layer including Cu as a long lead wiring, increase in wiring resistance is suppressed. Further, the conductive layer including Cu is provided in such a manner that it does not overlap with the oxide semiconductor layer in which a channel region of a TFT is formed, and is surrounded by insulating layers including silicon nitride, whereby diffusion of Cu can be prevented; thus, a highly reliable semiconductor device can be manufactured. Specifically, a display device which is one embodiment of a semiconductor device can have high display quality and operate stably even when the size or definition thereof is increased.Type: GrantFiled: October 28, 2015Date of Patent: March 21, 2017Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Jun Koyama, Masahiro Takahashi, Hideyuki Kishida, Akiharu Miyanaga, Junpei Sugao, Hideki Uochi, Yasuo Nakamura
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Publication number: 20170040181Abstract: An object of the present invention to provide a highly reliable semiconductor device. Another object is to provide a manufacturing method of a highly reliable semiconductor device. Still another object is to provide a semiconductor device having low power consumption. Yet another object is to provide a manufacturing method of a semiconductor device having low power consumption. Furthermore, another object is to provide a semiconductor device which can be manufactured with high mass productivity. Another object is to provide a manufacturing method of a semiconductor device which can be manufactured with high mass productivity. An impurity remaining in an oxide semiconductor layer is removed so that the oxide semiconductor layer is purified to have an extremely high purity. Specifically, after adding a halogen element into the oxide semiconductor layer, heat treatment is performed to remove an impurity from the oxide semiconductor layer. The halogen element is preferably fluorine.Type: ApplicationFiled: October 24, 2016Publication date: February 9, 2017Inventors: Shunpei YAMAZAKI, Hideyuki KISHIDA
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Publication number: 20170040458Abstract: An object is to provide a thin film transistor having favorable electric characteristics and a semiconductor device including the thin film transistor as a switching element. The thin film transistor includes a gate electrode formed over an insulating surface, a gate insulating film over the gate electrode, an oxide semiconductor film which overlaps with the gate electrode over the gate insulating film and which includes a layer where the concentration of one or a plurality of metals contained in the oxide semiconductor is higher than that in other regions, a pair of metal oxide films formed over the oxide semiconductor film and in contact with the layer, and a source electrode and a drain electrode in contact with the metal oxide films. The metal oxide films are formed by oxidation of a metal contained in the source electrode and the drain electrode.Type: ApplicationFiled: August 22, 2016Publication date: February 9, 2017Inventors: Akiharu MIYANAGA, Junichiro SAKATA, Masayuki SAKAKURA, Masahiro TAKAHASHI, Hideyuki KISHIDA, Shunpei YAMAZAKI
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Publication number: 20170033232Abstract: It is an object to provide a highly reliable semiconductor device including a thin film transistor with stable electric characteristics. In a semiconductor device including an inverted staggered thin film transistor whose semiconductor layer is an oxide semiconductor layer, a buffer layer is provided over the oxide semiconductor layer. The buffer layer is in contact with a channel formation region of the semiconductor layer and source and drain electrode layers. A film of the buffer layer has resistance distribution. A region provided over the channel formation region of the semiconductor layer has lower electrical conductivity than the channel formation region of the semiconductor layer, and a region in contact with the source and drain electrode layers has higher electrical conductivity than the channel formation region of the semiconductor layer.Type: ApplicationFiled: October 13, 2016Publication date: February 2, 2017Inventors: Junichiro SAKATA, Takuya HIROHASHI, Hideyuki KISHIDA
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Publication number: 20160358945Abstract: In a thin film transistor, an increase in off current or negative shift of the threshold voltage is prevented. In the thin film transistor, a buffer layer is provided between an oxide semiconductor layer and each of a source electrode layer and a drain electrode layer. The buffer layer includes a metal oxide layer which is an insulator or a semiconductor over a middle portion of the oxide semiconductor layer. The metal oxide layer functions as a protective layer for suppressing incorporation of impurities into the oxide semiconductor layer. Therefore, in the thin film transistor, an increase in off current or negative shift of the threshold voltage can be prevented.Type: ApplicationFiled: August 16, 2016Publication date: December 8, 2016Inventors: Toshikazu KONDO, Hideyuki KISHIDA
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Publication number: 20160336456Abstract: In a channel protected thin film transistor in which a channel formation region is formed using an oxide semiconductor, an oxide semiconductor layer which is dehydrated or dehydrogenated by a heat treatment is used as an active layer, a crystal region including nanocrystals is included in a superficial portion in the channel formation region, and the rest portion is amorphous or is formed of a mixture of amorphousness/non-crystals and microcrystals, where an amorphous region is dotted with microcrystals. By using an oxide semiconductor layer having such a structure, a change to an n-type caused by entry of moisture or elimination of oxygen to or from the superficial portion and generation of a parasitic channel can be prevented and a contact resistance with a source and drain electrodes can be reduced.Type: ApplicationFiled: July 27, 2016Publication date: November 17, 2016Inventors: Shunpei YAMAZAKI, Masayuki SAKAKURA, Ryosuke WATANABE, Junichiro SAKATA, Kengo AKIMOTO, Akiharu MIYANAGA, Takuya HIROHASHI, Hideyuki KISHIDA
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Patent number: 9496404Abstract: An object of the present invention to provide a highly reliable semiconductor device. Another object is to provide a manufacturing method of a highly reliable semiconductor device. Still another object is to provide a semiconductor device having low power consumption. Yet another object is to provide a manufacturing method of a semiconductor device having low power consumption. Furthermore, another object is to provide a semiconductor device which can be manufactured with high mass productivity. Another object is to provide a manufacturing method of a semiconductor device which can be manufactured with high mass productivity. An impurity remaining in an oxide semiconductor layer is removed so that the oxide semiconductor layer is purified to have an extremely high purity. Specifically, after adding a halogen element into the oxide semiconductor layer, heat treatment is performed to remove an impurity from the oxide semiconductor layer. The halogen element is preferably fluorine.Type: GrantFiled: February 25, 2011Date of Patent: November 15, 2016Assignee: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Shunpei Yamazaki, Hideyuki Kishida
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Patent number: 9496413Abstract: Reducing hydrogen concentration in a channel formation region of an oxide semiconductor is important in stabilizing threshold voltage of a transistor including an oxide semiconductor and improving reliability. Hence, hydrogen is attracted from the oxide semiconductor and trapped in a region of an insulating film which overlaps with a source region and a drain region of the oxide semiconductor. Impurities such as argon, nitrogen, carbon, phosphorus, or boron are added to the region of the insulating film which overlaps with the source region and the drain region of the oxide semiconductor, thereby generating a defect. Hydrogen in the oxide semiconductor is attracted to the defect in the insulating film. The defect in the insulating film is stabilized by the presence of hydrogen.Type: GrantFiled: February 25, 2016Date of Patent: November 15, 2016Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Masashi Tsubuku, Yusuke Nonaka, Noritaka Ishihara, Masashi Oota, Hideyuki Kishida
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Patent number: 9496414Abstract: It is an object to provide a highly reliable semiconductor device including a thin film transistor with stable electric characteristics. In a semiconductor device including an inverted staggered thin film transistor whose semiconductor layer is an oxide semiconductor layer, a buffer layer is provided over the oxide semiconductor layer. The buffer layer is in contact with a channel formation region of the semiconductor layer and source and drain electrode layers. A film of the buffer layer has resistance distribution. A region provided over the channel formation region of the semiconductor layer has lower electrical conductivity than the channel formation region of the semiconductor layer, and a region in contact with the source and drain electrode layers has higher electrical conductivity than the channel formation region of the semiconductor layer.Type: GrantFiled: March 18, 2016Date of Patent: November 15, 2016Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Junichiro Sakata, Takuya Hirohashi, Hideyuki Kishida
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Patent number: 9450104Abstract: The semiconductor device includes an oxide semiconductor film having a first region and a pair of second regions facing each other with the first region provided therebetween, a gate insulating film over the oxide semiconductor film, and a first electrode overlapping with the first region, over the gate insulating film. The first region is a non-single-crystal oxide semiconductor region including a c-axis-aligned crystal portion. The pair of second regions is an oxide semiconductor region containing dopant and including a plurality of crystal portions.Type: GrantFiled: October 22, 2015Date of Patent: September 20, 2016Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Junichi Koezuka, Shinji Ohno, Yuichi Sato, Masahiro Takahashi, Hideyuki Kishida
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Patent number: 9443981Abstract: In a thin film transistor, an increase in off current or negative shift of the threshold voltage is prevented. In the thin film transistor, a buffer layer is provided between an oxide semiconductor layer and each of a source electrode layer and a drain electrode layer. The buffer layer includes a metal oxide layer which is an insulator or a semiconductor over a middle portion of the oxide semiconductor layer. The metal oxide layer functions as a protective layer for suppressing incorporation of impurities into the oxide semiconductor layer. Therefore, in the thin film transistor, an increase in off current or negative shift of the threshold voltage can be prevented.Type: GrantFiled: November 16, 2015Date of Patent: September 13, 2016Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Toshikazu Kondo, Hideyuki Kishida
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Patent number: 9443874Abstract: An object is to provide a thin film transistor having favorable electric characteristics and a semiconductor device including the thin film transistor as a switching element. The thin film transistor includes a gate electrode formed over an insulating surface, a gate insulating film over the gate electrode, an oxide semiconductor film which overlaps with the gate electrode over the gate insulating film and which includes a layer where the concentration of one or a plurality of metals contained in the oxide semiconductor is higher than that in other regions, a pair of metal oxide films formed over the oxide semiconductor film and in contact with the layer, and a source electrode and a drain electrode in contact with the metal oxide films. The metal oxide films are formed by oxidation of a metal contained in the source electrode and the drain electrode.Type: GrantFiled: July 1, 2014Date of Patent: September 13, 2016Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Akiharu Miyanaga, Junichiro Sakata, Masayuki Sakakura, Masahiro Takahashi, Hideyuki Kishida, Shunpei Yamazaki
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Patent number: 9406808Abstract: In a channel protected thin film transistor in which a channel formation region is formed using an oxide semiconductor, an oxide semiconductor layer which is dehydrated or dehydrogenated by a heat treatment is used as an active layer, a crystal region including nanocrystals is included in a superficial portion in the channel formation region, and the rest portion is amorphous or is formed of a mixture of amorphousness/non-crystals and microcrystals, where an amorphous region is dotted with microcrystals. By using an oxide semiconductor layer having such a structure, a change to an n-type caused by entry of moisture or elimination of oxygen to or from the superficial portion and generation of a parasitic channel can be prevented and a contact resistance with a source and drain electrodes can be reduced.Type: GrantFiled: November 8, 2012Date of Patent: August 2, 2016Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Masayuki Sakakura, Ryosuke Watanabe, Junichiro Sakata, Kengo Akimoto, Akiharu Miyanaga, Takuya Hirohashi, Hideyuki Kishida
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Publication number: 20160214919Abstract: The present invention provides a particulate composition wherein an oil component containing reduced coenzyme Q10 is polydispersed forming a domain in a matrix containing a water-soluble excipient, which simultaneously shows high oxidative stability and high oral absorbability, a production method thereof, and a stabilizing method thereof. It also provides a food, food with nutrient function claims, food for specified health uses, dietary supplement, nutritional product, animal drug, drink, feed, pet food, cosmetic, pharmaceutical product, therapeutic drug, prophylactic drug and the like, which contain the composition.Type: ApplicationFiled: February 17, 2016Publication date: July 28, 2016Applicant: KANEKA CORPORATIONInventors: Takashi UEDA, Shinsuke AKAO, Shiro KITAMURA, Hideyuki KISHIDA, Takahiro UEDA
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Publication number: 20160218226Abstract: It is an object to provide a highly reliable semiconductor device with good electrical characteristics and a display device including the semiconductor device as a switching element. In a transistor including an oxide semiconductor layer, a needle crystal group provided on at least one surface side of the oxide semiconductor layer grows in a c-axis direction perpendicular to the surface and includes an a-b plane parallel to the surface, and a portion except for the needle crystal group is an amorphous region or a region in which amorphousness and microcrystals are mixed. Accordingly, a highly reliable semiconductor device with good electrical characteristics can be formed.Type: ApplicationFiled: April 5, 2016Publication date: July 28, 2016Inventors: Shunpei YAMAZAKI, Masayuki SAKAKURA, Ryosuke WATANABE, Junichiro SAKATA, Kengo AKIMOTO, Akiharu MIYANAGA, Takuya HIROHASHI, Hideyuki KISHIDA
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Patent number: 9399051Abstract: The present invention aims to provide a DPP-4 inhibitor that is obtained by using a food as a raw material and that is suitable for oral ingestion from the viewpoints of flavor and absorbability, and a composition for the prevention and/or amelioration of diabetes which contains the DPP-4 inhibitor. The present invention provides a DPP-4 inhibitor obtained by treating an azuki bean or a kidney bean with a microorganism or a proteolytic enzyme produced by the microorganism. In particular, a preferable DPP-4 inhibitor can be obtained by hydrolyzing an azuki bean with a koji mold or a proteolytic enzyme derived from the koji mold to fragment a protein in the azuki bean.Type: GrantFiled: February 3, 2014Date of Patent: July 26, 2016Assignee: Kaneka CorporationInventors: Yuji Tominaga, Shinichi Yokota, Hozumi Tanaka, Hideyuki Kishida, Masayasu Kitagawa, Hiroshi Tachi, Toru Ota
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Publication number: 20160204269Abstract: It is an object to provide a highly reliable semiconductor device including a thin film transistor with stable electric characteristics. In a semiconductor device including an inverted staggered thin film transistor whose semiconductor layer is an oxide semiconductor layer, a buffer layer is provided over the oxide semiconductor layer. The buffer layer is in contact with a channel formation region of the semiconductor layer and source and drain electrode layers. A film of the buffer layer has resistance distribution. A region provided over the channel formation region of the semiconductor layer has lower electrical conductivity than the channel formation region of the semiconductor layer, and a region in contact with the source and drain electrode layers has higher electrical conductivity than the channel formation region of the semiconductor layer.Type: ApplicationFiled: March 18, 2016Publication date: July 14, 2016Inventors: Junichiro SAKATA, Takuya HIROHASHI, Hideyuki KISHIDA