Patents by Inventor Hikaru Harada

Hikaru Harada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240102924
    Abstract: A diagnostic optical microscope according to the present embodiment includes at least one laser light source (11) configured to generate laser light for illuminating a sample (40) containing a light absorbing material, a lens configured to focus the laser light to be focused on the sample (40), scanning means for changing a focusing position of the laser light on the sample (40), and a light detector (31) configured to detect laser light transmitted through the sample (40) as signal light. A laser light intensity is changed to obtain a nonlinear region in which the laser light intensity and a signal light intensity have a nonlinear relation due to occurrence of saturation of absorption in the light absorbing material when the laser light intensity is maximized. An image is generated based on a nonlinear component of the signal light based on the saturation of absorption in the light absorbing material.
    Type: Application
    Filed: January 19, 2022
    Publication date: March 28, 2024
    Inventors: Katsumasa FUJITA, Kentaro NISHIDA, Hikaru SATO, Hideo TANAKA, Yoshinori Harada
  • Patent number: 11004983
    Abstract: An object is to provide a memory device including a memory element that can be operated without problems by a thin film transistor with a low off-state current. Provided is a memory device in which a memory element including at least one thin film transistor that includes an oxide semiconductor layer is arranged as a matrix. The thin film transistor including an oxide semiconductor layer has a high field effect mobility and low off-state current, and thus can be operated favorably without problems. In addition, the power consumption can be reduced. Such a memory device is particularly effective in the case where the thin film transistor including an oxide semiconductor layer is provided in a pixel of a display device because the memory device and the pixel can be formed over one substrate.
    Type: Grant
    Filed: January 31, 2020
    Date of Patent: May 11, 2021
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Masashi Tsubuku, Kosei Noda, Kouhei Toyotaka, Kazunori Watanabe, Hikaru Harada
  • Publication number: 20200168739
    Abstract: An object is to provide a memory device including a memory element that can be operated without problems by a thin film transistor with a low off-state current. Provided is a memory device in which a memory element including at least one thin film transistor that includes an oxide semiconductor layer is arranged as a matrix. The thin film transistor including an oxide semiconductor layer has a high field effect mobility and low off-state current, and thus can be operated favorably without problems. In addition, the power consumption can be reduced. Such a memory device is particularly effective in the case where the thin film transistor including an oxide semiconductor layer is provided in a pixel of a display device because the memory device and the pixel can be formed over one substrate.
    Type: Application
    Filed: January 31, 2020
    Publication date: May 28, 2020
    Inventors: Shunpei Yamazaki, Masashi Tsubuku, Kosei Noda, Kouhei Toyotaka, Kazunori Watanabe, Hikaru Harada
  • Patent number: 10553726
    Abstract: An object is to provide a memory device including a memory element that can be operated without problems by a thin film transistor with a low off-state current. Provided is a memory device in which a memory element including at least one thin film transistor that includes an oxide semiconductor layer is arranged as a matrix. The thin film transistor including an oxide semiconductor layer has a high field effect mobility and low off-state current, and thus can be operated favorably without problems. In addition, the power consumption can be reduced. Such a memory device is particularly effective in the case where the thin film transistor including an oxide semiconductor layer is provided in a pixel of a display device because the memory device and the pixel can be formed over one substrate.
    Type: Grant
    Filed: August 8, 2017
    Date of Patent: February 4, 2020
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Masashi Tsubuku, Kosei Noda, Kouhei Toyotaka, Kazunori Watanabe, Hikaru Harada
  • Publication number: 20170358683
    Abstract: An object is to provide a memory device including a memory element that can be operated without problems by a thin film transistor with a low off-state current. Provided is a memory device in which a memory element including at least one thin film transistor that includes an oxide semiconductor layer is arranged as a matrix. The thin film transistor including an oxide semiconductor layer has a high field effect mobility and low off-state current, and thus can be operated favorably without problems. In addition, the power consumption can be reduced. Such a memory device is particularly effective in the case where the thin film transistor including an oxide semiconductor layer is provided in a pixel of a display device because the memory device and the pixel can be formed over one substrate.
    Type: Application
    Filed: August 8, 2017
    Publication date: December 14, 2017
    Inventors: Shunpei YAMAZAKI, Masashi TSUBUKU, Kosei NODA, Kouhei TOYOTAKA, Kazunori WATANABE, Hikaru HARADA
  • Patent number: 9735285
    Abstract: An object is to provide a memory device including a memory element that can be operated without problems by a thin film transistor with a low off-state current. Provided is a memory device in which a memory element including at least one thin film transistor that includes an oxide semiconductor layer is arranged as a matrix. The thin film transistor including an oxide semiconductor layer has a high field effect mobility and low off-state current, and thus can be operated favorably without problems. In addition, the power consumption can be reduced. Such a memory device is particularly effective in the case where the thin film transistor including an oxide semiconductor layer is provided in a pixel of a display device because the memory device and the pixel can be formed over one substrate.
    Type: Grant
    Filed: October 18, 2016
    Date of Patent: August 15, 2017
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Masashi Tsubuku, Kosei Noda, Kouhei Toyotaka, Kazunori Watanabe, Hikaru Harada
  • Publication number: 20170040459
    Abstract: An object is to provide a memory device including a memory element that can be operated without problems by a thin film transistor with a low off-state current. Provided is a memory device in which a memory element including at least one thin film transistor that includes an oxide semiconductor layer is arranged as a matrix. The thin film transistor including an oxide semiconductor layer has a high field effect mobility and low off-state current, and thus can be operated favorably without problems. In addition, the power consumption can be reduced. Such a memory device is particularly effective in the case where the thin film transistor including an oxide semiconductor layer is provided in a pixel of a display device because the memory device and the pixel can be formed over one substrate.
    Type: Application
    Filed: October 18, 2016
    Publication date: February 9, 2017
    Inventors: Shunpei YAMAZAKI, Masashi TSUBUKU, Kosei NODA, Kouhei TOYOTAKA, Kazunori WATANABE, Hikaru HARADA
  • Patent number: 9478564
    Abstract: An object is to provide a memory device including a memory element that can be operated without problems by a thin film transistor with a low off-state current. Provided is a memory device in which a memory element including at least one thin film transistor that includes an oxide semiconductor layer is arranged as a matrix. The thin film transistor including an oxide semiconductor layer has a high field effect mobility and low off-state current, and thus can be operated favorably without problems. In addition, the power consumption can be reduced. Such a memory device is particularly effective in the case where the thin film transistor including an oxide semiconductor layer is provided in a pixel of a display device because the memory device and the pixel can be formed over one substrate.
    Type: Grant
    Filed: January 7, 2016
    Date of Patent: October 25, 2016
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Masashi Tsubuku, Kosei Noda, Kouhei Toyotaka, Kazunori Watanabe, Hikaru Harada
  • Patent number: 9451246
    Abstract: A display device includes a display panel including a plurality of pixels, a shutter panel including a driver circuit, a liquid crystal, and light-transmitting electrodes provided in a striped manner, and a positional data detector configured to detect a positional data of a viewer. The shutter panel is provided over a display surface side of the display panel, a width of one of the light-transmitting electrodes in the shutter panel is smaller than that of one of the plurality of pixels, and the driver circuit in the shutter panel is configured to selectively output signals for forming a parallax barrier to the light-transmitting electrodes. The parallax barrier is capable of changing its shape in accordance with the detected positional data.
    Type: Grant
    Filed: July 10, 2012
    Date of Patent: September 20, 2016
    Assignee: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Jun Koyama, Hiroyuki Miyake, Hideaki Shishido, Seiko Inoue, Kouhei Toyotaka, Koji Kusunoki, Hikaru Harada, Makoto Kaneyasu
  • Publication number: 20160118418
    Abstract: An object is to provide a memory device including a memory element that can be operated without problems by a thin film transistor with a low off-state current. Provided is a memory device in which a memory element including at least one thin film transistor that includes an oxide semiconductor layer is arranged as a matrix. The thin film transistor including an oxide semiconductor layer has a high field effect mobility and low off-state current, and thus can be operated favorably without problems. In addition, the power consumption can be reduced. Such a memory device is particularly effective in the case where the thin film transistor including an oxide semiconductor layer is provided in a pixel of a display device because the memory device and the pixel can be formed over one substrate.
    Type: Application
    Filed: January 7, 2016
    Publication date: April 28, 2016
    Inventors: Shunpei YAMAZAKI, Masashi TSUBUKU, Kosei NODA, Kouhei TOYOTAKA, Kazunori WATANABE, Hikaru HARADA
  • Patent number: 9236385
    Abstract: An object is to provide a memory device including a memory element that can be operated without problems by a thin film transistor with a low off-state current. Provided is a memory device in which a memory element including at least one thin film transistor that includes an oxide semiconductor layer is arranged as a matrix. The thin film transistor including an oxide semiconductor layer has a high field effect mobility and low off-state current, and thus can be operated favorably without problems. In addition, the power consumption can be reduced. Such a memory device is particularly effective in the case where the thin film transistor including an oxide semiconductor layer is provided in a pixel of a display device because the memory device and the pixel can be formed over one substrate.
    Type: Grant
    Filed: July 21, 2014
    Date of Patent: January 12, 2016
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Masashi Tsubuku, Kosei Noda, Kouhei Toyotaka, Kazunori Watanabe, Hikaru Harada
  • Patent number: 8928708
    Abstract: An object is to suppress crosstalk. A display device includes a pixel portion which includes a first display region, a second display region, and a non-light-emitting region provided between the first display region and the second display region; and a parallax barrier which includes a first light control region, a second light control region, and a light-transmitting region provided between the first light control region and the second light control region. The first light control region overlaps with the first display region, the second light control region overlaps with the second display region, and the center of the width of the light-transmitting region overlaps with the non-light-emitting region.
    Type: Grant
    Filed: July 10, 2012
    Date of Patent: January 6, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Jun Koyama, Hiroyuki Miyake, Kouhei Toyotaka, Hikaru Harada, Makoto Kaneyasu
  • Publication number: 20140337603
    Abstract: An object is to provide a memory device including a memory element that can be operated without problems by a thin film transistor with a low off-state current. Provided is a memory device in which a memory element including at least one thin film transistor that includes an oxide semiconductor layer is arranged as a matrix. The thin film transistor including an oxide semiconductor layer has a high field effect mobility and low off-state current, and thus can be operated favorably without problems. In addition, the power consumption can be reduced. Such a memory device is particularly effective in the case where the thin film transistor including an oxide semiconductor layer is provided in a pixel of a display device because the memory device and the pixel can be formed over one substrate.
    Type: Application
    Filed: July 21, 2014
    Publication date: November 13, 2014
    Inventors: Shunpei Yamazaki, Masashi Tsubuku, Kosei Noda, Kouhei Toyotaka, Kazunori Watanabe, Hikaru Harada
  • Patent number: 8803142
    Abstract: An object is to provide a memory device including a memory element that can be operated without problems by a thin film transistor with a low off-state current. Provided is a memory device in which a memory element including at least one thin film transistor that includes an oxide semiconductor layer is arranged as a matrix. The thin film transistor including an oxide semiconductor layer has a high field effect mobility and low off-state current, and thus can be operated favorably without problems. In addition, the power consumption can be reduced. Such a memory device is particularly effective in the case where the thin film transistor including an oxide semiconductor layer is provided in a pixel of a display device because the memory device and the pixel can be formed over one substrate.
    Type: Grant
    Filed: October 19, 2010
    Date of Patent: August 12, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Masashi Tsubuku, Kosei Noda, Kouhei Toyotaka, Kazunori Watanabe, Hikaru Harada
  • Publication number: 20130021239
    Abstract: A display device includes a display panel including a plurality of pixels, a shutter panel including a driver circuit, a liquid crystal, and light-transmitting electrodes provided in a striped manner, and a positional data detector configured to detect a positional data of a viewer. The shutter panel is provided over a display surface side of the display panel, a width of one of the light-transmitting electrodes in the shutter panel is smaller than that of one of the plurality of pixels, and the driver circuit in the shutter panel is configured to selectively output signals for forming a parallax barrier to the light-transmitting electrodes. The parallax barrier is capable of changing its shape in accordance with the detected positional data.
    Type: Application
    Filed: July 10, 2012
    Publication date: January 24, 2013
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Jun KOYAMA, Hiroyuki MIYAKE, Hideaki SHISHIDO, Seiko INOUE, Kouhei TOYOTAKA, Koji KUSUNOKI, Hikaru HARADA, Makoto KANEYASU
  • Publication number: 20130016143
    Abstract: An object is to suppress crosstalk. A display device includes a pixel portion which includes a first display region, a second display region, and a non-light-emitting region provided between the first display region and the second display region; and a parallax barrier which includes a first light control region, a second light control region, and a light-transmitting region provided between the first light control region and the second light control region. The first light control region overlaps with the first display region, the second light control region overlaps with the second display region, and the center of the width of the light-transmitting region overlaps with the non-light-emitting region.
    Type: Application
    Filed: July 10, 2012
    Publication date: January 17, 2013
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Jun KOYAMA, Hiroyuki MIYAKE, Kouhei TOYOTAKA, Hikaru HARADA, Makoto KANEYASU
  • Publication number: 20110089419
    Abstract: An object is to provide a memory device including a memory element that can be operated without problems by a thin film transistor with a low off-state current. Provided is a memory device in which a memory element including at least one thin film transistor that includes an oxide semiconductor layer is arranged as a matrix. The thin film transistor including an oxide semiconductor layer has a high field effect mobility and low off-state current, and thus can be operated favorably without problems. In addition, the power consumption can be reduced. Such a memory device is particularly effective in the case where the thin film transistor including an oxide semiconductor layer is provided in a pixel of a display device because the memory device and the pixel can be formed over one substrate.
    Type: Application
    Filed: October 19, 2010
    Publication date: April 21, 2011
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Shunpei Yamazaki, Masashi Tsubuku, Kosei Noda, Kouhei Toyotaka, Kazunori Watanabe, Hikaru Harada
  • Patent number: 4447543
    Abstract: According to the present invention volatile hydrides such as diborane, arsine, phosphine and the like are made to react with mercuric oxide at room temperature to produced mercury atom, the concentration of which is thereafter measured and the concentration of volatile hydrides is determined in accordance with the corresponding measured mercury atom concentration. As the measuring apparatus according to the present invention is made to measure mercury atom, it can easily detect even extremely small quantity of substances such as volatile hydrides and respond quickly, thus enabling the apparatus to be suitably used as a monitor in semiconductor industry.
    Type: Grant
    Filed: November 18, 1981
    Date of Patent: May 8, 1984
    Assignee: Nippon Sanso K.K.
    Inventors: Hikaru Harada, Teruo Akiyama, Tuneo Hiyama
  • Patent number: 4309385
    Abstract: According to the present invention volatile hydrides such as diborane, arsine, phosphine and the like are made to react with mercuric oxide at an ordinary temperature to produce mercury atoms, the concentration of which is thereafter measured and the concentration of volatile hydrides is determined in accordance with the corresponding measured mercury atom concentration. As the measuring apparatus according to the present invention is made to measure mercury atoms, it can easily detect even extremely small quantity of substances such as volatile hydrides and respond quickly, thus enabling the apparatus being suitably used as a monitor in the semiconductor industry.
    Type: Grant
    Filed: January 4, 1980
    Date of Patent: January 5, 1982
    Assignee: Nippon Sanso K.K.
    Inventors: Hikaru Harada, Teruo Akiyama, Tuneo Hiyama