Patents by Inventor Hiro GANGI

Hiro GANGI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12107159
    Abstract: According to one embodiment, a semiconductor device includes first to third electrodes, a conductive member, a semiconductor member, and an insulating member. The conductive member includes a conductive member end portion and a conductive member other-end portion. The conductive member end portion is between the first electrode and the conductive member other-end portion. The conductive member is electrically connected with one of the second electrode or the third electrode. The semiconductor member includes first to third semiconductor regions. The first semiconductor region includes first and second partial regions. The first partial region is between the first and second electrodes. The second semiconductor region is between the first partial region and the third semiconductor region. The third semiconductor region is electrically connected with the second electrode.
    Type: Grant
    Filed: August 6, 2021
    Date of Patent: October 1, 2024
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Yusuke Kobayashi, Tomoaki Inokuchi, Hiro Gangi, Hiroki Nemoto, Akihiro Goryu, Ryohei Gejo, Tsuyoshi Kachi, Tatsuya Nishiwaki
  • Patent number: 12057501
    Abstract: A semiconductor device of an embodiment includes: a semiconductor layer having a first face and a second face, the semiconductor layer including a first trench and a second trench on a side of a first face; a first electrode on the side of the first face; a second electrode on the side of the second face; a first gate electrode in the first trench; a first field plate electrode electrically connected to the first electrode in the first trench, a second gate electrode in the second trench; and a second field plate electrode electrically connected to the first electrode in the second trench, a resistance between first electrode and second field plate is different from a resistance between first electrode and the first field plate electrode.
    Type: Grant
    Filed: March 7, 2022
    Date of Patent: August 6, 2024
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yusuke Kobayashi, Tomoaki Inokuchi, Hiro Gangi, Tatsunori Sakano, Yusuke Hayashi
  • Patent number: 12027618
    Abstract: According to one embodiment, a semiconductor device includes first to third electrodes, a semiconductor member, a conductive member, and an insulating member. The semiconductor member includes first to third semiconductor regions. The first semiconductor region includes first and second partial regions. The second semiconductor region is between the first partial region and the third semiconductor region. The conductive member is located between the second partial region and the third electrode. The conductive member includes a first end portion and a first other-end portion. The first end portion is between the first other-end portion and the third electrode. The conductive member includes first to third portions. The second portion is between the third portion and the third electrode. The first portion is between the second portion and the third electrode. The first portion includes the first end portion. The second portion contacts the first and third portions.
    Type: Grant
    Filed: August 6, 2021
    Date of Patent: July 2, 2024
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Hiro Gangi, Yasunori Taguchi, Tomoaki Inokuchi, Yusuke Kobayashi, Hiroki Nemoto
  • Patent number: 12019970
    Abstract: According to one embodiment, a design support method includes inputting a design value group to a simulator. The design value group includes design values relating to a semiconductor element. The method further includes acquiring a characteristic value group output from the simulator according to the input of the design value group. The characteristic value group includes characteristic values of the semiconductor element. The characteristic values include a first and a second characteristic values respectively indicating an on-resistance and a breakdown voltage. The method further includes calculating an acquisition function of a Bayesian inference from history data including not less than one data set. The data set includes the design value group and a score. The portion of the characteristic value group includes the first and second characteristic values. The method further includes generating a new design value group based on the acquisition function.
    Type: Grant
    Filed: August 25, 2021
    Date of Patent: June 25, 2024
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hiro Gangi, Yasunori Taguchi
  • Patent number: 11995077
    Abstract: According to one embodiment, a parameter optimization apparatus stores data sets which each include a first parameter value of a first number of dimensions and an observed value of an objective function corresponding to the first parameter value. The apparatus determines a search space of a second number of dimensions smaller than the first number of dimensions. The apparatus acquires one or more data sets each having a first parameter value present within a predetermined distance from the search space. The apparatus searches the search space for a first parameter value that may optimize the objective function, using a surrogate model of an objective function based on one or more data sets acquired.
    Type: Grant
    Filed: August 30, 2021
    Date of Patent: May 28, 2024
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Hideyuki Nakagawa, Yasunori Taguchi, Hiro Gangi
  • Publication number: 20240079459
    Abstract: According to one embodiment, a semiconductor device includes a first electrode, a second electrode, a third electrode; a fourth electrode, a semiconductor member, a first conductive member, a second conductive member, and an insulating member. The semiconductor member includes first, second and third semiconductor regions. The first semiconductor region includes a first outer edge region, a first partial region, a second partial region, a third partial region, and a fourth partial region. The first, third and fourth partial regions are of a first conductivity type. The second semiconductor region is of a second conductivity type. The third semiconductor region is of the first conductivity type. The second conductive member includes a first conductive portion. The insulating member includes a first insulating region and a second insulating region. An electrical resistivity of the second partial region is higher than an electrical resistivity of the first partial region.
    Type: Application
    Filed: February 14, 2023
    Publication date: March 7, 2024
    Inventors: Yusuke KOBAYASHI, Tomoaki INOKUCHI, Hiro GANGI, Shotaro BABA
  • Publication number: 20240054272
    Abstract: An information processing apparatus according to one embodiment, comprising: a regression model generator configured to, by combining two or more of a plurality of variables, generate a plurality of terms that include combinations of two or more of the plurality of variables, respectively, and generate a regression model that regresses a property variable or an objective variable indicating an output of an objective function that includes the property variable, by the plurality of terms; a subgroup generator configured to generate, based on coefficients of the plurality of terms included in the regression model, subgroups that are the combinations of variables included the terms, respectively; and a subspace search processor configured to perform search for each of subspaces spanned by the subgroups based on an optimization criterion for the objective function, and generate pieces of first design value data that include values of the plurality of variables for the subspaces.
    Type: Application
    Filed: February 27, 2023
    Publication date: February 15, 2024
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Hiro GANGI, Yasunori TAGUCHI, Hideyuki NAKAGAWA, Tomoaki INOKUCHI, Yusuke KOBAYASHI, Akihiro GORYU
  • Publication number: 20240045923
    Abstract: According to an embodiment, an information processing device includes one or more hardware processors configured to: based on a constraint function value that is an output of a constraint function when one or more first set values are input for one or more parameters, estimate a first estimation value and a first estimation error of the constraint function value; and based on the first estimation value and the first estimation error, calculate a robust satisfaction probability representing a probability that one or more second set values for the one or more parameters satisfy a robust constraint that the constraint function value when inputting a plurality of third set values should satisfy, the plurality of third set values being obtained by changing the one or more second set values in a neighborhood range determined in advance based on the one or more second set values.
    Type: Application
    Filed: February 22, 2023
    Publication date: February 8, 2024
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Daiki KIRIBUCHI, Hiro GANGI
  • Publication number: 20240030344
    Abstract: According to one embodiment, a semiconductor device includes a first element. The first element includes a first conductive member, a second conductive member, a first semiconductor member, a third conductive member, and a third conductive member wiring. The first conductive member includes a first conductive portion including a first face and a second conductive portion including a second face. The second conductive member includes a third conductive portion including a third face and a fourth conductive portion including a fourth face. The fourth conductive portion includes a facing conductive portion. The first semiconductor member is of a first conductive type. The first semiconductor member includes a first partial region, a second partial region and a third partial region. The third partial region includes a facing face facing the facing conductive portion. The third conductive member wiring is electrically connected to the third conductive member.
    Type: Application
    Filed: February 21, 2023
    Publication date: January 25, 2024
    Applicants: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Tomoaki INOKUCHI, Hiro GANGI, Yusuke KOBAYASHI, Tatsuya NISHIWAKI, Shotaro BABA, Hiroki NEMOTO, Tatsunori SAKANO
  • Patent number: 11837637
    Abstract: According to one embodiment, a semiconductor device includes first to third electrodes, first and second conductive members, a semiconductor member, and a first insulating member. The first conductive member is electrically connected with the second electrode or is electrically connectable with the second electrode. The semiconductor member includes first to third semiconductor regions. The first semiconductor region includes first to fourth partial regions. The third partial region is between the first and second partial regions. The second semiconductor region is between the third partial region and the third semiconductor region. The fourth partial region is between the third partial region and the second semiconductor region. At least a portion of the second semiconductor region is between the second conductive member and the third electrode. The second conductive member is electrically insulated from the second and third electrodes. The first insulating member includes first to third insulating regions.
    Type: Grant
    Filed: August 11, 2021
    Date of Patent: December 5, 2023
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hiro Gangi, Tomoaki Inokuchi, Yusuke Kobayashi, Hiroki Nemoto
  • Patent number: 11824111
    Abstract: According to one embodiment, a semiconductor device includes first to third electrodes, a conductive member, a semiconductor member, and an insulating member. The second electrode includes a conductive portion. The conductive portion is between the third electrode and the conductive member. The conductive member is electrically connected with the second electrode. The semiconductor member includes first to third semiconductor regions. The second semiconductor region is between the third semiconductor region and a portion of the first semiconductor region. The second semiconductor region is between the third electrode and the conductive member. The conductive portion is electrically connected with the second and third semiconductor regions. The first electrode is electrically connected with the first semiconductor region. At least a portion of the first insulating member is between the semiconductor member and the third electrode and between the semiconductor member and the first conductive member.
    Type: Grant
    Filed: August 5, 2021
    Date of Patent: November 21, 2023
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Hiro Gangi, Tomoaki Inokuchi, Yusuke Kobayashi, Hiroki Nemoto
  • Patent number: 11777025
    Abstract: According to one embodiment, a semiconductor device includes a semiconductor member, first and second electrodes, a gate electrode, a gate terminal, a first conductive member, a first terminal, and a first insulating member. The semiconductor member includes first and second semiconductor regions, and a third semiconductor region provided between the first and second semiconductor regions. The first electrode is electrically connected to the first semiconductor region. The second electrode is electrically connected to the second semiconductor region. The gate terminal is electrically connected to the gate electrode. The first conductive member is electrically insulated from the first and second electrodes, and the gate electrode. The first terminal is electrically connected to the first conductive member.
    Type: Grant
    Filed: February 9, 2021
    Date of Patent: October 3, 2023
    Assignees: KABUSHIKA KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Yusuke Kobayashi, Tatsunori Sakano, Hiro Gangi, Tomoaki Inokuchi, Takahiro Kato, Yusuke Hayashi, Ryohei Gejo, Tatsuya Nishiwaki
  • Patent number: 11777028
    Abstract: According to one embodiment, a semiconductor device includes first to third electrodes, a first conductive member, a semiconductor member, and a first insulating member. The third electrode includes a third electrode end portion and a third electrode other-end portion. The first conductive member includes a first conductive member end portion and a first conductive member other-end portion. The first conductive member is electrically connected with one of the second electrode or the third electrode. The semiconductor member includes first to fourth semiconductor regions. The first semiconductor region includes first and second partial regions. The third semiconductor region is electrically connected with the second electrode. The fourth semiconductor region is electrically connected with the first electrode. At least a portion of the first insulating member is between the semiconductor member and the third electrode and between the semiconductor member and the first conductive member.
    Type: Grant
    Filed: August 5, 2021
    Date of Patent: October 3, 2023
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Yusuke Kobayashi, Akihiro Goryu, Ryohei Gejo, Hiro Gangi, Tomoaki Inokuchi, Shotaro Baba, Tatsuya Nishiwaki, Tsuyoshi Kachi
  • Patent number: 11742403
    Abstract: According to one embodiment, a semiconductor device includes first to third electrodes, a semiconductor member, a first conductive member, and an insulating part region. The second electrode includes a first electrode portion. The semiconductor member includes a first semiconductor region. The first semiconductor region includes first to third partial regions. The first partial region is between the first electrode and the first electrode portion. The second partial region is between the first and third electrodes. The third partial region is between the first partial region and the first electrode portion. The third partial region includes first and second positions. The second position is between the first partial region and the first position. The first conductive member includes first and second portions. The first portion is between the second partial region and the third electrode. The insulating part region includes first and second insulating regions.
    Type: Grant
    Filed: August 11, 2021
    Date of Patent: August 29, 2023
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tomoaki Inokuchi, Hiro Gangi, Yusuke Kobayashi, Hiroki Nemoto
  • Publication number: 20230197810
    Abstract: According to one embodiment, a semiconductor device includes first to third electrodes, a semiconductor member, a first conductive member, a connecting member, a first member, and an insulating member. The semiconductor member includes first to third semiconductor regions. The first semiconductor region is between the first electrode and the third semiconductor region. The first semiconductor region includes first to third partial regions. The second semiconductor region is between the first and third semiconductor regions. The second semiconductor region includes third and fourth semiconductor portions. The third semiconductor region includes first and second semiconductor portions. The second electrode is electrically connected with the third semiconductor region. The third electrode includes a first electrode portion. The first conductive member includes first to third conductive regions. The connecting member is electrically connected with the first conductive member.
    Type: Application
    Filed: June 29, 2022
    Publication date: June 22, 2023
    Applicants: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Shotaro BABA, Hiro GANGI, Hiroaki KATOU, Saya SHIMOMURA, Shingo SATO
  • Patent number: 11646368
    Abstract: According to one embodiment, a semiconductor device includes a supporter including a first surface, first, second, and third conductive parts, a semiconductor region, and an insulating part. A first direction from the first toward second conductive part is along the first surface. The semiconductor region includes first, second, and third partial regions. A second direction from the first toward second partial region is along the first surface and crosses the first direction. The third partial region is between the first partial region and the second conductive part in the first direction. The third partial region includes a counter surface facing the second conductive part. A direction from the counter surface toward the third conductive part is along the second direction. The insulating part includes an insulating region. At least a portion of the insulating region is between the counter surface and the third conductive part.
    Type: Grant
    Filed: March 1, 2021
    Date of Patent: May 9, 2023
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Tomoaki Inokuchi, Hiro Gangi, Yusuke Kobayashi, Ryosuke Iijima
  • Publication number: 20230078116
    Abstract: A semiconductor device of an embodiment includes: a semiconductor layer having a first face and a second face, the semiconductor layer including a first trench and a second trench on a side of a first face; a first electrode on the side of the first face; a second electrode on the side of the second face; a first gate electrode in the first trench; a first field plate electrode electrically connected to the first electrode in the first trench, a second gate electrode in the second trench; and a second field plate electrode electrically connected to the first electrode in the second trench, a resistance between first electrode and second field plate is different from a resistance between first electrode and the first field plate electrode.
    Type: Application
    Filed: March 7, 2022
    Publication date: March 16, 2023
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yusuke KOBAYASHI, Tomoaki INOKUCHI, Hiro GANGI, Tatsunori SAKANO, Yusuke HAYASHI
  • Publication number: 20230085364
    Abstract: A semiconductor device includes a first electrode, a second electrode, a first semiconductor region of a first conductivity type including a first portion and a second portion, a second semiconductor layer of a second conductivity type, a third semiconductor region of the first conductivity type, a fourth semiconductor region of the second conductivity type, a gate electrode located between the second semiconductor region and the fourth semiconductor region and between the third semiconductor region and the fourth semiconductor region in a second direction, a first insulating region, a third electrode, and a second insulating region.
    Type: Application
    Filed: February 18, 2022
    Publication date: March 16, 2023
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Hiroki NEMOTO, Yusuke KOBAYASHI, Tomoaki INOKUCHI, Hiro GANGI, Tatsuo SHIMIZU
  • Publication number: 20230078447
    Abstract: A semiconductor device includes a first electrode, a second electrode, a first semiconductor region of a first conductivity type, a second semiconductor region of a second conductivity type, a third semiconductor region of a first conductivity type, a fourth semiconductor region of a second conductivity type, a third electrode connected to the second electrode and the fourth semiconductor region, a first insulating region, a gate electrode, and a second insulating region.
    Type: Application
    Filed: February 18, 2022
    Publication date: March 16, 2023
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Hiroki NEMOTO, Yusuke KOBAYASHI, Tomoaki INOKUCHI, Hiro GANGI, Tatsuo SHIMIZU
  • Publication number: 20220393008
    Abstract: According to one embodiment, a semiconductor device includes first to third electrodes, a first conductive member, a semiconductor member, and a first insulating member. The third electrode includes a third electrode end portion and a third electrode other end portion. The third electrode end portion is between the first electrode and the third electrode other end portion. The first conductive member includes a first conductive member end portion and a first conductive member other end portion. The first conductive member end portion is between the first electrode and the first conductive member other end portion. The semiconductor member includes first to third semiconductor regions. The first semiconductor region includes first and second partial regions. The first insulating member includes silicon and oxygen. The first insulating member includes a first element including at least one selected from the group consisting of nitrogen, aluminum, hafnium and zirconium at the third position.
    Type: Application
    Filed: January 27, 2022
    Publication date: December 8, 2022
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yusuke KOBAYASHI, Tatsuo SHIMIZU, Tomoaki INOKUCHI, Hiro GANGI, Hiroki NEMOTO