Patents by Inventor Hiroaki Iwashita

Hiroaki Iwashita has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8681636
    Abstract: A non-transitory computer-readable recording medium stores therein a monitoring program that causes a computer monitoring data transmission from a transmission source device to a transmission destination device to execute a process that includes detecting data transmitted in a sequence that differs from a specified sequence; determining whether the sequence that differs is permissible by a specified constraint, if data transmitted at the sequence that differs is detected at the detecting; and outputting a determination result obtained at the determining.
    Type: Grant
    Filed: June 18, 2010
    Date of Patent: March 25, 2014
    Assignee: Fujitsu Limited
    Inventors: Matthieu Parizy, Hiroaki Iwashita
  • Patent number: 8661384
    Abstract: A verification support apparatus includes a detecting unit that detects an inconsistency between a simulation result at an observation point in a circuit-under-test and an expected value; a setting unit that sets a portion of output values to logic values different from those of the simulation result when the detecting unit detects the inconsistency, wherein the output values are random values output from elements that receive a signal in a second clock domain that receives the signal from a first clock domain asynchronously; a comparing unit that compares the expected value and a simulation result at the observation point after the setting by the setting unit; and an identifying unit that identifies whether the portion of the output values are a cause of the inconsistency, based on a result of comparison by the comparing unit.
    Type: Grant
    Filed: November 17, 2011
    Date of Patent: February 25, 2014
    Assignee: Fujitsu Limited
    Inventor: Hiroaki Iwashita
  • Publication number: 20130329890
    Abstract: An offline immobilizer ECU reads an encryption key generation code from an offline additional electronic key and generates an electronic key encryption key for the offline additional electronic key using the encryption key generation code and a communication subject key encryption key held by the immobilizer ECU. The immobilizer ECU stores, in a memory, the generated electronic key encryption key and a key ID code that is read from the offline additional electronic key.
    Type: Application
    Filed: May 28, 2013
    Publication date: December 12, 2013
    Inventors: Daisuke KAWAMURA, Hiroaki IWASHITA, Masaki HAYASHI, Toshihiro NAGAE, Hisashi KATO, Tetsuya EGAWA
  • Publication number: 20130332736
    Abstract: An immobilizer ECU transmits a vehicle ID code and a SEED code, which is read from an electronic key, to a data center online. The data center generates an encryption key from the received SEED code and a first logic, and generates a further SEED code from the encryption key, the vehicle ID code, and a second logic. The immobilizer ECU obtains the further SEED code online from the data center, generates the encryption key from the obtained further SEED code, the vehicle ID code, and the second logic, and stores the encryption key.
    Type: Application
    Filed: May 28, 2013
    Publication date: December 12, 2013
    Applicant: KABUSHIKI KAISHA TOKAI RIKA DENKI SEISAKUSHO
    Inventors: Daisuke KAWAMURA, Hiroaki IWASHITA, Masaki HAYASHI, Toshihiro NAGAE, Hisashi KATO, Tetsuya EGAWA
  • Publication number: 20130301829
    Abstract: An electronic key registration system includes a controller of a communication subject, an initial electronic key that communicates with the communication subject and has an initial encryption key generation code, an additional electronic key that communicates with the communication subject, and an information center including an additional encryption key. The initial electronic key holds an initial encryption key generated from the initial encryption key generation code and a logic. The controller holds the logic and identification information of the communication subject. The controller acquires the initial encryption key generation code from the initial electronic key, generates an initial encryption key from the initial encryption key generation code and the logic held by the controller, and stores the initial encryption key. The information center sends the additional encryption key to the additional electronic key or the controller through a network.
    Type: Application
    Filed: May 1, 2013
    Publication date: November 14, 2013
    Applicant: KABUSHIKI KAISHA TOKAI RIKA DENKI SEISAKUSHO
    Inventors: Daisuke KAWAMURA, Hiroaki IWASHITA, Masaki HAYASHI, Toshihiro NAGAE, Hisashi KATO, Tetsuya EGAWA
  • Publication number: 20130285792
    Abstract: An electronic key registration system includes a controller arranged in a communication subject communicable with an electronic key. A registration tool is in wired or wireless connection with the communication subject. The registration tool registers the electronic key to the controller when receiving a registration permission signal. An information center is connected to a network. The registration tool includes an operator ID acquisition unit that acquires an operator ID from a key registration operator. A communication unit sends the operator ID to the information center through the network. The information center includes an operator ID verification unit that verifies the operator ID received from the registration tool. A permission information notification unit sends, when the operator ID is verified, a registration permission signal to the registration tool through the network to permit the registration tool to perform the registration process.
    Type: Application
    Filed: April 16, 2013
    Publication date: October 31, 2013
    Applicant: KABUSHIKI KAISHA TOKAI RIKA DENKI SEISAKUSHO
    Inventors: Takahiro SHIMIZU, Tetsuya EGAWA, Akihito KIMURA, Toshihiro NAGAE, Daisuke KAWAMURA, Hiroaki IWASHITA
  • Patent number: 8533541
    Abstract: A computer-readable, non-transitory medium stores a program that causes a computer to execute detecting in a circuit-under-test, a change in a signal output from each circuit element on a transmission-side, during one clock cycle on a reception-side at an asynchronous location; inputting to each circuit element on the reception-side, a signal for which a change is not detected at a detection time among detection times when a signal change is detected at the detecting and replacing with a random logic value, a signal for which a change has been detected at a detection time among the detection times and inputting the random logic value to each circuit element on the reception-side, in an action triggered by a rising edge of an operation clock on the reception-side after the one clock cycle; and outputting for each circuit element on the reception-side, an operation result obtained based on input at the inputting.
    Type: Grant
    Filed: April 25, 2011
    Date of Patent: September 10, 2013
    Assignee: Fujitsu Limited
    Inventor: Hiroaki Iwashita
  • Patent number: 8532576
    Abstract: A portable device for preventing communication errors caused by disturbance such as noise. The portable device receives a first request signal from a communication controller and transmits a first response signal corresponding to the first request signal. A transmitter transmits the first response signal with a selected one of a plurality of frequencies. A transmission control unit transmits the first response signal from the transmitter with the one of the plurality of frequencies. The portable device further receives a second request signal from the communication control unit, which receives the first response signal. When the second request signal cannot be received, the portable device retransmits the first response signal from the transmitter with a frequency that differs from the one of the plurality of frequencies.
    Type: Grant
    Filed: April 2, 2008
    Date of Patent: September 10, 2013
    Assignee: Kabushiki Kaisha Tokai Rika Denki Seisakusho
    Inventors: Daisuke Kawamura, Yoshiyuki Mizuno, Hidenobu Hanaki, Hiroaki Iwashita
  • Patent number: 8525473
    Abstract: A charging system that significantly increases the anti-theft capability of a charging subject. The charging subject includes a rechargeable battery. The rechargeable battery of the charging subject is connected to a power supply of a house by power lines. An authentication management device performs authentication of the charging subject by communicating with the charging subject through the power lines and permits charging of the rechargeable battery with the power supply of the house only when the authentication is established.
    Type: Grant
    Filed: July 11, 2007
    Date of Patent: September 3, 2013
    Assignees: Kabushiki Kaisha Tokai Rika Denki Seisakusho, Toyota Jidosha Kabushiki Kaisha
    Inventors: Tomomi Shimizu, Yoshiyuki Mizuno, Kenji Tanaka, Mikihisa Araki, Hiroaki Iwashita, Keiji Yamamoto, Masayuki Yurimoto, Jun Shionoya
  • Patent number: 8521872
    Abstract: A computer-readable, non-transitory medium storing therein a verification support program that causes a computer to execute a process that includes detecting a point in time when data of any one transaction among a series of transactions that are to be transmitted in a prescribed sequence from a device under verification, is skipped; detecting a point in time when the data is first transmitted after the detected point in time when the data is skipped; computing time elapsing from the detected point in time when the data is skipped until the detected point in time when the data is transmitted; and outputting a computation result obtained at the computing.
    Type: Grant
    Filed: April 25, 2011
    Date of Patent: August 27, 2013
    Assignee: Fujitsu Limited
    Inventors: Matthieu Parizy, Hiroaki Iwashita
  • Patent number: 8407636
    Abstract: A computer-readable, non-transitory medium stores therein a verification support program that causes a computer to execute a procedure. The procedure includes first detecting a state change in a circuit and occurring when input data is given to the circuit. The procedure also includes second detecting a state change in the circuit and occurring when the input data partially altered is given to the circuit. The procedure further includes determining whether a difference exists between a series of state changes detected at the first detecting and a series of state changes detected at the second detecting. The procedure also includes outputting a determination result obtained at the determining.
    Type: Grant
    Filed: December 8, 2010
    Date of Patent: March 26, 2013
    Assignee: Fujitsu Limited
    Inventor: Hiroaki Iwashita
  • Publication number: 20130055182
    Abstract: A computer-readable medium stores a verification support program that causes a computer to execute a process that includes executing a first simulation of applying a given input pattern to circuit information of a circuit under test having a first clock domain and a second clock domain that receives asynchronously a signal from the first clock domain; detecting during execution of the first simulation, an output value that is a random value output by an element in the second clock domain; copying the execution state of the first simulation at the time of detection of the output value; setting in the copied execution state of the first simulation, output of the element in the second clock domain, to a logic value that is different from the detected output value; and executing, exclusive of the first simulation, a second simulation that is based on the set execution state.
    Type: Application
    Filed: June 21, 2012
    Publication date: February 28, 2013
    Applicant: FUJITSU LIMITED
    Inventor: Hiroaki IWASHITA
  • Patent number: 8290649
    Abstract: A charging system that facilitates tracking of a stolen charging subject. The charging subject includes a battery and has a unique identification code. A charging device is connected to the battery of the charging subject by an electric cable, and the battery is chargeable. A server is connected to either one of the charging device and the charging subject and manages charging of the charging subject with the charging device. The server is cable of registering an identification code of the charging subject. The server obtains the identification code from the charging subject, determined whether or not the obtained identification code is registered in the server, and transmits to the charging device a charging prohibition command for prohibiting charging of the charging subject with the charging device when the obtained identification code is not registered in the server.
    Type: Grant
    Filed: July 11, 2007
    Date of Patent: October 16, 2012
    Assignees: Kabushiki Kaisha Tokai Rika Denki Seisakusho, Toyota Jidosha Kabushiki Kaisha
    Inventors: Hiroaki Iwashita, Yoshiyuki Mizuno, Kenji Tanaka, Mikihisa Araki, Tomomi Shimizu, Masayuki Yurimoto, Keiji Yamamoto, Jun Shionoya
  • Patent number: 8275130
    Abstract: A secret key registration system which registers a secret key in a portable key device and vehicle. A first transformation equation is stored in a writer and the vehicle. A second transformation equation is stored in the portable key device and the vehicle. The writer transmits a registration code to the portable key device and generates intermediate data with the first transformation equation of the writer. The intermediate data is transmitted to the portable key device, which generates the secret key from the intermediate data with the second transformation equation. The portable key device transmits the registration code to the vehicle. The vehicle generates intermediate data from the registration code with the first transformation equation of the vehicle, and then generates the secret key from the intermediate data with the second transformation equation.
    Type: Grant
    Filed: November 5, 2009
    Date of Patent: September 25, 2012
    Assignee: Kabushiki Kaisha Tokai Rika Denki Seisakusho
    Inventors: Daisuke Kawamura, Hiroaki Iwashita, Kouhei Kishimoto, Yuuki Nawa, Yoshiyuki Mizuno, Hiromitsu Mizuno, Shinichi Koga, Kota Nishida, Tomohiro Ito, Hideki Kawai
  • Publication number: 20120239328
    Abstract: A waveform analyzer includes a converter which converts a logical function, where a pair of data including a time and a value at the time is variable, created according to data sets of a time and a value of a signal waveform at the time into a second function expressed by a binary decision diagram, an acquisition unit which obtains for each of characteristic points of a reference waveform a condition representative of constraints on a relationship between time information specified by the points and a value corresponding to the time information in the signal waveform according to a value of the reference waveform at the points and a specified tolerance given to a value of the reference waveform, and a searching unit which applies the condition for each of the points to the second function to obtain a time range which meets the entirety of the conditions.
    Type: Application
    Filed: January 26, 2012
    Publication date: September 20, 2012
    Applicant: FUJITSU LIMITED
    Inventors: Yutaka TAMIYA, Hiroaki Iwashita, Hiroyuki Higuchi
  • Publication number: 20120210282
    Abstract: A verification support apparatus includes a detecting unit that detects an inconsistency between a simulation result at an observation point in a circuit-under-test and an expected value; a setting unit that sets a portion of output values to logic values different from those of the simulation result when the detecting unit detects the inconsistency, wherein the output values are random values output from elements that receive a signal in a second clock domain that receives the signal from a first clock domain asynchronously; a comparing unit that compares the expected value and a simulation result at the observation point after the setting by the setting unit; and an identifying unit that identifies whether the portion of the output values are a cause of the inconsistency, based on a result of comparison by the comparing unit.
    Type: Application
    Filed: November 17, 2011
    Publication date: August 16, 2012
    Applicant: FUJITSU LIMITED
    Inventor: Hiroaki Iwashita
  • Publication number: 20120209583
    Abstract: A computer-readable medium stores therein a verification support program that causes a computer to execute a process including first detecting an assertion that evaluates to true during simulation of a circuit, the assertion being detected from an assertion group prescribing values of registers to be met by the circuit; updating, at a clock tick subsequent to a clock tick at which the assertion is detected at the first detecting, an expected value of a register, to a value of the register as prescribed by the assertion; second detecting inconsistency between the expected value that has been updated at the updating and the value of the register; determining, based on a detection result obtained at the second detecting, validity of a change in the value of the register; and outputting a determination result obtained at the determining.
    Type: Application
    Filed: November 4, 2011
    Publication date: August 16, 2012
    Applicant: FUJITSU LIMITED
    Inventors: Matthieu PARIZY, Hiroaki IWASHITA
  • Patent number: 8160859
    Abstract: A logic simulation apparatus includes: a jitter detector generation section 21 that generates information concerning a jitter circuit for determining whether a time variation occurs in signal passing between a first circuit and a second circuit, the first circuit configured to output a signal with a clock output from a predetermined clock source and the second circuit configured to output a signal with a clock output from a clock source different from the above predetermined clock source; and a constraint solver generation section 22 that generates information concerning a solver that is configured to create a signal to be output at an observation point using a logical expression of an output signal of the second circuit and output, based on the logical expression and output signal of the jitter detector circuit, a signal constrained by the output signal of the jitter detector circuit and output signal of the second circuit.
    Type: Grant
    Filed: July 8, 2009
    Date of Patent: April 17, 2012
    Assignee: Fujitsu Limited
    Inventor: Hiroaki Iwashita
  • Patent number: 8150573
    Abstract: A travel mode setting device for a hybrid car capable of ensuring the security against car theft and convenience when the car is lent to the third party. The hybrid car has travel drive sources and selectively uses one of them and can travel in one of travel modes. Authenticating means separately authenticate the car user and creates authentication results. Limiting means limits the travel modes to the usable travel modes according to the results of the authentication by the authenticating means.
    Type: Grant
    Filed: July 11, 2007
    Date of Patent: April 3, 2012
    Assignees: Kabushiki Kaisha Tokai Rika Denki Seisakusho, Toyota Jidosha Kabushiki Kaisha
    Inventors: Tomomi Shimizu, Yoshiyuki Mizuno, Kenji Tanaka, Mikihisa Araki, Hiroaki Iwashita, Jun Shionoya, Masayuki Yurimoto, Keiji Yamamoto
  • Publication number: 20120005335
    Abstract: A computer-readable, non-transitory medium storing therein a verification support program that causes a computer to execute a process that includes detecting a point in time when data of any one transaction among a series of transactions that are to be transmitted in a prescribed sequence from a device under verification, is skipped; detecting a point in time when the data is first transmitted after the detected point in time when the data is skipped; computing time elapsing from the detected point in time when the data is skipped until the detected point in time when the data is transmitted; and outputting a computation result obtained at the computing.
    Type: Application
    Filed: April 25, 2011
    Publication date: January 5, 2012
    Applicant: Fujitsu Limited
    Inventors: Matthieu Parizy, Hiroaki Iwashita